IEEE transactions on biomedical circuits and systems最新文献

This paper proposes an envelope-detector-less (EDL) amplitude-shift-keying (ASK) forward telemetry (FT) demodulator for wireless power/data transfer (WPDT) systems. The EDL ASK FT demodulator can substitute bulky and power-hungry components, which are an envelope detector and an analog comparator in the conventional ASK FT demodulator, with a digital controller, reducing both power dissipation and chip area. The proposed demodulator shares the gate control signals of pass transistors, which are used in an ac-dc regulator for wireless power reception, to maintain a constant load voltage while efficiently demodulating the forward telemetry data. Also, a proposed digital cleaner in the EDL demodulator refines this control signal into a wide pulse without suffering from resonant frequency noise, while a synchronizer can align its frequency with the data rate and resonant frequency. The 0.25-μm CMOS prototype chip of the proposed power-path-less EDL ASK FT demodulator, equipped with the ac-dc regulator, demonstrates a significant 38.2% reduction in power dissipation compared to the conventional ASK FT demodulator. Moreover, the EDL ASK FT demodulator occupies only 0.023-mm² silicon area and achieves a low bit error rate (BER) less than 10-⁴ while maintaining a regulated voltage of 4.5 V on the load.

Low-intensity focused ultrasound (FUS) is an emerging non-invasive and spatially/temporally precise method for modulating the firing rates and patterns of peripheral nerves. This paper describes an image-guided platform for chronic and patient-specific FUS neuromodulation. The system uses custom wearable probes containing separate ultrasound imaging and modulation transducer arrays realized using piezoelectric transducers assembled on a flexible printed circuit board (PCB). Dual-mode probes operating around 4 MHz (imaging) and 1.3 MHz (modulation) were fabricated and tested on tissue phantoms. The resulting B-mode images were analyzed using a template-matching algorithm to estimate the location of the target nerve and then direct the modulation beam toward the target. The ultrasound transmit voltage used to excite the modulation array was optimized in real-time by automatically regulating functional feedback signals (the average rates of emulated muscle twitches detected by an on-board motion sensor) through a proportional and integral (PI) controller, thus providing robustness to inter-subject variability and probe positioning errors. The proposed closed-loop neuromodulation paradigm was experimentally demonstrated in vitro using an active tissue phantom that integrates models of the posterior tibial nerve and nearby blood vessels together with embedded sensors and actuators.

Intracellular electrophysiology, a vital and versatile technique in cellular neuroscience, is typically conducted using the patch-clamp method. Despite its effectiveness, this method poses challenges due to its complexity and low throughput. The pursuit of multi-channel parallel neural intracellular recording has been a long-standing goal, yet achieving reliable and consistent scaling has been elusive because of several technological barriers. In this work, we introduce a micropower integrated circuit, optimized for scalable, high-throughput in vitro intrinsically intracellular electrophysiology. This system is capable of simultaneous recording and stimulation, implementing all essential functions such as signal amplification, acquisition, and control, with a direct interface to electrodes integrated on the chip. The electrophysiology system-on-chip (eSoC), fabricated in 180nm CMOS, measures 2.236 mm × 2.236 mm. It contains four 8 × 8 arrays of nanowire electrodes, each with a 50 μm pitch, placed over the top-metal layer on the chip surface, totaling 256 channels. Each channel has a power consumption of 0.47 μW, suitable for current stimulation and voltage recording, and covers 80 dB adjustable range at a sampling rate of 25 kHz. Experimental recordings with the eSoC from cultured neurons in vitro validate its functionality in accurately resolving chemically induced multi-unit intracellular electrical activity.

This paper proposed an event-driven clockless level-crossing ADC (LC-ADC) suitable for biomedical applications. Thanks to the LC loop, the sampling rate of the converter automatically adapts to the input activities. Activity-dependent power consumption and data compression can thus be realized, saving system power, especially during time-sparse signal acquisition. Meanwhile, a SAR-assisted loop is exploited to resolve the loop-delay-induced distortion in conventional LC-ADC. Therefore, the resolution and power efficiency of the LC-ADC are improved effectively while maintaining the event-driven feature. Implemented in a 55nm process, the proposed LC-ADC achieves a scalable power consumption and a peak SNDR of 62.2dB for a 20kHz input. It also achieves a Walden FoM of 29.7fJ/conv.-step and a Schreier FoM of 158.6dB, which is best in class, without using off-chip calibration. Sub μW power is realized when the input frequency is below 1.5kHz. The proposed LC-ADC is also verified by simulated electrocardiogram (ECG), neural spike, and electromyogram (EMG) signals. It provides a ~7X data compression for ECG input, providing an attractive solution for time-sparse signal acquisition in biomedical applications.

A low-power (∼ 600nW), fully analog integrated architecture for a voting classification algorithm is introduced. It can effectively handle multiple-input features, maintaining exceptional levels of accuracy and with very low power consumption. The proposed architecture is based on a versatile Voting algorithm that selectively incorporates one of three key classification models: Bayes or Centroid, or, the Learning Vector Quantization model; all of which are implemented using Gaussian-likelihood and Euclidean distance function circuits, as well as a current comparison circuit. To evaluate the proposed architecture, a comprehensive comparison with popular analog classifiers is performed, using real-life diabetes dataset. All model architectures were trained using Python and compared with the software-based classifiers. The circuit implementations were performed using the TSMC 90 nm CMOS process technology and the Cadence IC Suite was utilized for the design, schematic and post-layout simulations. The proposed classifiers achieved sensitivity of ≥ 96.7% and specificity of ≥ 89.7%.