Chip

Pub Date : 2025-03-06 DOI: 10.1016/j.chip.2025.100136

Ziliang Fang , Bingyu Chen , Rui Rong , Hanrong Xie , Manyan Xie , Haoran Guo , Yang Li , Fangheng Fu , Xu Ouyang , Yuming Wei , Gangding Peng , Tiefeng Yang , Huihui Lu , Heyuan Guan

Human vision–inspired neuromorphic devices have integrated architectures that combine sensing, computing, and storage functions, which can fundamentally avoid the energy waste caused by frequent data movement in the currently widely used von Neumann architecture, and have crucial application potential in advanced artificial intelligence chips that pursue low power consumption and low latency. However, previously reported visual neuromorphic devices either suffer complex floating gate, vertically stacked multilayer structures, or necessitate separated optical-sensing and synaptic units, realizing highly compact, non-volatile optoelectronic response and continuously tunable conductivity within a sententious architecture remains a significant challenge. Here, we presented a low-cost exfoliation and transfer method combined with spin-coating to fabricate molybdenum disulfide (MoS₂)/barium titanate (BaTiO₃) heterostructured optoelectronic devices. Based on the ferroelectricity of BaTiO₃ and the charge transport characteristics of MoS₂, the hysteresis of ferroelectric polarization upon both electric and optical stimulation is successfully endowed with reliable resistance state switching abilities, showing the advantages of low bias voltage operation (±2 V) and distinct 16 conductance states under light pulse irradiation. Besides, the MoS₂/BaTiO₃ device can be further used to emulate biological synaptic behavior and accomplish the transition from short-term memory (STM) to long-term memory (LTM). Notably, leveraging the dual characteristics of imaging and neuromorphic behavior, we constructed a multi-layer perceptron network integrating visual perception and image recognition, showing an accuracy of 97.6% in the Modified National Institute of Standards and Technology (MNIST) pattern recognition task. This work introduced a simple MoS₂/BaTiO₃ heterojunction architecture device, offering integrated perception, storage, and computing capabilities, providing a new possibility for future compact neuromorphic computing devices.

人类视觉启发的神经形态器件具有传感、计算和存储功能相结合的集成架构，可以从根本上避免目前广泛使用的von Neumann架构中频繁移动数据造成的能量浪费，在追求低功耗、低延迟的高级人工智能芯片中具有至关重要的应用潜力。然而，先前报道的视觉神经形态器件要么采用复杂的浮栅、垂直堆叠的多层结构，要么需要分离的光传感和突触单元，在简洁的结构中实现高度紧凑、非易失性的光电响应和连续可调的电导率仍然是一个重大挑战。在这里，我们提出了一种低成本的剥离和转移方法，结合自旋涂层来制备二硫化钼(MoS2)/钛酸钡（BaTiO3）异质结构光电器件。基于BaTiO3的铁电性和MoS2的电荷输运特性，成功地赋予了铁电极化滞后在电和光刺激下具有可靠的电阻状态切换能力，显示出在光脉冲照射下低偏置电压（±2 V）和不同电导状态的优势。此外，MoS2/BaTiO3器件还可进一步用于模拟生物突触行为，实现短时记忆（STM）向长时记忆（LTM）的过渡。值得注意的是，利用成像和神经形态行为的双重特征，我们构建了一个集成视觉感知和图像识别的多层感知器网络，在修改的美国国家标准与技术研究所（MNIST）模式识别任务中显示出97.6%的准确率。这项工作引入了一个简单的MoS2/BaTiO3异质结架构器件，提供集成的感知、存储和计算能力，为未来紧凑的神经形态计算器件提供了新的可能性。

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引用次数: 0

SOT-MRAM-based true in-memory computing architecture for approximate multiplication 基于sot - mram的真正内存计算架构，用于近似乘法

Chip

Pub Date : 2025-03-05 DOI: 10.1016/j.chip.2025.100134

Min Song , Qilong Tang , Xintong Ouyang , Wei Duan , Yan Xu , Shuai Zhang , Long You

The in-memory computing (IMC) paradigm emerges as an effective solution to break the bottlenecks of conventional von Neumann architecture. In the current work, an approximate multiplier in spin-orbit torque magnetoresistive random access memory (SOT-MRAM) based true IMC (STIMC) architecture was presented, where computations were performed natively within the cell array instead of in peripheral circuits. Firstly, basic Boolean logic operations were realized by utilizing the feature of unipolar SOT device. Two majority gate-based imprecise compressors and an ultra-efficient approximate multiplier were then built to reduce the energy and latency. An optimized data mapping strategy facilitating bit-serial operations with an extensive degree of parallelism was also adopted. Finally, the performance enhancements by performing our approximate multiplier in image smoothing were demonstrated. Detailed simulation results show that the proposed 8 × 8 approximate multiplier could reduce the energy and latency at least by 74.2% and 44.4% compared with the existing designs. Moreover, the scheme could achieve improved peak signal-to-noise ratio (PSNR) and structural similarity index metric (SSIM), ensuring high-quality image processing outcomes.

内存计算（IMC）范式作为打破传统冯·诺依曼架构瓶颈的有效解决方案而出现。在当前的工作中，提出了一种基于自旋轨道转矩磁阻随机存取存储器（SOT-MRAM）的近似乘法器，该乘法器的计算在单元阵列内进行，而不是在外围电路中进行。首先，利用单极性SOT器件的特性，实现了基本的布尔逻辑运算；然后构建了两个基于多数门的不精确压缩器和一个超高效近似乘法器，以减少能量和延迟。采用了一种优化的数据映射策略，使位串行操作具有广泛的并行度。最后，演示了在图像平滑中使用近似乘法器的性能增强。详细的仿真结果表明，与现有设计相比，所提出的8 × 8近似乘法器的能量和时延分别降低了74.2%和44.4%。此外，该方案可以提高峰值信噪比（PSNR）和结构相似度指标（SSIM），保证高质量的图像处理结果。

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引用次数: 0

Corrigendum to “Wang, Z. et al. Van der Waals ferroelectric transistors: the all-round artificial synapses for high-precision neuromorphic computing” Chip 2 (2023) 100044 范德华铁电晶体管：用于高精度神经形态计算的全方位人工突触 "的更正，Chip 2 (2023) 100044

Chip

Pub Date : 2025-03-01 DOI: 10.1016/j.chip.2024.100100

Zhongwang Wang , Xuefan Zhou , Xiaochi Liu , Aocheng Qiu , Caifang Gao , Yahua Yuan , Yumei Jing , Dou Zhang , Wenwu Li , Hang Luo , Junhao Chu , Jian Sun

引用次数: 0

Characterizing the spatial potential of an ion trap chip 表征离子阱芯片的空间电位

Chip

Pub Date : 2025-03-01 DOI: 10.1016/j.chip.2024.100126

Qingqing Qin , Ting Chen , Xinfang Zhang , Baoquan Ou , Jie Zhang , Chunwang Wu , Yi Xie , Wei Wu , Pingxing Chen

The accurate characterization of the spatial electric field generated by electrodes in a surface electrode trap is of paramount importance. In this pursuit, we have identified a simple yet highly precise parametric expression to describe the spatial field of a rectangular-shaped electrode. Leveraging this expression, we introduced an optimization method designed to accurately characterize the axial electric field intensity produced by the powered electrode and the stray field. Distinct from the existing methods, our approach integrates a diverse array of experimental data, including the equilibrium positions of ions in a linear string, the equilibrium positions of single trapped ions, and trap frequencies, to effectively reduce the systematic errors. This approach provides considerable flexibility in voltage settings for data acquisition, making it especially advantageous for surface electrode traps where the trapping height of ion probes may vary with casual voltage settings. In our experimental demonstration, we successfully minimized the discrepancy between observations and model predictions to a remarkable degree. The relative errors of secular frequencies were contained within ±0.5%, and the positional error of ions was constrained to less than 1.2 μm, which surpasses the performance of current methodologies.

准确表征表面电极陷阱中电极产生的空间电场是至关重要的。在这一追求中，我们已经确定了一个简单而高度精确的参数表达式来描述矩形电极的空间场。利用这一表达式，我们引入了一种优化方法，旨在准确表征由通电电极和杂散场产生的轴向电场强度。与现有方法不同的是，我们的方法集成了多种实验数据，包括离子在线性弦中的平衡位置、单个捕获离子的平衡位置和捕获频率，从而有效地减少了系统误差。这种方法为数据采集的电压设置提供了相当大的灵活性，使其特别适用于离子探针的捕获高度可能随随意电压设置而变化的表面电极陷阱。在我们的实验演示中，我们成功地将观测结果与模型预测之间的差异降到非常低的程度。长期频率相对误差控制在±0.5%以内，离子位置误差控制在1.2 μm以内，优于现有方法。

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引用次数: 0

GaN chips for monitoring density and temperature of lead-acid batteries 用于监测铅酸电池密度和温度的氮化镓芯片

Chip

Pub Date : 2025-02-25 DOI: 10.1016/j.chip.2025.100133

Zhiyong Ye , Ganyuan Deng , Dongmiao Liu , Jingyan Wang , Xiaodi Gao , Kwai Hei Li , Ling Zhu

Lead-acid batteries are indispensable in various applications, and it is crucial to monitor their status. However, the existing sensing units for lead-acid batteries are limited by their bulky size, slow response time, and lack of temperature sensing and compensation capabilities. In the current work, a compact GaN-based sensing device was proposed to simultaneously measure the electrolyte density and temperature. The device comprises a light-emitting diode (LED) and a photodetector (PD) integrated on a GaN-on-sapphire chip in a monolithic configuration. The forward voltage of the LED reflects the electrolyte temperature, while the photocurrent of the PD varies with electrolyte density due to optical reflection changes at the exposed sapphire interface. The measured signals were processed using a decoupling matrix to achieve temperature compensation. The device exhibits a sensitivity of −29.1 μA/(g/cm³) for density in the range of 1.09 g/cm³ to 1.29 g/cm³, and -1.07 mV/°C for temperature in the range of 25 to 45 °C. The performance of the device was also validated through comparisons with commercial meters and real-time monitoring during the charging and discharging of the batteries. The device has notable advantages in size, cost, and fast response/recovery time (134.3/201.4 ms), rendering it a promising tool for monitoring lead-acid batteries.

铅酸蓄电池在各种应用中不可或缺，对其状态的监测至关重要。然而，现有的铅酸电池传感单元受到体积庞大、响应时间慢、缺乏温度传感和补偿能力的限制。本文提出了一种紧凑的氮化镓传感装置，可以同时测量电解质密度和温度。该器件包括一个发光二极管（LED）和一个光电探测器（PD），以单片结构集成在蓝宝石上的gan芯片上。LED的正向电压反映了电解质温度，而PD的光电流由于暴露在蓝宝石界面处的光反射变化而随电解质密度变化。采用解耦矩阵对测量信号进行处理，实现温度补偿。该器件在密度为1.09 g/cm3 ~ 1.29 g/cm3范围内的灵敏度为−29.1 μA/(g/cm3)，在温度为25 ~ 45℃范围内的灵敏度为-1.07 mV/℃。通过与商用电表的对比以及电池充放电过程中的实时监测，验证了该装置的性能。该装置在尺寸、成本和快速响应/恢复时间（134.3/201.4 ms）方面具有显着优势，是一种很有前途的铅酸电池监测工具。

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引用次数: 0

Complex-Amplitude-Modulated Meta-Device for Optical Image Processing 用于光学图像处理的复调幅元器件

Chip

Pub Date : 2025-02-14 DOI: 10.1016/j.chip.2025.100132

Xincheng Jiang , Peicheng Lin , Yeang Zhang , Ting Xu , Yan-qing Lu , Jun-long Kou

Nowadays, convolutional neural networks (CNNs) have become a powerful tool in areas such as object recognition, and natural language processing (NLP). However, considering that electronic convolutional operation always contains million-level parameters and complex calculation process, it consumes a large number of computing resources and time. To overcome these limitations, we propose a design of complex-amplitude-modulated meta-device which could perform various functions of image processing. In this work, we demonstrate the excellent performance of two-dimensional edge detection and Gaussian filtering. The proposed convolutional system serves as a new optical computing hardware, and provides a new approach for CNNs, biological microscopy and near-infrared imaging.

如今，卷积神经网络（cnn）已经成为物体识别和自然语言处理（NLP）等领域的强大工具。然而，由于电子卷积运算总是包含百万级参数和复杂的计算过程，消耗了大量的计算资源和时间。为了克服这些限制，我们提出了一种复杂调幅元器件的设计，可以执行各种图像处理功能。在这项工作中，我们证明了二维边缘检测和高斯滤波的优异性能。所提出的卷积系统作为一种新的光学计算硬件，为cnn、生物显微镜和近红外成像提供了新的途径。

引用次数: 0

Advances in piezotronics and piezo-phototronics of two-dimensional semiconductor materials 二维半导体材料的压电电子学和压电光电子学研究进展

Chip

Pub Date : 2025-01-30 DOI: 10.1016/j.chip.2025.100131

Yitong Wang , Fangpei Li , Wenbo Peng , Yongning He

High-performance electronics and optoelectronics play vital roles in modern society, as they are the fundamental building blocks of functional devices and systems. Two-dimensional semiconductor materials (2D-SCMs) are potential candidates for high-performance electronics and optoelectronics due to their excellent physical, chemical, electrical, and photonic properties. Owing to their special crystalline structure, they also present unique piezoelectricity, which opens a new door to the innovative fields of piezotronics and piezo-phototronics. Piezotronics and piezo-phototronics utilize the piezoelectric polarization charges produced when the 2D-SCMs undergo externally applied strains/stresses to modulate the performance of 2D-SCMs-based electronics and optoelectronics. In this review, firstly, the growth methods and piezoelectric properties of 2D-SCMs are stated, and the mechanisms of piezotronics and piezo-phototronics are also introduced. Afterwards, the recent progress of piezotronics and piezo-phototronics in high-performance 2D-SMCs-based electronics and optoelectronics are systematically reviewed. In addition, the functional devices and systems based on the piezotronics and piezo-phototronics in 2D-SMCs have been summarized. Finally, the research progresses are summarized, and future perspectives are proposed.

高性能电子学和光电子学在现代社会中发挥着至关重要的作用，因为它们是功能器件和系统的基本组成部分。二维半导体材料（2d - scm）由于其优异的物理、化学、电学和光子特性而成为高性能电子学和光电子学的潜在候选者。由于其特殊的晶体结构，它们也呈现出独特的压电性，这为压电电子学和压电光电子学的创新领域打开了新的大门。压电电子学和压电光电子学利用2d - scm经受外部施加应变/应力时产生的压电极化电荷来调节基于2d - scm的电子学和光电子学的性能。本文首先介绍了2D-SCMs的生长方法和压电性能，并介绍了压电电子学和压电光电电子学的机理。随后，系统综述了压电电子学和压电光电子学在高性能二维smcs电子学和光电子学领域的最新进展。此外，对基于压电和压电光电子的二维smcs功能器件和系统进行了综述。最后，对研究进展进行了总结，并对未来的研究方向进行了展望。

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引用次数: 0

Zero-power self-aware microsystem platform enabled by passive acoustic switch 无源声开关实现零功耗自感知微系统平台

Chip

Pub Date : 2025-01-27 DOI: 10.1016/j.chip.2025.100130

Deng Yang , Xiaoqin Liu , Lingyun Zhang , Guozhe Xuan , Xiangzheng Sun , Jiahao Zhao

Long-term continuous monitoring is essential for the Internet of Things (IoT), with efficient power use and sustainable energy supply as core challenges. This study presents a MEMS-based self-holding acoustic switch designed for uninterrupted monitoring of specific acoustic signals with zero power consumption. Microelectromechanical systems (MEMS) refer to miniaturized devices that integrate mechanical and electrical components on a single microchip. A mathematical model is developed to analyze the switch's acoustic frequency response. Simulations and experiments demonstrate its acoustic-driven properties. Acoustic switches with different structural parameters are designed, achieving resonant frequencies ranging from 192 Hz to 862 Hz. Electrostatic voltages are applied to enable self-holding functionality, and the acoustic switch exhibits a contact resistance as low as 29.3 Ω. The acoustic switch successfully performs various functions, including acoustic sensing, frequency identification, on–off control, and self-holding, all without drawing power from an external power supply. By integrating this acoustic switch, a zero-power self-aware microsystem platform is realized, allowing zero-power sleep states without closed-loop circuits while remaining responsive to target acoustic signals. This technology effectively supports long-term, large-scale deployment of unattended IoT terminals.

长期持续监测对于物联网（IoT）至关重要，高效的电力使用和可持续的能源供应是核心挑战。本研究提出了一种基于mems的自持声开关，用于零功耗不间断监测特定的声信号。微机电系统（MEMS）是指将机械和电气元件集成在单个微芯片上的小型化设备。建立了分析开关声频响应的数学模型。仿真和实验验证了其声驱动特性。设计了不同结构参数的声开关，实现了192hz ~ 862hz的谐振频率。施加静电电压以实现自保持功能，声学开关的接触电阻低至29.3 Ω。声学开关在不需要外部电源供电的情况下，成功地完成了声学传感、频率识别、通断控制和自保持等功能。通过集成该声学开关，实现了零功耗自感知微系统平台，允许零功耗睡眠状态，无需闭环电路，同时保持对目标声学信号的响应。该技术有效支持无人值守物联网终端的长期大规模部署。

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引用次数: 0

Ferroelectric devices for artificial intelligence chips 用于人工智能芯片的铁电器件

Chip

Pub Date : 2025-01-25 DOI: 10.1016/j.chip.2025.100129

Jinshun Bi , Muhammad Faizan , Xuefei Liu , Yue Ma , Xu Wang , Viktor Stempitsky

The identification of ferroelectricity in oxides such as hafnium oxide, which are compatible with the contemporary semiconductor fabrication techniques, has contributed to a resurgence of ferroelectric devices in cutting-edge microelectronics. In a transistor structure, ferroelectric devices play the role of connecting a ferroelectric material to a semiconductor, which combines memory and logic operations at the level of a single device, thus meeting some of the most essential hardware requirements for new paradigms for artificial intelligence (A.I) chips. In this review, we addressed the issues associated with high-volume fabrication at advanced technology nodes (

\leq 10 nm)

at the material and device level. Moreover, we also reviewed the advancement of A.I chips such as neuro-inspired computer chips. For neuro-inspired A.I chips based on nonvolatile memory, four important metrics are suggested for benchmarking: computing density, energy efficiency, learning capability, and computing accuracy. It is inferred that ferroelectric devices can be a major hardware element in the design of future A.I chips, which will leads to an innovative approach to electronics that is termed ferroelectronics.

在氧化物（如氧化铪）中发现铁电性，这与当代半导体制造技术兼容，有助于在尖端微电子中铁电器件的复兴。在晶体管结构中，铁电器件起着将铁电材料连接到半导体的作用，半导体在单个器件的水平上结合了存储和逻辑操作，从而满足了人工智能（A.I）芯片新范式的一些最基本的硬件要求。在这篇综述中，我们解决了与材料和器件级先进技术节点（≤10nm）的大批量制造相关的问题。此外，我们还回顾了人工智能芯片的进展，如神经启发计算机芯片。对于基于非易失性存储器的神经启发的人工智能芯片，建议进行基准测试的四个重要指标：计算密度、能源效率、学习能力和计算精度。据推测，铁电器件可以成为未来人工智能芯片设计中的主要硬件元素，这将导致一种被称为铁电子学的创新电子方法。

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引用次数: 0

Generalized cross-entropy benchmarking for random circuits with ergodicity 遍历随机电路的广义交叉熵基准

Chip

Pub Date : 2025-01-16 DOI: 10.1016/j.chip.2025.100127

Bin Cheng , Fei Meng , Zhi-Jiong Zhang , Man-Hong Yung

Cross-entropy benchmarking is a central technique adopted to certify a quantum chip in recent investigations. To better understand its mathematical foundation and develop new benchmarking schemes, the concept of ergodicity was introduced to random circuit sampling and it was found that the Haar random quantum circuit could satisfy an ergodicity condition—the average of certain types of postprocessing function over the output bit strings is close to the average over the unitary ensemble. For noiseless random circuits, it was proven that the ergodicity holds for polynomials of degree t with positive coefficients when the random circuits form a unitary 2t-design. For strong enough noise, the ergodicity condition is violated, which suggests that ergodicity is a property that can be exploited to certify a quantum chip. The deviation of ergodicity was formulated as a measure for quantum chip benchmarking, and it was demonstrated that it can be used to estimate the circuit fidelity for global depolarizing noise and weakly correlated noise. For a quadratic postprocessing function, our framework recovered Google's result on estimating the circuit fidelity via linear cross-entropy benchmarking (XEB), and we gave a sufficient condition on the noise model characterizing when such estimation is valid. The results establish an interesting connection between ergodicity and noise in random circuits and provide new insights into designing quantum benchmarking schemes.

交叉熵基准测试是近年来对量子芯片进行认证的一种核心技术。为了更好地理解其数学基础和开发新的基准测试方案，将遍历性的概念引入随机电路采样，并发现Haar随机量子电路可以满足遍历性条件-某些类型的后处理函数在输出位串上的平均值接近于在幺正综上的平均值。对于无噪声随机电路，证明了当随机电路形成幺正的2t设计时，多项式t次的遍历性是成立的。对于足够强的噪声，遍历性条件被打破，这表明遍历性是一个可以用来认证量子芯片的特性。将遍频偏差作为量子芯片基准测试的一种度量，并证明了它可以用于估计全局去极化噪声和弱相关噪声下的电路保真度。对于二次后处理函数，我们的框架恢复了谷歌通过线性交叉熵基准（XEB）估计电路保真度的结果，并给出了噪声模型表征这种估计有效的充分条件。结果建立了随机电路中遍历性和噪声之间的有趣联系，并为设计量子基准方案提供了新的见解。

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引用次数: 0

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