Chip

Pub Date : 2025-09-01 Epub Date: 2025-03-06 DOI: 10.1016/j.chip.2025.100136

Ziliang Fang , Bingyu Chen , Rui Rong , Hanrong Xie , Manyan Xie , Haoran Guo , Yang Li , Fangheng Fu , Xu Ouyang , Yuming Wei , Gangding Peng , Tiefeng Yang , Huihui Lu , Heyuan Guan

Human vision–inspired neuromorphic devices have integrated architectures that combine sensing, computing, and storage functions, which can fundamentally avoid the energy waste caused by frequent data movement in the currently widely used von Neumann architecture, and have crucial application potential in advanced artificial intelligence chips that pursue low power consumption and low latency. However, previously reported visual neuromorphic devices either suffer complex floating gate, vertically stacked multilayer structures, or necessitate separated optical-sensing and synaptic units, realizing highly compact, non-volatile optoelectronic response and continuously tunable conductivity within a sententious architecture remains a significant challenge. Here, we presented a low-cost exfoliation and transfer method combined with spin-coating to fabricate molybdenum disulfide (MoS₂)/barium titanate (BaTiO₃) heterostructured optoelectronic devices. Based on the ferroelectricity of BaTiO₃ and the charge transport characteristics of MoS₂, the hysteresis of ferroelectric polarization upon both electric and optical stimulation is successfully endowed with reliable resistance state switching abilities, showing the advantages of low bias voltage operation (±2 V) and distinct 16 conductance states under light pulse irradiation. Besides, the MoS₂/BaTiO₃ device can be further used to emulate biological synaptic behavior and accomplish the transition from short-term memory (STM) to long-term memory (LTM). Notably, leveraging the dual characteristics of imaging and neuromorphic behavior, we constructed a multi-layer perceptron network integrating visual perception and image recognition, showing an accuracy of 97.6% in the Modified National Institute of Standards and Technology (MNIST) pattern recognition task. This work introduced a simple MoS₂/BaTiO₃ heterojunction architecture device, offering integrated perception, storage, and computing capabilities, providing a new possibility for future compact neuromorphic computing devices.

人类视觉启发的神经形态器件具有传感、计算和存储功能相结合的集成架构，可以从根本上避免目前广泛使用的von Neumann架构中频繁移动数据造成的能量浪费，在追求低功耗、低延迟的高级人工智能芯片中具有至关重要的应用潜力。然而，先前报道的视觉神经形态器件要么采用复杂的浮栅、垂直堆叠的多层结构，要么需要分离的光传感和突触单元，在简洁的结构中实现高度紧凑、非易失性的光电响应和连续可调的电导率仍然是一个重大挑战。在这里，我们提出了一种低成本的剥离和转移方法，结合自旋涂层来制备二硫化钼(MoS2)/钛酸钡（BaTiO3）异质结构光电器件。基于BaTiO3的铁电性和MoS2的电荷输运特性，成功地赋予了铁电极化滞后在电和光刺激下具有可靠的电阻状态切换能力，显示出在光脉冲照射下低偏置电压（±2 V）和不同电导状态的优势。此外，MoS2/BaTiO3器件还可进一步用于模拟生物突触行为，实现短时记忆（STM）向长时记忆（LTM）的过渡。值得注意的是，利用成像和神经形态行为的双重特征，我们构建了一个集成视觉感知和图像识别的多层感知器网络，在修改的美国国家标准与技术研究所（MNIST）模式识别任务中显示出97.6%的准确率。这项工作引入了一个简单的MoS2/BaTiO3异质结架构器件，提供集成的感知、存储和计算能力，为未来紧凑的神经形态计算器件提供了新的可能性。

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引用次数: 0

Polarization reversal enhanced intelligent recognition in two-dimensional MoTe2/GeSe heterostructure 极化反转增强了二维MoTe2/GeSe异质结构的智能识别

Chip

Pub Date : 2025-09-01 Epub Date: 2025-03-27 DOI: 10.1016/j.chip.2025.100143

Ling Bai , Ziting Yang , Jie Wen , Zifeng Mai , Bin Liu , Duanyang Liu , Penghong Ci , Liyuan Liu , Yiyang Xie , Ziqi Zhou , Yali Yu , Zhongming Wei

Wide-spectral and polarization-sensitive photodetectors are vital for applications in imaging, communication, and intelligent sensing. Although two-dimensional (2D) materials have shown great promise in enhancing the performance of these devices, conventional methods for spectral discrimination often rely on complex designs, such as external filters or multisensor systems, increasing system cost and complexity. Developing simplified devices that integrate spectral and polarization detection remains a key challenge. Here, we demonstrated a 2D MoTe₂/GeSe-based photodetector with wide-spectral photoresponse (400 to 1064 nm) and polarization sensitivity, achieving a responsivity of 1.35 A W⁻¹ and a polarization ratio of 2.23 under 808 nm illumination. The device exhibited a unique 90° polarization reversal between green (532 nm) and red (808 nm), providing a novel mechanism for spectral discrimination. First-principles calculations reveal the polarization reversal phenomenon based on the heterostructure's optical anisotropy. Furthermore, integration with a convolutional neural network enables intelligent traffic signal recognition using polarization-sensitive images. This work highlights the potential of MoTe₂/GeSe heterostructures for next-generation photodetectors, offering compact, multifunctional solutions with integrated spectral and polarization discrimination capabilities.

宽光谱和偏振敏感的光电探测器在成像、通信和智能传感领域的应用至关重要。尽管二维（2D）材料在提高这些器件的性能方面显示出巨大的希望，但传统的光谱识别方法通常依赖于复杂的设计，例如外部滤波器或多传感器系统，从而增加了系统成本和复杂性。开发集成光谱和偏振检测的简化设备仍然是一个关键挑战。在此，我们展示了一种基于MoTe2/ ges2的二维光电探测器，具有宽光谱光响应（400 ~ 1064 nm）和偏振灵敏度，在808 nm照明下实现了1.35 a W−1的响应率和2.23的偏振比。该器件在绿色（532 nm）和红色（808 nm）之间具有独特的90°偏振反转，为光谱识别提供了一种新的机制。第一性原理计算揭示了基于异质结构光学各向异性的极化反转现象。此外，与卷积神经网络的集成使使用偏振敏感图像的智能交通信号识别成为可能。这项工作强调了MoTe2/GeSe异质结构在下一代光电探测器中的潜力，它提供了紧凑、多功能的解决方案，具有集成的光谱和偏振识别能力。

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引用次数: 0

A high-performance tensor computing unit for deep learning acceleration 用于深度学习加速的高性能张量计算单元

Chip

Pub Date : 2025-06-01 Epub Date: 2025-03-28 DOI: 10.1016/j.chip.2025.100145

Qiang Zhou , Tieli Sun , Taoran Shen , York Xue

The increasing complexity of neural network applications has led to a demand for higher computational parallelism and more efficient synchronization in artificial intelligence (AI) chips. To achieve higher performance and lower power, a comprehensive and efficient approach is required to compile neural networks for implementation on dedicated hardware. Our first-generation deep learning accelerator, tensor computing unit, was presented with hardware and software solutions. It offered dedicated very long instruction words (VLIWs) instructions and multi-level repeatable direct memory access (DMA). The former lowers the instruction bandwidth requirement and makes it easier to parallelize the index and vector computations. The latter reduces the communication latency between the compute core and the asynchronous DMA, and also greatly alleviates the programming complexity. For operator implementation and optimization, the compiler-based data-flow generator and the instruction macro generator first produced a set of parameterized operators. Then, the tuner-configuration generator pruned the search space and the distributed tuner framework selected the best data-flow pattern and corresponding parameters. Our tensor computing unit supports all the convolution parameters with full-shape dimensions. It can readily select proper operators to achieve 96% of the chip peak performance under certain shapes and find the best performance implementation within limited power. The evaluation of a large number of convolution shapes on our tensor computing unit chip shows the generated operators significantly outperform the hand-written ones, achieving 9% higher normalized performance than CUDA according to the silicon data.

随着神经网络应用的日益复杂，人工智能（AI）芯片对更高的计算并行性和更高效的同步提出了要求。为了实现更高的性能和更低的功耗，需要一种全面有效的方法来编译神经网络以在专用硬件上实现。我们的第一代深度学习加速器张量计算单元给出了硬件和软件解决方案。它提供专用的超长指令字（VLIWs）指令和多级可重复直接存储器访问（DMA）。前者降低了指令带宽要求，使索引和矢量计算更容易并行化。后者减少了计算核心与异步DMA之间的通信延迟，也大大减轻了编程的复杂性。为了实现和优化运算符，基于编译器的数据流生成器和指令宏生成器首先生成一组参数化的运算符。然后，调谐器组态生成器对搜索空间进行剪枝，分布式调谐器框架选择最佳数据流模式和相应参数。我们的张量计算单元支持所有具有全形状维度的卷积参数。它可以很容易地选择合适的算子，在一定的形状下达到96%的芯片峰值性能，并在有限的功率下找到最佳的性能实现。在我们的张量计算单元芯片上对大量卷积形状的评估表明，生成的运算符明显优于手写运算符，根据硅数据，其归一化性能比CUDA高9%。

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引用次数: 0

Self-powered asymmetric Schottky photodetector integrated with thin-film lithium niobate waveguide 集成薄膜铌酸锂波导的自供电非对称肖特基光电探测器

Chip

Pub Date : 2025-06-01 Epub Date: 2025-01-14 DOI: 10.1016/j.chip.2025.100128

Youtian Hu , Qingyun Li , Fan Yang , Jing Hu , Ximing Li , Jiale Ou , Zhenjun Zang , Bangyi Zhu , Qinyu Zeng , Huangpu Han , Yujie Ma , Wang Zhang , Shuangchen Ruan , Bingxi Xiang

Thin-film lithium niobate (TFLN) is considered a crucial platform in next-generation integrated optoelectronics due to its excellent optical properties. Photodetectors are essential components for constructing fully functional photonic circuits. However, due to the low electrical conductivity and weak light absorption, TFLN cannot be directly used for fabricating photodetectors. In this study, we proposed and demonstrated a high-performance MoTe₂/TFLN heterostructure integrated Schottky photodetector operating at telecommunication wavelengths (1310 nm and 1550 nm). This structure enhances the photovoltaic effect by bending MoTe₂ at the edge of one electrode, thereby achieving self-powered operation. At a wavelength of 1310 nm, the photodetector achieves a self-powered responsivity of 70 mA/W, which is among the highest for waveguide-integrated photodetectors. Additionally, due to the strong rectification effect of the Schottky junction, the photodetector exhibits an extremely low dark current of only 25 pA at −0.5 V bias voltage. The on/off ratios reach 2.6 × 10⁴ at 0 V and 4.1 × 10⁴ at −0.5 V bias. The self-powered response times were measured, showing fast response and recovery times of 160 μs and 169 μs, respectively.

薄膜铌酸锂（TFLN）由于其优异的光学性能被认为是下一代集成光电子技术的重要平台。光电探测器是构建全功能光子电路必不可少的元件。然而，由于TFLN的电导率低，光吸收弱，不能直接用于制造光电探测器。在这项研究中，我们提出并展示了一种高性能的MoTe2/TFLN异质结构集成肖特基光电探测器，工作在电信波长（1310 nm和1550 nm）。这种结构通过在一个电极边缘弯曲MoTe2来增强光伏效应，从而实现自供电操作。在1310 nm波长处，光电探测器实现了70 mA/W的自供电响应，这是波导集成光电探测器中最高的。此外，由于肖特基结的强整流效应，光电探测器在- 0.5 V偏置电压下显示出极低的暗电流，仅为25 pA。开关比在0 V时达到2.6 × 104，在- 0.5 V时达到4.1 × 104。测量了自供电响应时间，快速响应时间为160 μs，恢复时间为169 μs。

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引用次数: 0

SOT-MRAM-based true in-memory computing architecture for approximate multiplication 基于sot - mram的真正内存计算架构，用于近似乘法

Chip

Pub Date : 2025-06-01 Epub Date: 2025-03-05 DOI: 10.1016/j.chip.2025.100134

Min Song , Qilong Tang , Xintong Ouyang , Wei Duan , Yan Xu , Shuai Zhang , Long You

The in-memory computing (IMC) paradigm emerges as an effective solution to break the bottlenecks of conventional von Neumann architecture. In the current work, an approximate multiplier in spin-orbit torque magnetoresistive random access memory (SOT-MRAM) based true IMC (STIMC) architecture was presented, where computations were performed natively within the cell array instead of in peripheral circuits. Firstly, basic Boolean logic operations were realized by utilizing the feature of unipolar SOT device. Two majority gate-based imprecise compressors and an ultra-efficient approximate multiplier were then built to reduce the energy and latency. An optimized data mapping strategy facilitating bit-serial operations with an extensive degree of parallelism was also adopted. Finally, the performance enhancements by performing our approximate multiplier in image smoothing were demonstrated. Detailed simulation results show that the proposed 8 × 8 approximate multiplier could reduce the energy and latency at least by 74.2% and 44.4% compared with the existing designs. Moreover, the scheme could achieve improved peak signal-to-noise ratio (PSNR) and structural similarity index metric (SSIM), ensuring high-quality image processing outcomes.

内存计算（IMC）范式作为打破传统冯·诺依曼架构瓶颈的有效解决方案而出现。在当前的工作中，提出了一种基于自旋轨道转矩磁阻随机存取存储器（SOT-MRAM）的近似乘法器，该乘法器的计算在单元阵列内进行，而不是在外围电路中进行。首先，利用单极性SOT器件的特性，实现了基本的布尔逻辑运算；然后构建了两个基于多数门的不精确压缩器和一个超高效近似乘法器，以减少能量和延迟。采用了一种优化的数据映射策略，使位串行操作具有广泛的并行度。最后，演示了在图像平滑中使用近似乘法器的性能增强。详细的仿真结果表明，与现有设计相比，所提出的8 × 8近似乘法器的能量和时延分别降低了74.2%和44.4%。此外，该方案可以提高峰值信噪比（PSNR）和结构相似度指标（SSIM），保证高质量的图像处理结果。

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引用次数: 0

Generalized cross-entropy benchmarking for random circuits with ergodicity 遍历随机电路的广义交叉熵基准

Chip

Pub Date : 2025-06-01 Epub Date: 2025-01-16 DOI: 10.1016/j.chip.2025.100127

Bin Cheng , Fei Meng , Zhi-Jiong Zhang , Man-Hong Yung

Cross-entropy benchmarking is a central technique adopted to certify a quantum chip in recent investigations. To better understand its mathematical foundation and develop new benchmarking schemes, the concept of ergodicity was introduced to random circuit sampling and it was found that the Haar random quantum circuit could satisfy an ergodicity condition—the average of certain types of postprocessing function over the output bit strings is close to the average over the unitary ensemble. For noiseless random circuits, it was proven that the ergodicity holds for polynomials of degree t with positive coefficients when the random circuits form a unitary 2t-design. For strong enough noise, the ergodicity condition is violated, which suggests that ergodicity is a property that can be exploited to certify a quantum chip. The deviation of ergodicity was formulated as a measure for quantum chip benchmarking, and it was demonstrated that it can be used to estimate the circuit fidelity for global depolarizing noise and weakly correlated noise. For a quadratic postprocessing function, our framework recovered Google's result on estimating the circuit fidelity via linear cross-entropy benchmarking (XEB), and we gave a sufficient condition on the noise model characterizing when such estimation is valid. The results establish an interesting connection between ergodicity and noise in random circuits and provide new insights into designing quantum benchmarking schemes.

交叉熵基准测试是近年来对量子芯片进行认证的一种核心技术。为了更好地理解其数学基础和开发新的基准测试方案，将遍历性的概念引入随机电路采样，并发现Haar随机量子电路可以满足遍历性条件-某些类型的后处理函数在输出位串上的平均值接近于在幺正综上的平均值。对于无噪声随机电路，证明了当随机电路形成幺正的2t设计时，多项式t次的遍历性是成立的。对于足够强的噪声，遍历性条件被打破，这表明遍历性是一个可以用来认证量子芯片的特性。将遍频偏差作为量子芯片基准测试的一种度量，并证明了它可以用于估计全局去极化噪声和弱相关噪声下的电路保真度。对于二次后处理函数，我们的框架恢复了谷歌通过线性交叉熵基准（XEB）估计电路保真度的结果，并给出了噪声模型表征这种估计有效的充分条件。结果建立了随机电路中遍历性和噪声之间的有趣联系，并为设计量子基准方案提供了新的见解。

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引用次数: 0

Advances in piezotronics and piezo-phototronics of two-dimensional semiconductor materials 二维半导体材料的压电电子学和压电光电子学研究进展

Chip

Pub Date : 2025-06-01 Epub Date: 2025-01-30 DOI: 10.1016/j.chip.2025.100131

Yitong Wang , Fangpei Li , Wenbo Peng , Yongning He

High-performance electronics and optoelectronics play vital roles in modern society, as they are the fundamental building blocks of functional devices and systems. Two-dimensional semiconductor materials (2D-SCMs) are potential candidates for high-performance electronics and optoelectronics due to their excellent physical, chemical, electrical, and photonic properties. Owing to their special crystalline structure, they also present unique piezoelectricity, which opens a new door to the innovative fields of piezotronics and piezo-phototronics. Piezotronics and piezo-phototronics utilize the piezoelectric polarization charges produced when the 2D-SCMs undergo externally applied strains/stresses to modulate the performance of 2D-SCMs-based electronics and optoelectronics. In this review, firstly, the growth methods and piezoelectric properties of 2D-SCMs are stated, and the mechanisms of piezotronics and piezo-phototronics are also introduced. Afterwards, the recent progress of piezotronics and piezo-phototronics in high-performance 2D-SMCs-based electronics and optoelectronics are systematically reviewed. In addition, the functional devices and systems based on the piezotronics and piezo-phototronics in 2D-SMCs have been summarized. Finally, the research progresses are summarized, and future perspectives are proposed.

高性能电子学和光电子学在现代社会中发挥着至关重要的作用，因为它们是功能器件和系统的基本组成部分。二维半导体材料（2d - scm）由于其优异的物理、化学、电学和光子特性而成为高性能电子学和光电子学的潜在候选者。由于其特殊的晶体结构，它们也呈现出独特的压电性，这为压电电子学和压电光电子学的创新领域打开了新的大门。压电电子学和压电光电子学利用2d - scm经受外部施加应变/应力时产生的压电极化电荷来调节基于2d - scm的电子学和光电子学的性能。本文首先介绍了2D-SCMs的生长方法和压电性能，并介绍了压电电子学和压电光电电子学的机理。随后，系统综述了压电电子学和压电光电子学在高性能二维smcs电子学和光电子学领域的最新进展。此外，对基于压电和压电光电子的二维smcs功能器件和系统进行了综述。最后，对研究进展进行了总结，并对未来的研究方向进行了展望。

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引用次数: 0

Ferroelectric devices for artificial intelligence chips 用于人工智能芯片的铁电器件

Chip

Pub Date : 2025-06-01 Epub Date: 2025-01-25 DOI: 10.1016/j.chip.2025.100129

Jinshun Bi , Muhammad Faizan , Xuefei Liu , Yue Ma , Xu Wang , Viktor Stempitsky

The identification of ferroelectricity in oxides such as hafnium oxide, which are compatible with the contemporary semiconductor fabrication techniques, has contributed to a resurgence of ferroelectric devices in cutting-edge microelectronics. In a transistor structure, ferroelectric devices play the role of connecting a ferroelectric material to a semiconductor, which combines memory and logic operations at the level of a single device, thus meeting some of the most essential hardware requirements for new paradigms for artificial intelligence (A.I) chips. In this review, we addressed the issues associated with high-volume fabrication at advanced technology nodes (

\leq 10 nm)

at the material and device level. Moreover, we also reviewed the advancement of A.I chips such as neuro-inspired computer chips. For neuro-inspired A.I chips based on nonvolatile memory, four important metrics are suggested for benchmarking: computing density, energy efficiency, learning capability, and computing accuracy. It is inferred that ferroelectric devices can be a major hardware element in the design of future A.I chips, which will leads to an innovative approach to electronics that is termed ferroelectronics.

在氧化物（如氧化铪）中发现铁电性，这与当代半导体制造技术兼容，有助于在尖端微电子中铁电器件的复兴。在晶体管结构中，铁电器件起着将铁电材料连接到半导体的作用，半导体在单个器件的水平上结合了存储和逻辑操作，从而满足了人工智能（A.I）芯片新范式的一些最基本的硬件要求。在这篇综述中，我们解决了与材料和器件级先进技术节点（≤10nm）的大批量制造相关的问题。此外，我们还回顾了人工智能芯片的进展，如神经启发计算机芯片。对于基于非易失性存储器的神经启发的人工智能芯片，建议进行基准测试的四个重要指标：计算密度、能源效率、学习能力和计算精度。据推测，铁电器件可以成为未来人工智能芯片设计中的主要硬件元素，这将导致一种被称为铁电子学的创新电子方法。

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引用次数: 0

Zero-power self-aware microsystem platform enabled by passive acoustic switch 无源声开关实现零功耗自感知微系统平台

Chip

Pub Date : 2025-06-01 Epub Date: 2025-01-27 DOI: 10.1016/j.chip.2025.100130

Deng Yang , Xiaoqin Liu , Lingyun Zhang , Guozhe Xuan , Xiangzheng Sun , Jiahao Zhao

Long-term continuous monitoring is essential for the Internet of Things (IoT), with efficient power use and sustainable energy supply as core challenges. This study presents a MEMS-based self-holding acoustic switch designed for uninterrupted monitoring of specific acoustic signals with zero power consumption. Microelectromechanical systems (MEMS) refer to miniaturized devices that integrate mechanical and electrical components on a single microchip. A mathematical model is developed to analyze the switch's acoustic frequency response. Simulations and experiments demonstrate its acoustic-driven properties. Acoustic switches with different structural parameters are designed, achieving resonant frequencies ranging from 192 Hz to 862 Hz. Electrostatic voltages are applied to enable self-holding functionality, and the acoustic switch exhibits a contact resistance as low as 29.3 Ω. The acoustic switch successfully performs various functions, including acoustic sensing, frequency identification, on–off control, and self-holding, all without drawing power from an external power supply. By integrating this acoustic switch, a zero-power self-aware microsystem platform is realized, allowing zero-power sleep states without closed-loop circuits while remaining responsive to target acoustic signals. This technology effectively supports long-term, large-scale deployment of unattended IoT terminals.

长期持续监测对于物联网（IoT）至关重要，高效的电力使用和可持续的能源供应是核心挑战。本研究提出了一种基于mems的自持声开关，用于零功耗不间断监测特定的声信号。微机电系统（MEMS）是指将机械和电气元件集成在单个微芯片上的小型化设备。建立了分析开关声频响应的数学模型。仿真和实验验证了其声驱动特性。设计了不同结构参数的声开关，实现了192hz ~ 862hz的谐振频率。施加静电电压以实现自保持功能，声学开关的接触电阻低至29.3 Ω。声学开关在不需要外部电源供电的情况下，成功地完成了声学传感、频率识别、通断控制和自保持等功能。通过集成该声学开关，实现了零功耗自感知微系统平台，允许零功耗睡眠状态，无需闭环电路，同时保持对目标声学信号的响应。该技术有效支持无人值守物联网终端的长期大规模部署。

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引用次数: 0

16-channel photonic solver for optimization problems on a silicon chip 硅芯片上优化问题的16通道光子求解器

Chip

Pub Date : 2025-03-01 Epub Date: 2024-11-08 DOI: 10.1016/j.chip.2024.100117

Jiayi Ouyang , Shengping Liu , Ziyue Yang , Wei Wang , Xue Feng , Yongzhuo Li , Yidong Huang

A programmable photonic solver for quadratic unconstrained binary optimization (QUBO) problems is demonstrated with a hybrid optoelectronic scheme, which consists of a photonic chip and an electronic driving board. The photonic chip is employed to perform the optical vector-matrix multiplication (OVMM) to calculate the cost function of the QUBO problem, while the electronic processor runs the heuristic algorithm to search for the optimal solution. Due to the parallel and low-latency propagation of lightwaves, the calculation of the cost function can be accelerated. The photonic chip was fabricated on the silicon on insulator (SOI) substrate and integrated 16 high-speed electro-optic modulators, 88 thermo-optic phase shifters, and 16 balanced photodetectors. The computing speed of the photonic chip is 1.66 TFLOP/s. As a proof of principle, two randomly generated 16-dimensional QUBO problems are solved with high successful probabilities. These results present the potential of fast-solving optimization problems with integrated photonic systems.

提出了一种由光子芯片和电子驱动板组成的光电混合方案，用于二次型无约束二元优化问题的可编程光子求解器。利用光子芯片进行光学向量矩阵乘法（OVMM）计算QUBO问题的代价函数，电子处理器运行启发式算法搜索最优解。由于光波的并行传播和低延迟传播，可以加快代价函数的计算速度。该光子芯片由16个高速电光调制器、88个热光移相器和16个平衡光电探测器组成。该光子芯片的计算速度为1.66 TFLOP/s。作为一个原理证明，两个随机生成的16维QUBO问题都有很高的成功概率。这些结果显示了集成光子系统快速解决优化问题的潜力。

引用次数: 0

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