Chip最新文献

The mass production and the practical number of cryogenic quantum devices producible in a single chip are limited to the number of electrical contact pads and wiring of the cryostat or dilution refrigerator. It is, therefore, beneficial to contrast the measurements of hundreds of devices fabricated in a single chip in one cooldown process to promote the scalability, integrability, reliability, and reproducibility of quantum devices and to save evaluation time, cost and energy. Here, we used a cryogenic on-chip multiplexer architecture and investigated the statistics of the 0.7 anomaly observed on the first three plateaus of the quantized conductance of semiconductor quantum point contact (QPC) transistors. Our single chips contain 256 split gate field-effect QPC transistors (QFET) each, with two 16-branch multiplexed source-drain and gate pads, allowing individual transistors to be selected, addressed and controlled through an electrostatic gate voltage process. A total of 1280 quantum transistors with nano-scale dimensions are patterned in 5 different chips of GaAs heterostructures. From the measurements of 571 functioning QFETs taken at temperatures T = 1.4 K and T = 40 mK, it is found that the spontaneous polarisation model and Kondo effect do not fit our results. Furthermore, some of the features in our data largely agreed with van Hove model with short-range interactions. Our approach provides further insight into the quantum mechanical properties and microscopic origin of the 0.7 anomaly in QFETs, paving the way for the development of semiconducting quantum circuits and integrated cryogenic electronics, for scalable quantum logic control, readout, synthesis, and processing applications.

Silicon technology offers the enticing opportunity for monolithic integration of quantum and classical electronic circuits. However, the power consumption levels of classical electronics may compromise the local chip temperature and hence affect the fidelity of qubit operations. In the current work, a quantum-dot-based thermometer embedded in an industry-standard silicon field-effect transistor (FET) was adopted to assess the local temperature increase produced by an active FET placed in close proximity. The impact of both static and dynamic operation regimes was thoroughly investigated. When the FET was operated statically, a power budget of 45 nW at 100-nm separation was found, whereas at 216 μm, the power budget was raised to 150 μW. Negligible temperature increase for the switch frequencies tested up to 10 MHz was observed when operating dynamically. The current work introduced a method to accurately map out the available power budget at a distance from a solid-state quantum processor, and indicated the possible conditions under which cryoelectronics circuits may allow the operation of hybrid quantum–classical systems.

The commercially available 4000-Watt continuous-wave (CW) Erbium-doped-fiber laser, emitting at the 1567-nm wavelength where the atmosphere has high transmission, provides an opportunity for harvesting electric power at remote “off the grid” locations using a multi-module photovoltaic (PV) “receiver” panel. This paper proposes a 32-element monocrystalline thick-layer Germanium PV panel for efficient harvesting of a collimated 1.13-m-diam beam. The 0.78-m² PV panel is constructed from commercial Ge wafers. For incident CW laser-beam power in the 4000 to 10,000 W range, our thermal, electrical, and infrared simulations predict 660 to 1510 Watts of electrical output at the panel temperatures of 350 to 423 K.

Building communication links among multiple users in a scalable and robust way is a key objective in achieving large-scale quantum networks. In a realistic scenario, noise from the coexisting classical light is inevitable and can ultimately disrupt the entanglement. The previous significant fully connected multiuser entanglement distribution experiments are conducted using dark fiber links, and there is no explicit relation between the entanglement degradations induced by classical noise and its error rate. Here, a semiconductor chip with a high figure-of-merit modal overlap is fabricated to directly generate broadband polarization entanglement. The monolithic source maintains the polarization entanglement fidelity of above 96% for 42 nm bandwidth, with a brightness of 1.2 × 10⁷ Hz mW⁻¹. A continuously working quantum entanglement distribution are performed among three users coexisting with classical light. Under finite-key analysis, secure keys are established and images encryption are enabled as well as quantum secret sharing between users. This work paves the way for practical multiparty quantum communication with integrated photonic architecture compatible with real-world fiber optical communication network.

With the development of 5G technology and increasing chip integration, traditional active cooling methods struggle to meet the growing thermal demands of chips. Thermoelectric coolers (TECs) have garnered great attention due to their rapid response, significant cooling differentials, strong compatibility, high stability and controllable device dimensions. In this review, starting from the fundamental principles of thermoelectric cooling and device design, high-performance thermoelectric cooling materials are summarized, and the progress of advanced on-chip TECs is comprehensively reviewed. Finally, the paper outlines the challenges and opportunities in TEC design, performance and applications, laying great emphasis on the critical role of thermoelectric cooling in addressing the evolving thermal management requirements in the era of emerging chip technologies.

Two-dimensional metal chalcogenides have garnered significant attention as promising candidates for novel neuromorphic synaptic devices due to their exceptional structural and optoelectronic properties. However, achieving large-scale integration and practical applications of synaptic chips has proven to be challenging due to significant hurdles in materials preparation and the absence of effective nanofabrication techniques. In a recent breakthrough, we introduced a revolutionary allopatric defect-modulated Fe₇S₈@MoS₂ synaptic heterostructure, which demonstrated remarkable optoelectronic synaptic response capabilities. Building upon this achievement, our current study takes a step further by presenting a sulfurization-seeding synergetic growth strategy, enabling the large-scale and arrayed preparation of Fe₇S₈@MoS₂ heterostructures. Moreover, a three-dimensional vertical integration technique was developed for the fabrication of arrayed optoelectronic synaptic chips. Notably, we have successfully simulated the visual persistence function of the human eye with the adoption of the arrayed chip. Our synaptic devices exhibit a remarkable ability to replicate the preprocessing functions of the human visual system, resulting in significantly improved noise reduction and image recognition efficiency. This study might mark an important milestone in advancing the field of optoelectronic synaptic devices, which significantly prompts the development of mature integrated visual perception chips.

Tunneling-based static random-access memory (SRAM) devices have been developed to fulfill the demands of high density and low power, and the performance of SRAMs has also been greatly promoted. However, for a long time, there has not been a silicon based tunneling device with both high peak valley current ratio (PVCR) and practicality, which remains a gap to be filled. Based on the existing work, the current manuscript proposed the concept of a new silicon-based tunneling device, i.e., the silicon cross-coupled gated tunneling diode (Si XTD), which is quite simple in structure and almost completely compatible with mainstream technology. With technology computer aided design (TCAD) simulations, it has been validated that this type of device not only exhibits significant negative-differential-resistance (NDR) behavior with PVCRs up to 10⁶, but also possesses reasonable process margins. Moreover, SPICE simulation showed the great potential of such devices to achieve ultralow-power tunneling-based SRAMs with standby power down to 10⁻¹² W.

Detecting microwave signals over a wide frequency range is endowed with numerous advantages as it enables simultaneous transmission of a large amount of information and access to more spectrum resources. This capability is crucial for applications such as microwave communication, remote sensing and radar. However, conventional microwave receiving systems are limited by amplifiers and band-pass filters that can only operate efficiently in a specific frequency range. Typically, these systems can only process signals within a three-fold frequency range, which limits the data transfer bandwidth of the microwave communication systems. Developing novel atom-integrated microwave sensors, for example, radio-frequency (RF) chip–coupled Rydberg atomic receiver, provides opportunities for a large working bandwidth of microwave sensing at the atomic level. In the current work, an ultra-wide dual-band RF sensing scheme was demonstrated by space-division multiplexing two RF-chip-integrated atomic receiver modules. The system can simultaneously receive dual-band microwave signals that span a frequency range exceeding 6 octaves (300 MHz and 24 GHz). This work paves the way for multi-band microwave reception applications within an ultra-wide range by RF-chip-integrated Rydberg atomic sensor.