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2017 12th European Microwave Integrated Circuits Conference (EuMIC)最新文献

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High-efficiency watt-level MASMOS® power amplifier for LTE applications 用于LTE应用的高效率瓦级MASMOS®功率放大器
Pub Date : 2017-10-01 DOI: 10.23919/EUMC.2017.8231022
Fabien Mesquita, E. Kerhervé, A. Ghiotto, Y. Creveuil, M. Regis
This paper reports for the first time a power amplifier (PA) based on the recently proposed MASMOS® transistor. This PA complies with the long-term evolution (LTE) power level requirements while offering a high efficiency. The MASMOS® transistor, available in low-cost 180-nm standard CMOS process, provides a higher breakdown voltage compared to conventional CMOS transistors. Therefore, the MASMOS® transistor is of high interest as it is able to generate a Watt-level output power with high efficiency in the highest LTE-bands. A reconfigurable power cell, implementing resizable MASMOS® transistors and offering a discrete control of both the output power and the dc consumption is introduced. Based on this reconfigurable cell, a two-stage PA is designed. This PA exhibits a measured 30.2 dBm output power at 2.5 GHz with a gain and power-added efficiency (PAE) of 21.8 dB and 54% respectively.
本文首次报道了一种基于MASMOS晶体管的功率放大器(PA)。该PA符合长期演进(LTE)功率水平要求,同时提供高效率。MASMOS®晶体管采用低成本的180纳米标准CMOS工艺,与传统CMOS晶体管相比,可提供更高的击穿电压。因此,MASMOS®晶体管备受关注,因为它能够在最高lte频段内以高效率产生瓦级输出功率。介绍了一种可重构的功率电池,实现了可调整大小的MASMOS®晶体管,并提供了输出功率和直流功耗的离散控制。基于此可重构单元,设计了两级PA。该放大器在2.5 GHz下的测量输出功率为30.2 dBm,增益和功率附加效率(PAE)分别为21.8 dB和54%。
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引用次数: 1
Analysis of a thin film dielectric characterization method based on the impedance difference of two MIM capacitors 基于两个MIM电容器阻抗差的薄膜介质表征方法分析
Pub Date : 2017-10-01 DOI: 10.23919/EUMIC.2017.8230666
A. Niembro-Martin, D. Mercier, H. Sibuet, B. Dieppedale, C. Baret, C. Bonnard, C. Billard, P. Gardes, P. Poveda
This paper presents an analysis of a thin film dielectric characterization method based on the impedance difference of two circular capacitors. For the first time, an error study is detailed in order to define what the best case to use the method is. To illustrate the study, the method has been applied for two dielectrics with extremely different RF properties: silicon nitride (low permittivity and low loss tangent) and Barium Calcium Zirconate Titanate (very high permittivity and high loss tangent).
本文分析了一种基于两个圆形电容器阻抗差的薄膜介电特性表征方法。为了确定使用该方法的最佳情况,第一次对错误进行了详细的研究。为了说明该研究,该方法已应用于两种具有极端不同RF特性的介电体:氮化硅(低介电常数和低损耗切线)和锆钛酸钡钙(非常高介电常数和高损耗切线)。
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引用次数: 1
Scalable Ka band switch matrix in compact LTCC package for satellite communication application 可扩展的Ka波段开关矩阵在紧凑的LTCC封装卫星通信应用
Pub Date : 2017-10-01 DOI: 10.23919/EUMC.2017.8231032
A. Barigelli, F. Diaferia, P. Panfili, M. Scipioni, F. Vitulli, A. Biondi, D. Resca, F. Scappaviva, G. Nicolai, D. Di Gregorio
An advanced Ka-band (27.5–30 GHz) Solid State Switch Matrix, based on a high order scalability concept and high integration level has been developed under a Contract with the European Space Agency (ESA) for application in satellite communication. A 4×4 module demonstrator has been designed, manufactured and tested, as a building block of switch matrix scalable to very high order, up to 32 inputs × 32 outputs and more. The end goal is to prove the feasibility of an advanced highly integrated, low mass and cost effective Switch Matrix for use in future Ka-band multi-beam payloads for application either in low level redundancy rings or in flexible on-board channel to beam connectivity.
根据与欧洲航天局(ESA)签订的一份用于卫星通信的合同,基于高阶可扩展性概念和高集成度的先进ka波段(27.5-30 GHz)固态开关矩阵已经开发出来。已经设计,制造和测试了4×4模块演示器,作为可扩展到非常高阶的开关矩阵的构建块,最多可达32输入× 32输出等。最终目标是证明一种先进的高集成度、低质量和低成本的开关矩阵的可行性,用于未来的ka波段多波束有效载荷,用于低冗余环或灵活的机载信道到波束连接。
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引用次数: 2
Broadband multi-octave receiver from 1–32 GHz for monolithic integrated vector network analyzers (VNA) in SiGe-technology 用于sige技术的单片集成矢量网络分析仪(VNA)的1-32 GHz宽带多倍频程接收机
Pub Date : 2017-10-01 DOI: 10.23919/EUMIC.2017.8230657
M. Dietz, T. Girg, A. Bauch, K. Aufinger, A. Hagelauer, D. Kissinger, R. Weigel
For monolithically integrated vector network analyzers (VNA) a broadband multi-octave receiver is shown, which exhibit a very wide frequency range from 1–32 GHz. It consists out of a low noise amplifier (LNA) and an active mixer, followed by an output buffer. With the presented design, a maximum achievable conversion gain (CG) of 16.6 dBm can be reached. The main design-goal is a very flat deviation of the conversion gain over five octaves, which eases calibration of the VNA. To realize variable gain functionality, without losing much input matching, special attention is spent to the design and topology of a new extended gain-control circuit (VGC) is shown. A second VGC is implemented in the output buffer, to improve isolation for deactivated channels of the VNA. All bandwidth extension techniques will be explained in detail and flesh out by simulations. Furthermore, a matching lower than −10 dB is achieved between 1 GHz and 28 GHz. The noise figure NFdsb of the broadband receiver is between 4.6 and 5.8 dB for 4–32 GHz and the output-referred 1-dB-compression-point of 0.1–4.3 dBm from 2–32 GHz. The current consumption at a supply voltage of 3.3 V has a value of 66 mA.
对于单片集成矢量网络分析仪(VNA),展示了一个宽带多倍频程接收机,它具有1-32 GHz的非常宽的频率范围。它由一个低噪声放大器(LNA)和一个有源混频器组成,然后是一个输出缓冲器。采用所提出的设计,可以达到16.6 dBm的最大可实现转换增益(CG)。主要的设计目标是使转换增益的偏差在5个八度以上非常平坦,从而简化VNA的校准。为了实现可变增益功能,同时不损失太多的输入匹配,本文特别关注了一种新型扩展增益控制电路(VGC)的设计和拓扑结构。第二个VGC在输出缓冲区中实现,以改善VNA的未激活通道的隔离。所有的带宽扩展技术将通过仿真详细解释和充实。此外,在1 GHz和28 GHz之间实现了低于−10 dB的匹配。在4 - 32ghz频段,宽带接收机的噪声系数NFdsb在4.6 ~ 5.8 dB之间,在2 - 32ghz频段,输出参考的1db压缩点为0.1 ~ 4.3 dBm。供电电压为3.3 V时的电流消耗值为66 mA。
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引用次数: 0
Ultra-wideband signal generation at 300 GHz in a SiGe BiCMOS technology 在SiGe BiCMOS技术中产生300 GHz的超宽带信号
Pub Date : 2017-10-01 DOI: 10.23919/EUMIC.2017.8230679
S. Thomas, B. Welp, N. Pohl
In this paper an ultra high bandwidth signal generation MMIC is presented. Based on an fundamental oscillator working at 75 GHz followed by a two stage frequency quadrupler, an output frequency range from 231.2–309.1 GHz is achieved, resulting in an overall tuning range of almost 78 GHz. The maximum output power of the transmitter MMIC is −2.8 dBm with a power variation of 7.5 dB over the complete 78 GHz tuning range. In combination with a low phase noise of approx. −75 dBc/Hz @ 1 MHz offset of the 300 GHz output signal, various high resolution distance measurements or imaging applications especially in the field of industrial quality assurance or in-line process monitoring become possible. With a power consumption of the complete MMIC of 700 mW at a single supply voltage of 5 V the realization of low-power sensors for industrial use can be achieved. The use of the well-established B11HFC SiGe BiCMOS technology provided by Infineon Technologies AG allows a reliable and cost-effective production as well.
本文提出了一种超高带宽信号生成MMIC。基于一个工作在75 GHz的基频振荡器,然后是一个两级频率四倍器,实现了231.2-309.1 GHz的输出频率范围,从而使总体调谐范围接近78 GHz。发射机MMIC的最大输出功率为−2.8 dBm,在整个78 GHz调谐范围内功率变化为7.5 dB。结合低相位噪声约为。−75 dBc/Hz @ 1 MHz偏移300 GHz输出信号,各种高分辨率距离测量或成像应用,特别是在工业质量保证或在线过程监控领域成为可能。在5 V单电源电压下,完整MMIC的功耗为700 mW,可以实现工业用低功耗传感器。采用英飞凌提供的成熟的B11HFC SiGe BiCMOS技术,可以实现可靠且具有成本效益的生产。
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引用次数: 3
Load error correction for high power load dependent X-parameter measurements 高功率负载相关x参数测量的负载误差校正
Pub Date : 2017-10-01 DOI: 10.23919/EUMIC.2017.8230698
B. Pichler, N. Leder, G. Magerl, H. Arthaber
Models for active devices operating in a nonlinear regime are an indispensable tool for modern RF-circuit design. A popular class of large signal models are X-parameters which offer an accurate description of nonlinear devices. However, they require a specialized measurement setup. Typically nonlinear vector network analyzers (NVNA), are used to conduct the measurements required for an X-parameter model. In their standard configuration, these instruments cannot cope with the high power levels and typical impedances demanded by practically relevant nonlinear devices. So the test-set of an NVNA must be adapted, and tuners have to be added to manipulate the load condition. However, these additional components also add imperfections. This work elaborates how undesired port-mismatch induced by the tuners, and the resulting imperfect stimuli, as well as the corresponding systematic errors in the parameter extraction can be tackled. It explains how the imperfect stimuli can be characterized alongside standard measurements, which allows to correct systematic errors in the parameter extraction. Finally, this work compares the accuracy of this correction for a nonlinear circuit model as well as for a measured device.
非线性有源器件模型是现代射频电路设计中不可缺少的工具。一类流行的大信号模型是x参数,它提供了非线性器件的精确描述。然而,它们需要专门的测量设置。通常使用非线性矢量网络分析仪(NVNA)进行x参数模型所需的测量。在其标准配置中,这些仪器无法满足实际相关非线性器件所要求的高功率电平和典型阻抗。因此,必须调整NVNA的测试集,并且必须添加调谐器来操纵负载条件。然而,这些额外的组件也增加了缺陷。这项工作阐述了如何解决由调谐器引起的不期望的端口不匹配,以及由此产生的不完美刺激以及参数提取中相应的系统误差。它解释了不完美的刺激是如何与标准测量一起表征的,这允许在参数提取中纠正系统误差。最后,本文比较了非线性电路模型和测量器件的校正精度。
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引用次数: 1
A 100–145 GHz area-efficient power amplifier in a 130 nm SiGe technology 采用130纳米SiGe技术的100-145 GHz区域高效功率放大器
Pub Date : 2017-10-01 DOI: 10.23919/eumic.2017.8230713
M. Bao, Z. He, H. Zirath
A 6-stage, 8-way combining power amplifier (PA) in a 130 nm SiGe BiCMOS technology is designed and measured. This PA has an output power of 12.5–15.5 dBm in a frequency range from 100 GHz to 145 GHz, when the input power is about 2 dBm. The small signal gain is 19 dB and the maximum DC power consumption is 480 mW with a supply voltage of 1.87 V. The peak power added efficiency (PAE) is 6.4% in D-band. T-junctions are utilized to combine and divide millimeter-wave power. To reduce the PA's loss and chip area, neither a Wilkinson power combiner/divider nor a balun is applied. The chip size is 0.53 mm2 (0.26 mm2 without pads).
设计并测量了一种采用130 nm SiGe BiCMOS技术的6级8路组合功率放大器(PA)。在100ghz ~ 145ghz频率范围内,当输入功率为2dbm时,输出功率为12.5 ~ 15.5 dBm。小信号增益为19 dB,最大直流功耗为480 mW,电源电压为1.87 V。d波段的峰值功率增加效率(PAE)为6.4%。t型结用于毫米波功率的合并和分割。为了减少PA的损耗和芯片面积,既不使用威尔金森功率合并/分频器,也不使用平衡器。芯片尺寸为0.53 mm2(不含衬垫为0.26 mm2)。
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引用次数: 14
An 8.3 nW −72 dBm event driven IoE wake up receiver RF front end 8.3 nW−72 dBm事件驱动的IoE唤醒接收器射频前端
Pub Date : 2017-10-01 DOI: 10.23919/EUMIC.2017.8230664
J. Moody, Pouyan Bassirian, Abhishek Roy, Yukang Feng, Shuo Li, R. Costanzo, N. S. Barker, B. Calhoun, S. Bowers
This work presents an ultra-low power event driven wake-up receiver (WuRx) fabricated in a RF CMOS 130 nm process. The receiver consists of an off-chip lumped element matching network, an envelope detector, a decision circuit capable of detecting sub-mV baseband signal voltages and a clock source consuming 1.3 nW. This receiver has demonstrated a sensitivity of −72 dBm while consuming a total of 8.3 nW from 1 V and 0.65 V sources.
本研究提出了一种超低功耗事件驱动唤醒接收器(WuRx),采用射频CMOS 130纳米工艺制造。接收机由片外集总元件匹配网络、包络检测器、能检测亚毫伏基带信号电压的判决电路和功耗1.3 nW的时钟源组成。该接收器的灵敏度为- 72 dBm,同时从1 V和0.65 V源消耗总计8.3 nW。
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引用次数: 18
Integrated scalable and tunable RF CMOS SOI quadrature hybrid coupler 集成可扩展和可调谐RF CMOS SOI正交混合耦合器
Pub Date : 2017-10-01 DOI: 10.23919/EUMIC.2017.8230684
V. Knopik, B. Moret, E. Kerhervé
Hybrid is a key component in RF and Microwave design, and particularly for balanced power amplifier (PA). This paper describes a pragmatic approach of the quadrature hybrid component design, aligned with measurements. It considers the cell as a combination of 2 simple elements rather than X/4 lines. The hybrid becomes scalable to reach a given frequency, and can be optimized by adding simple small twisted cells. The main advantages are to keep the two input (or output) blocks perfectly in parallel, and to consider the distance between the two blocks as a first dimension parameter. The component can also be tunable over frequency. The form factor is rectangular, using 2 metal layers at least and can be easily integrated in silicon technologies. The typical insertion loss is below 0.7dB in H9SOIFEM at 5.85GHz and 14GHz, while tunability can extend the frequency by more than 25% at 28GHz in 28FDSOI.
混合电路是射频和微波设计的关键元件,尤其是平衡功率放大器(PA)。本文描述了一种实用的正交混合元件设计方法,并与测量结果相结合。它将单元格视为2个简单元素的组合,而不是X/4行。这种混合可以扩展到给定的频率,并且可以通过添加简单的小型扭曲单元来优化。其主要优点是保持两个输入(或输出)块完全平行,并将两个块之间的距离作为第一维参数考虑。该组件还可以在频率上进行调谐。它的外形是矩形的,至少使用了2层金属,可以很容易地集成到硅技术中。在5.85GHz和14GHz时,H9SOIFEM的典型插入损耗低于0.7dB,而在28GHz时,28FDSOI的可调性可将频率延长25%以上。
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引用次数: 15
A 24-GHz transceiver with RF power envelope digital control for automotive radar ICs 用于汽车雷达集成电路的具有射频功率包络数字控制的24ghz收发器
Pub Date : 2017-10-01 DOI: 10.23919/EUMIC.2017.8230656
G. Maiellaro, G. Alessi, A. Bruno, A. Calcagno, N. Micalizzi, A. Di Mauro, E. Susino, A. Scuderi, S. Scaccianoce
This paper presents a 24-GHz transceiver with power envelope digital control for automotive radar sensor applications. The transceiver features three I/Q low-noise receivers, an on-chip voltage-controlled oscillator, frequency divider and an amplification chain delivering 13-dBm output power from a 3.3-V supply voltage. The power digital circuit controls both the RF power on/off transitions and the output power duration in order to comply with emission mask, maximizing the usage of operating bandwidth. According to its features, this transceiver can be used in short- and medium-range automotive radar systems with fast-chirp modulation.
本文提出了一种用于汽车雷达传感器的功率包络数字控制的24ghz收发器。该收发器具有三个I/Q低噪声接收器,一个片上压控振荡器,分频器和放大链,从3.3 v电源电压提供13 dbm输出功率。功率数字电路控制射频电源的开/关转换和输出功率持续时间,以符合发射掩模,最大限度地利用工作带宽。根据其特点,该收发器可用于快速调频调制的中短程汽车雷达系统。
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引用次数: 3
期刊
2017 12th European Microwave Integrated Circuits Conference (EuMIC)
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