Pub Date : 2024-09-11DOI: 10.1109/TCPMT.2024.3453126
{"title":"IEEE Open Access Publishing","authors":"","doi":"10.1109/TCPMT.2024.3453126","DOIUrl":"10.1109/TCPMT.2024.3453126","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 8","pages":"1533-1533"},"PeriodicalIF":2.3,"publicationDate":"2024-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10676330","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142219831","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-10DOI: 10.1109/TCPMT.2024.3456768
J. C. Camacho-Arriaga;D. Cahue-Diaz;N. D. Herrera-Sandoval;J. A. Salazar-Torres;G. D. Conejo-Magaña
In this article, a new tunable LED chip-on-board (COB) module is designed, providing the opportunity to adjust the color temperature for warm or white lighting, depending on the activities carried out by the users. The distribution of LEDs on the metal core is analyzed to determine an appropriate operating temperature during operation. This thermal improvement is achieved by increasing the gap between the die chips on the metal core, which allows for an increased exposed area for convection. In addition, uniform lighting distribution is achieved in accordance with photometric tests conducted in an integrating sphere. A numerical model is proposed and solved using the finite element method (FEM) to predict the temperature distribution over the COB LED. Subsequently, a prototype of the COB module is manufactured to perform measurements and test its performance during operation. The measurements are conducted using an infrared (IR) camera and thermocouples to obtain temperature profiles and identify critical hot spots during operation. The numerical model is validated and confirmed to be a reliable tool for evaluating predicted temperature models. The prototype meets all the thermal and photometric parameters required for reliable operation.
本文设计了一种新型可调式 LED 芯片板载 (COB) 模块，可根据用户的活动调节色温，使其成为暖色或白色照明。对 LED 在金属芯上的分布进行分析，以确定运行期间的适当工作温度。通过增大金属芯上芯片之间的间隙，增加了对流的暴露面积，从而实现了热量的改善。此外，根据在积分球中进行的光度测试，实现了均匀的照明分布。我们提出了一个数值模型，并使用有限元法（FEM）进行求解，以预测 COB LED 的温度分布。随后，制造了 COB 模块的原型，以便在运行期间进行测量和性能测试。测量使用红外（IR）相机和热电偶来获取温度曲线，并确定运行过程中的关键热点。数值模型经过验证，确认是评估预测温度模型的可靠工具。原型符合可靠运行所需的所有热参数和光度参数。
{"title":"New Tunable LED With Improved Heat Dissipation on Chip-on-Board","authors":"J. C. Camacho-Arriaga;D. Cahue-Diaz;N. D. Herrera-Sandoval;J. A. Salazar-Torres;G. D. Conejo-Magaña","doi":"10.1109/TCPMT.2024.3456768","DOIUrl":"10.1109/TCPMT.2024.3456768","url":null,"abstract":"In this article, a new tunable LED chip-on-board (COB) module is designed, providing the opportunity to adjust the color temperature for warm or white lighting, depending on the activities carried out by the users. The distribution of LEDs on the metal core is analyzed to determine an appropriate operating temperature during operation. This thermal improvement is achieved by increasing the gap between the die chips on the metal core, which allows for an increased exposed area for convection. In addition, uniform lighting distribution is achieved in accordance with photometric tests conducted in an integrating sphere. A numerical model is proposed and solved using the finite element method (FEM) to predict the temperature distribution over the COB LED. Subsequently, a prototype of the COB module is manufactured to perform measurements and test its performance during operation. The measurements are conducted using an infrared (IR) camera and thermocouples to obtain temperature profiles and identify critical hot spots during operation. The numerical model is validated and confirmed to be a reliable tool for evaluating predicted temperature models. The prototype meets all the thermal and photometric parameters required for reliable operation.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 10","pages":"1737-1743"},"PeriodicalIF":2.3,"publicationDate":"2024-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142219834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-09DOI: 10.1109/TCPMT.2024.3456228
Yuling Shang;Longlu Geng;Chunquan Li;Zhuofan Song;Gefei Duan;Jintao Zhang;Junji Li
Three-dimensional stacked integration based on through-silicon via (TSV) meets the high-speed development requirements of integrated circuits (ICs). However, TSV is a sensitive unit prone to manufacturing defects, with common faults being void faults and leakage faults. When TSV exhibits multifault, such as simultaneous resistive void fault and current leakage fault, the reliability of 3-D ICs is significantly reduced compared to single faults. To address this, this article proposes a TSV multifault testing method based on a Gramian angular field (GAF), deep residual shrinking network (DRSN), and a mirror constant current source structure. The mirror constant current source circuit is initially designed in the method, with the load structure being TSV and TSV charge/discharge rates are measured as testing parameters. Then, the GAF is employed to transform the acquired charge/discharge signals into 2-D images. Ultimately, the DRSN model should be applied to precisely detect faults in the transformed TSV images representing different fault types. The results demonstrate the effectiveness of the proposed method in classifying TSV fault types, with an average accuracy exceeding 98%. The method exhibits notable advantages, including high accuracy and robust generalization capabilities.
{"title":"A Multifault Testing Method for TSVs Based on GAF-DRSN and Mirror Constant Current Source Structure","authors":"Yuling Shang;Longlu Geng;Chunquan Li;Zhuofan Song;Gefei Duan;Jintao Zhang;Junji Li","doi":"10.1109/TCPMT.2024.3456228","DOIUrl":"10.1109/TCPMT.2024.3456228","url":null,"abstract":"Three-dimensional stacked integration based on through-silicon via (TSV) meets the high-speed development requirements of integrated circuits (ICs). However, TSV is a sensitive unit prone to manufacturing defects, with common faults being void faults and leakage faults. When TSV exhibits multifault, such as simultaneous resistive void fault and current leakage fault, the reliability of 3-D ICs is significantly reduced compared to single faults. To address this, this article proposes a TSV multifault testing method based on a Gramian angular field (GAF), deep residual shrinking network (DRSN), and a mirror constant current source structure. The mirror constant current source circuit is initially designed in the method, with the load structure being TSV and TSV charge/discharge rates are measured as testing parameters. Then, the GAF is employed to transform the acquired charge/discharge signals into 2-D images. Ultimately, the DRSN model should be applied to precisely detect faults in the transformed TSV images representing different fault types. The results demonstrate the effectiveness of the proposed method in classifying TSV fault types, with an average accuracy exceeding 98%. The method exhibits notable advantages, including high accuracy and robust generalization capabilities.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 10","pages":"1744-1752"},"PeriodicalIF":2.3,"publicationDate":"2024-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142219835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-05DOI: 10.1109/tcpmt.2024.3453209
Riadh Al-Haidari, Dylan Richmond, Abdullah Obeidat, Mohammed Alhendi, El Mehdi Abbara, Udara S. Somarathna, Mark Poliks, Arun V. Gowda, Jeff Erlbaum, Han Xiong, Collin Hitchcock
{"title":"SiC Power Module Packaging Using Printed Electronics Materials and Processes","authors":"Riadh Al-Haidari, Dylan Richmond, Abdullah Obeidat, Mohammed Alhendi, El Mehdi Abbara, Udara S. Somarathna, Mark Poliks, Arun V. Gowda, Jeff Erlbaum, Han Xiong, Collin Hitchcock","doi":"10.1109/tcpmt.2024.3453209","DOIUrl":"https://doi.org/10.1109/tcpmt.2024.3453209","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"8 1","pages":""},"PeriodicalIF":2.2,"publicationDate":"2024-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142219838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-05DOI: 10.1109/TCPMT.2024.3454991
Mingu Jeon;In-Ho Choi;Seung-Woo Seo;Seong-Woo Kim
With advancements in precise semiconductor manufacturing processes, a new category of anomalies has increasingly emerged. However, due to the probability of an abnormal occurrence during the semiconductor bonding process being less than 1 in 10 million, conventional statistical methods and supervised learning-based neural networks face significant limitations in detecting these anomalies. To address this, several data augmentation techniques have been proposed, yet they fail to ensure the similarity of the augmented time-series data. In response, this study proposes a time-series data augmentation method using digital twins to address the extreme class imbalance problem and presents a pipeline that incorporates this method with an autoencoder-based anomaly detection approach. A robotic arm for the bonding process of nonductile materials was designed to closely mimic the actual process, reflecting the physical properties of the robotic arm, nonductile materials, and particles. The effectiveness of this approach was validated by applying the optimized anomaly score threshold derived from the augmented data to detect anomalies in the actual manufacturing process. This study not only presents an anomaly detection method capable of selecting the most representative patterns from numerous normal samples for comparison with abnormal data but also offers valuable insights into addressing the challenge of detecting extremely rare anomalies.
{"title":"Extremely Rare Anomaly Detection Pipeline in Semiconductor Bonding Process With Digital Twin-Driven Data Augmentation Method","authors":"Mingu Jeon;In-Ho Choi;Seung-Woo Seo;Seong-Woo Kim","doi":"10.1109/TCPMT.2024.3454991","DOIUrl":"10.1109/TCPMT.2024.3454991","url":null,"abstract":"With advancements in precise semiconductor manufacturing processes, a new category of anomalies has increasingly emerged. However, due to the probability of an abnormal occurrence during the semiconductor bonding process being less than 1 in 10 million, conventional statistical methods and supervised learning-based neural networks face significant limitations in detecting these anomalies. To address this, several data augmentation techniques have been proposed, yet they fail to ensure the similarity of the augmented time-series data. In response, this study proposes a time-series data augmentation method using digital twins to address the extreme class imbalance problem and presents a pipeline that incorporates this method with an autoencoder-based anomaly detection approach. A robotic arm for the bonding process of nonductile materials was designed to closely mimic the actual process, reflecting the physical properties of the robotic arm, nonductile materials, and particles. The effectiveness of this approach was validated by applying the optimized anomaly score threshold derived from the augmented data to detect anomalies in the actual manufacturing process. This study not only presents an anomaly detection method capable of selecting the most representative patterns from numerous normal samples for comparison with abnormal data but also offers valuable insights into addressing the challenge of detecting extremely rare anomalies.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 10","pages":"1891-1902"},"PeriodicalIF":2.3,"publicationDate":"2024-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142219836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Bonding wires are extensively used in microelectronic package, providing electrical and mechanical interconnections. However, the bonding wire failure is one of the main failure modes during chip operation, which will result in radiation leakage. Accordingly, in this current work, the impact of bonding wire failure on near-field radiation is investigated by theoretical modeling and experimental testing. A 3-D electromagnetic field model of a signal transmission channel with failed bonding wires is developed to analyze the near-field electric radiation intensity and near-field magnetic radiation intensity. A series of experimental tests are conducted to validate the electromagnetic field model. The transfer functions of near-field test systems are also discussed and calculated to compare the simulated near-field radiation intensities and measured voltages. In addition, various topologies of the bonding wires on near-field radiation were also analyzed and discussed in this work, including the configuration of the bonding wire areas, the size of the bonding wire area, and the number of the bonding wires in each area. The results of this study provide a better understanding of the effect of bonding wire failure on near-field radiation and theoretical support for improving the electromagnetic compatibility in the electronic system.
{"title":"The Impact of Bonding Wire Failure in Microelectronic Package on Near-Field Radiation","authors":"Tianmeng Zhang;Jinchun Gao;Wenjia Wang;Ziren Wang;Chaoyi Wang;Ziyang Zhang","doi":"10.1109/TCPMT.2024.3454166","DOIUrl":"10.1109/TCPMT.2024.3454166","url":null,"abstract":"Bonding wires are extensively used in microelectronic package, providing electrical and mechanical interconnections. However, the bonding wire failure is one of the main failure modes during chip operation, which will result in radiation leakage. Accordingly, in this current work, the impact of bonding wire failure on near-field radiation is investigated by theoretical modeling and experimental testing. A 3-D electromagnetic field model of a signal transmission channel with failed bonding wires is developed to analyze the near-field electric radiation intensity and near-field magnetic radiation intensity. A series of experimental tests are conducted to validate the electromagnetic field model. The transfer functions of near-field test systems are also discussed and calculated to compare the simulated near-field radiation intensities and measured voltages. In addition, various topologies of the bonding wires on near-field radiation were also analyzed and discussed in this work, including the configuration of the bonding wire areas, the size of the bonding wire area, and the number of the bonding wires in each area. The results of this study provide a better understanding of the effect of bonding wire failure on near-field radiation and theoretical support for improving the electromagnetic compatibility in the electronic system.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 10","pages":"1803-1815"},"PeriodicalIF":2.3,"publicationDate":"2024-09-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142219840","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-02DOI: 10.1109/TCPMT.2024.3453597
Arifuzzaman Arif Sheikh;Edwin K. P. Chong;Steven J. Simske
This article investigates the application of text analytics for defect detection and characterization in electronics manufacturing of printed circuit board assembly by analyzing structured and unstructured textual data from circuit board and packaged chip testing. Traditional defect detection methods often overlook the valuable insights found in unstructured textual observations recorded by technicians and engineers during manufacturing processes. This research leverages text analytics to transform these descriptive narratives into structured, actionable data, thereby improving the precision and efficiency of defect identification. A Naïve Bayes model was employed for classification, and natural language processing (NLP) techniques were utilized to extract meaningful patterns from defect descriptions. The results indicate high classification accuracy for components, such as “capacitor,” “FPGA,” and “resistor,” while also identifying challenges in distinguishing “capacitor” from “transistor.” The expected outcomes of this research include the enhancement of defect detection precision and efficiency, leading to more effective quality control processes in electronics manufacturing. This study highlights the integration gap in real-time text analytics and demonstrates the potential of machine learning algorithms in manufacturing defect characterization, offering actionable insights for optimizing quality control strategies.
{"title":"Enhancing Defect Detection in Circuit Board Assembly Using AI and Text Analytics for Component Failure Classification","authors":"Arifuzzaman Arif Sheikh;Edwin K. P. Chong;Steven J. Simske","doi":"10.1109/TCPMT.2024.3453597","DOIUrl":"10.1109/TCPMT.2024.3453597","url":null,"abstract":"This article investigates the application of text analytics for defect detection and characterization in electronics manufacturing of printed circuit board assembly by analyzing structured and unstructured textual data from circuit board and packaged chip testing. Traditional defect detection methods often overlook the valuable insights found in unstructured textual observations recorded by technicians and engineers during manufacturing processes. This research leverages text analytics to transform these descriptive narratives into structured, actionable data, thereby improving the precision and efficiency of defect identification. A Naïve Bayes model was employed for classification, and natural language processing (NLP) techniques were utilized to extract meaningful patterns from defect descriptions. The results indicate high classification accuracy for components, such as “capacitor,” “FPGA,” and “resistor,” while also identifying challenges in distinguishing “capacitor” from “transistor.” The expected outcomes of this research include the enhancement of defect detection precision and efficiency, leading to more effective quality control processes in electronics manufacturing. This study highlights the integration gap in real-time text analytics and demonstrates the potential of machine learning algorithms in manufacturing defect characterization, offering actionable insights for optimizing quality control strategies.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 10","pages":"1881-1890"},"PeriodicalIF":2.3,"publicationDate":"2024-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142219844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-09-02DOI: 10.1109/TCPMT.2024.3453169
Xingchen Li;Xiaofan Jia;Joon Woo Kim;Serhat Erdogan;Kyoung-Sik Moon;Matthew B. Jordan;Madhavan Swaminathan
This article presents a multiple-die-embedded glass package that supports a thermal management solution for millimeter-wave (mmWave) applications. The package includes dies with different thicknesses embedded into isolated cavities created on a single glass substrate. In the package, partial cavities are used for embedding thin and low-power chips as well as passive components, while through cavities are used for thick and high-power chips. Connection to the embedded dies is facilitated through via transitions and transmission lines. Thermal management is integrated on the backside of the dies embedded in through cavities. This article discusses the design of interconnects along with the fabrication process for the package. The measured package broadband interconnect loss is less than 1 dB/mm from 40 MHz to 80 GHz, with a panel warpage of $145~mu $ m at $30~^{circ }$ C. A cross section of the package is also presented. The multidie-embedded glass package exhibits low-loss broadband performance and the ability to integrate thermal solutions, suggesting significant potential for module-level mmWave applications.
{"title":"Glass Package With Multiple Embedded Dies for mmWave Applications","authors":"Xingchen Li;Xiaofan Jia;Joon Woo Kim;Serhat Erdogan;Kyoung-Sik Moon;Matthew B. Jordan;Madhavan Swaminathan","doi":"10.1109/TCPMT.2024.3453169","DOIUrl":"10.1109/TCPMT.2024.3453169","url":null,"abstract":"This article presents a multiple-die-embedded glass package that supports a thermal management solution for millimeter-wave (mmWave) applications. The package includes dies with different thicknesses embedded into isolated cavities created on a single glass substrate. In the package, partial cavities are used for embedding thin and low-power chips as well as passive components, while through cavities are used for thick and high-power chips. Connection to the embedded dies is facilitated through via transitions and transmission lines. Thermal management is integrated on the backside of the dies embedded in through cavities. This article discusses the design of interconnects along with the fabrication process for the package. The measured package broadband interconnect loss is less than 1 dB/mm from 40 MHz to 80 GHz, with a panel warpage of \u0000<inline-formula> <tex-math>$145~mu $ </tex-math></inline-formula>\u0000m at \u0000<inline-formula> <tex-math>$30~^{circ }$ </tex-math></inline-formula>\u0000C. A cross section of the package is also presented. The multidie-embedded glass package exhibits low-loss broadband performance and the ability to integrate thermal solutions, suggesting significant potential for module-level mmWave applications.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 10","pages":"1816-1824"},"PeriodicalIF":2.3,"publicationDate":"2024-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142219846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Analysis and Optimization of Random Vibration Fatigue Life for Stacked Solder Joints Based on Orthogonal Experimental Design","authors":"Jiahua Liu, Chunyue Huang, Liye Wu, Xianjia Liu, Ying Liang, Chao Gao, Zhiqin Cao","doi":"10.1109/tcpmt.2024.3452958","DOIUrl":"https://doi.org/10.1109/tcpmt.2024.3452958","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"80 1","pages":""},"PeriodicalIF":2.2,"publicationDate":"2024-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142219841","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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