Pub Date : 2025-10-28DOI: 10.1109/TCPMT.2025.3620696
{"title":"IEEE Transactions on Components, Packaging and Manufacturing Technology Information for Authors","authors":"","doi":"10.1109/TCPMT.2025.3620696","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3620696","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 10","pages":"2279-2279"},"PeriodicalIF":3.0,"publicationDate":"2025-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11220147","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145374745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-28DOI: 10.1109/TCPMT.2025.3620698
{"title":"IEEE Transactions on Components, Packaging and Manufacturing Technology Society Information","authors":"","doi":"10.1109/TCPMT.2025.3620698","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3620698","url":null,"abstract":"","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 10","pages":"C3-C3"},"PeriodicalIF":3.0,"publicationDate":"2025-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11220138","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145374730","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-23DOI: 10.1109/TCPMT.2025.3624273
Po-Yu Chen;Chieh-Pu Tsai;Liu-Hsin-Chen Yang;Kai-Chi Lin;Chih-Wen Chiu;Chih-En Hsu;Chung-Yu Chiu;Jui-Shen Chang;Chen-Nan Chiu;David T. Chu;Yao-Chun Chuang;Cheng-Yi Liu
This letter proposes a detailed analysis of the electromigration (EM)-induced voiding process in current-stressed Cu pillar/solder/Cu pad bumps, focusing on the amount and locations of void formation. Severe voiding primarily occurs within the Sn phase, which becomes trapped due to the uneven growth of a massive Cu${}_{mathbf {6}}$ Sn${}_{mathbf {5}}$ intermetallic compound. This phenomenon is identified as a crucial factor leading to EM failure and a reduced bump lifetime. The voiding in the trapped Sn phase is attributed to two main mechanisms: 1) the formation of Sn vacancies due to backfilling Sn flux as Cu pads are consumed and 2) the nonconservative volume change associated with the transformation of Sn phase into Cu${}_{mathbf {6}}$ Sn${}_{mathbf {5}}$ phase. The uneven growth of the massive Cu${}_{mathbf {6}}$ Sn${}_{mathbf {5}}$ compound is linked to the preferential dissolution of Cu fluxes, which are driven by the anisotropic diffusivity of Sn within its lattice and the divergence of atomic fluxes at Sn grain boundaries.
本文提出了对电流应力下铜柱/焊料/铜垫凸起中电迁移（EM）诱导的空穴过程的详细分析，重点是空穴形成的数量和位置。由于大量Cu ${}_{mathbf {6}}$ Sn ${}_{mathbf{5}}$金属间化合物的不均匀生长，Sn ${}_{mathbf{5}}$发生了严重的空化。这种现象被认为是导致EM失效和碰撞寿命缩短的关键因素。捕获Sn相的空化主要有两种机制：1)Cu衬垫被消耗时，由于Sn通量的充填而形成Sn空位；2)Sn相转变为Cu ${}_{mathbf {6}}$ Sn ${}_{mathbf{5}}$相引起的非保守体积变化。Cu ${}_{mathbf {6}}$ Sn ${}_{mathbf{5}}$化合物的不均匀生长与Cu通量的优先溶解有关，这是由Sn在其晶格内的各向异性扩散率和Sn晶界原子通量的发散驱动的。
{"title":"EM-Induced Voiding Mechanism in Trapped Sn Phase Inside Massive Cu–Sn Compound","authors":"Po-Yu Chen;Chieh-Pu Tsai;Liu-Hsin-Chen Yang;Kai-Chi Lin;Chih-Wen Chiu;Chih-En Hsu;Chung-Yu Chiu;Jui-Shen Chang;Chen-Nan Chiu;David T. Chu;Yao-Chun Chuang;Cheng-Yi Liu","doi":"10.1109/TCPMT.2025.3624273","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3624273","url":null,"abstract":"This letter proposes a detailed analysis of the electromigration (EM)-induced voiding process in current-stressed Cu pillar/solder/Cu pad bumps, focusing on the amount and locations of void formation. Severe voiding primarily occurs within the Sn phase, which becomes trapped due to the uneven growth of a massive Cu<inline-formula> <tex-math>${}_{mathbf {6}}$ </tex-math></inline-formula> Sn<inline-formula> <tex-math>${}_{mathbf {5}}$ </tex-math></inline-formula> intermetallic compound. This phenomenon is identified as a crucial factor leading to EM failure and a reduced bump lifetime. The voiding in the trapped Sn phase is attributed to two main mechanisms: 1) the formation of Sn vacancies due to backfilling Sn flux as Cu pads are consumed and 2) the nonconservative volume change associated with the transformation of Sn phase into Cu<inline-formula> <tex-math>${}_{mathbf {6}}$ </tex-math></inline-formula>Sn<inline-formula> <tex-math>${}_{mathbf {5}}$ </tex-math></inline-formula> phase. The uneven growth of the massive Cu<inline-formula> <tex-math>${}_{mathbf {6}}$ </tex-math></inline-formula>Sn<inline-formula> <tex-math>${}_{mathbf {5}}$ </tex-math></inline-formula> compound is linked to the preferential dissolution of Cu fluxes, which are driven by the anisotropic diffusivity of Sn within its lattice and the divergence of atomic fluxes at Sn grain boundaries.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 12","pages":"2797-2800"},"PeriodicalIF":3.0,"publicationDate":"2025-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145982138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Innovative thermal management solutions are required to maintain a lower operating temperature of current lidless packages of AI chips. This study systematically investigates direct-on-chip multiliquid jets cooling over a 2.5-D interposer package using dielectric fluid. A compact metallic and lid-compatible manifold is proposed using 3-D printing technology with alternating impinging and draining nozzles, matching the dimensions of NVIDIA V100 chip. The fabricated manifold is mounted over the stiffener and mechanically pressurized with top cover plate and screw arrangement to ensure mechanical robustness and leak proof operation. A dielectric fluid R1233zd(E) is used as a working fluid at a saturation temperature of $37.5~^{circ }$ C. Operating GPU temperature is experimentally measured for various flow rates, and power load up to thermal design power of 300 W using embedded sensor within the device. The finding under two-phase operation reveals a significantly lower temperature, measuring lowest thermal resistance of ~0.05 K/W with excellent response for step variation in power maps. This enhanced thermal dissipation at the chip level facilitates the compact lidded manifold package and next-generation AI chip.
{"title":"Integrated Metal-Lidded Microfluidic Cooling on a High-Power AI Chip Using Confined Two-Phase Liquid Jet With Dielectric Fluid R1233zd(E)","authors":"Gopinath Sahu;Sidharth Rajeev;Duc Hoang;Harish Kumar Lattupalli;Srikanth Rangarajan;Bahgat G. Sammakia;Scott Schiffres;Tiwei Wei","doi":"10.1109/TCPMT.2025.3623470","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3623470","url":null,"abstract":"Innovative thermal management solutions are required to maintain a lower operating temperature of current lidless packages of AI chips. This study systematically investigates direct-on-chip multiliquid jets cooling over a 2.5-D interposer package using dielectric fluid. A compact metallic and lid-compatible manifold is proposed using 3-D printing technology with alternating impinging and draining nozzles, matching the dimensions of NVIDIA V100 chip. The fabricated manifold is mounted over the stiffener and mechanically pressurized with top cover plate and screw arrangement to ensure mechanical robustness and leak proof operation. A dielectric fluid R1233zd(E) is used as a working fluid at a saturation temperature of <inline-formula> <tex-math>$37.5~^{circ }$ </tex-math></inline-formula>C. Operating GPU temperature is experimentally measured for various flow rates, and power load up to thermal design power of 300 W using embedded sensor within the device. The finding under two-phase operation reveals a significantly lower temperature, measuring lowest thermal resistance of ~0.05 K/W with excellent response for step variation in power maps. This enhanced thermal dissipation at the chip level facilitates the compact lidded manifold package and next-generation AI chip.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 12","pages":"2789-2792"},"PeriodicalIF":3.0,"publicationDate":"2025-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145982176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-17DOI: 10.1109/TCPMT.2025.3622728
Guangwei Fan;Xiaohuai He;Dawei Ding
In this letter, a dual-wideband bandpass filter (BPF) covering 22.4–29 GHz (25.7%) and 36.85–45.2 GHz (20.4%) is designed in one substrate-integrated waveguide (SIW) cavity. It has one SIW cavity and two multimode resonant structures (MMRSs) consisting of one nonuniform H-shaped structure (NHS) and two L-shaped structures (LSs). There are six resonant modes, including the TE110 and TE120 modes of SIW cavity, two self-resonant modes from NHS, and a pair of odd and even modes from LSs. Four transmission zeros (TZs) are generated through their cross-coupling without any filtering circuit. As seen from design results, it provides a great candidate for 5G mmWave applications owing to its wide bandwidth, self-packaging, and easy integration.
{"title":"Dual-Wideband Bandpass Filter in Single SIW Cavity for 5G mmWave Systems","authors":"Guangwei Fan;Xiaohuai He;Dawei Ding","doi":"10.1109/TCPMT.2025.3622728","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3622728","url":null,"abstract":"In this letter, a dual-wideband bandpass filter (BPF) covering 22.4–29 GHz (25.7%) and 36.85–45.2 GHz (20.4%) is designed in one substrate-integrated waveguide (SIW) cavity. It has one SIW cavity and two multimode resonant structures (MMRSs) consisting of one nonuniform H-shaped structure (NHS) and two L-shaped structures (LSs). There are six resonant modes, including the TE<sub>110</sub> and TE<sub>120</sub> modes of SIW cavity, two self-resonant modes from NHS, and a pair of odd and even modes from LSs. Four transmission zeros (TZs) are generated through their cross-coupling without any filtering circuit. As seen from design results, it provides a great candidate for 5G mmWave applications owing to its wide bandwidth, self-packaging, and easy integration.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 12","pages":"2793-2796"},"PeriodicalIF":3.0,"publicationDate":"2025-10-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145982140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-09DOI: 10.1109/TCPMT.2025.3619541
Enming Luo;Xinyu Lu;Xiyou Sun;Lei Wang
This work develops a broadband dual-component magnetic probe with a new structural design, tailored for electromagnetic interference (EMI) diagnostic applications. Unlike the conventional dual-component magnetic probes that measure the ${H} _{x}$ and ${H} _{y}$ field components, the proposed probe employs a new detection architecture capable of simultaneously measuring two orthogonal ${H} _{y}$ and ${H} _{z}$ field components. The probe structure comprises a new detection architecture, a pair of striplines, two ground planes, and a pair of SubMiniature version A (SMA) connectors. This configuration enables concurrent measurement of the ${H} _{y}$ and ${H} _{z}$ field components. To validate the design, the proposed probe was fabricated on a four-layer printed circuit board (PCB), evaluated through simulations using high-frequency electromagnetic simulation software, as well as measurements via a self-developed near-field measurement system with two distinct calibration kits (microstrip line and slot-line). Both simulated and experimental results demonstrate that the probe can not only have a wider operational bandwidth ($4sim 15$ GHz) but also realize simultaneous measurement of two orthogonal ${H} _{y}$ and ${H} _{z}$ field components.
{"title":"A Broadband Dual-Component Magnetic Probe With a New Structural Design for EMI Diagnostics","authors":"Enming Luo;Xinyu Lu;Xiyou Sun;Lei Wang","doi":"10.1109/TCPMT.2025.3619541","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3619541","url":null,"abstract":"This work develops a broadband dual-component magnetic probe with a new structural design, tailored for electromagnetic interference (EMI) diagnostic applications. Unlike the conventional dual-component magnetic probes that measure the <inline-formula> <tex-math>${H} _{x}$ </tex-math></inline-formula> and <inline-formula> <tex-math>${H} _{y}$ </tex-math></inline-formula> field components, the proposed probe employs a new detection architecture capable of simultaneously measuring two orthogonal <inline-formula> <tex-math>${H} _{y}$ </tex-math></inline-formula> and <inline-formula> <tex-math>${H} _{z}$ </tex-math></inline-formula> field components. The probe structure comprises a new detection architecture, a pair of striplines, two ground planes, and a pair of SubMiniature version A (SMA) connectors. This configuration enables concurrent measurement of the <inline-formula> <tex-math>${H} _{y}$ </tex-math></inline-formula> and <inline-formula> <tex-math>${H} _{z}$ </tex-math></inline-formula> field components. To validate the design, the proposed probe was fabricated on a four-layer printed circuit board (PCB), evaluated through simulations using high-frequency electromagnetic simulation software, as well as measurements via a self-developed near-field measurement system with two distinct calibration kits (microstrip line and slot-line). Both simulated and experimental results demonstrate that the probe can not only have a wider operational bandwidth (<inline-formula> <tex-math>$4sim 15$ </tex-math></inline-formula> GHz) but also realize simultaneous measurement of two orthogonal <inline-formula> <tex-math>${H} _{y}$ </tex-math></inline-formula> and <inline-formula> <tex-math>${H} _{z}$ </tex-math></inline-formula> field components.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 11","pages":"2542-2545"},"PeriodicalIF":3.0,"publicationDate":"2025-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145584595","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-07DOI: 10.1109/TCPMT.2025.3618951
Huajiao Shen;Fanyi Meng;Yongqiang Wang;Kaixue Ma
This letter proposes a slow wave structure based on inductive-loading and applies it to the design of a miniaturized power divider. By adopting the capacitance and inductive-loading technology, the slow wave transmission line has a large slow wave coefficient. The proposed slow wave transmission line is based on the hybrid integrated suspended line (HISL) platform. The overall structure is a multilayer structure. The core layer slow wave structure is based on double-sided printed circuit board (PCB) circuit processing, and the remaining four layers are metal boards. The overall structure has good mechanical strength and the advantage of self-packaging based on multilayer. The designed slow wave power divider has a central operating frequency of 0.7 GHz and a circuit area of $13.49times 12.06$ mm, i.e., $0.036lambda $ g $times 0.033lambda $ g, where $lambda $ g is the guided wavelength at the center frequency.
本文提出了一种基于感应负载的慢波结构，并将其应用于小型化功率分配器的设计。采用电容和电感加载技术，使慢波传输线具有较大的慢波系数。所提出的慢波传输线是基于混合集成悬索线（HISL）平台。整体结构为多层结构。核心层慢波结构基于双面印刷电路板（PCB）电路加工，其余四层为金属板。整体结构具有良好的机械强度和基于多层自包装的优点。所设计的慢波功率分压器的中心工作频率为0.7 GHz，电路面积为$13.49乘以12.06$ mm，即$0.036lambda $ g $乘以0.033lambda $ g，其中$lambda $ g为中心频率处的导波波长。
{"title":"A Slow Wave Power Divider Based on the HISL Platform","authors":"Huajiao Shen;Fanyi Meng;Yongqiang Wang;Kaixue Ma","doi":"10.1109/TCPMT.2025.3618951","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3618951","url":null,"abstract":"This letter proposes a slow wave structure based on inductive-loading and applies it to the design of a miniaturized power divider. By adopting the capacitance and inductive-loading technology, the slow wave transmission line has a large slow wave coefficient. The proposed slow wave transmission line is based on the hybrid integrated suspended line (HISL) platform. The overall structure is a multilayer structure. The core layer slow wave structure is based on double-sided printed circuit board (PCB) circuit processing, and the remaining four layers are metal boards. The overall structure has good mechanical strength and the advantage of self-packaging based on multilayer. The designed slow wave power divider has a central operating frequency of 0.7 GHz and a circuit area of <inline-formula> <tex-math>$13.49times 12.06$ </tex-math></inline-formula> mm, i.e., <inline-formula> <tex-math>$0.036lambda $ </tex-math></inline-formula>g <inline-formula> <tex-math>$times 0.033lambda $ </tex-math></inline-formula>g, where <inline-formula> <tex-math>$lambda $ </tex-math></inline-formula>g is the guided wavelength at the center frequency.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 11","pages":"2539-2541"},"PeriodicalIF":3.0,"publicationDate":"2025-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145584600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-03DOI: 10.1109/TCPMT.2025.3617495
Yeonju Kim;Kyungmin Shin;Donghyeok Choi;Jongshin Hyun;Byungjoo Jin;Jong Kyung Park
This study explores the potential of SiCN films as a low-temperature alternative to SiO2 insulators for hybrid bonding in 3-D integration. SiCN films were deposited at $180~^{circ }$ C and $350~^{circ }$ C to investigate the effects of deposition temperature and composition on bonding performance. By optimizing precursor flow rates, we tailored the film properties, enhancing Si dangling bonds crucial for bonding. To achieve ultralow-temperature bonding below $100~^{circ }$ C, O2 plasma and potassium hydroxide (KOH) surface treatments were employed, significantly improving bonding interfaces by increasing Si-OH groups on the surface. Our results demonstrate that SiCN films deposited at low temperatures can achieve bonding characteristics comparable to those of high-temperature films. The enhanced bonding performance is attributed to surface treatments that mitigate hydrogen content and promote Si-OH formation. The low-temperature bonding capabilities of SiCN contribute to reducing thermal budgets, preventing device degradation, and advancing 3-D integration and hybrid bonding technologies for next-generation semiconductor applications.
{"title":"Ultralow-Temperature Deposition and Enhanced Bonding of SiCN Films for Advanced 3-D Integration","authors":"Yeonju Kim;Kyungmin Shin;Donghyeok Choi;Jongshin Hyun;Byungjoo Jin;Jong Kyung Park","doi":"10.1109/TCPMT.2025.3617495","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3617495","url":null,"abstract":"This study explores the potential of SiCN films as a low-temperature alternative to SiO<sub>2</sub> insulators for hybrid bonding in 3-D integration. SiCN films were deposited at <inline-formula> <tex-math>$180~^{circ }$ </tex-math></inline-formula>C and <inline-formula> <tex-math>$350~^{circ }$ </tex-math></inline-formula>C to investigate the effects of deposition temperature and composition on bonding performance. By optimizing precursor flow rates, we tailored the film properties, enhancing Si dangling bonds crucial for bonding. To achieve ultralow-temperature bonding below <inline-formula> <tex-math>$100~^{circ }$ </tex-math></inline-formula>C, O<sub>2</sub> plasma and potassium hydroxide (KOH) surface treatments were employed, significantly improving bonding interfaces by increasing Si-OH groups on the surface. Our results demonstrate that SiCN films deposited at low temperatures can achieve bonding characteristics comparable to those of high-temperature films. The enhanced bonding performance is attributed to surface treatments that mitigate hydrogen content and promote Si-OH formation. The low-temperature bonding capabilities of SiCN contribute to reducing thermal budgets, preventing device degradation, and advancing 3-D integration and hybrid bonding technologies for next-generation semiconductor applications.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 11","pages":"2501-2512"},"PeriodicalIF":3.0,"publicationDate":"2025-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145584668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A novel low-temperature wafer-level hybrid bonding technique using metal microbumps (Cu/SnAg) and nonphotosensitive dry films has been developed and investigated. The bonding process is conducted at low temperatures: $160~^{circ }$ C for the dry film and within the range of $260~^{circ }$ C–$280~^{circ }$ C for the microbumps. The microbumps are fabricated using conventional electroplating, while patterning of the nonphotosensitive dry film is achieved through laser ablation, bypassing the need for traditional lithography. Furthermore, optimizing the thickness of the microbumps, the opening dimensions of the dry film, the maximum bonding pressure, and the bonding temperature has enabled the development of a stepped control profile, which allows a seam-free bonding interface between the microbumps and the dry films. For demonstration, superior interconnect performance with an average tensile strength of approximately 8.11 MPa is achieved. The nonphotosensitive dry film exhibits low transmission loss when applied to glass packaging due to its low dielectric constant and dissipation factor. Consequently, the proposed hybrid bonding technique provides a highly cost-effective and promising approach for future multilayer glass/polyimide (PI) radio frequency (RF) 3-D integration.
研究了一种利用金属微凸点（Cu/SnAg）和非光敏干膜的低温晶圆级杂化键合技术。结合过程在低温下进行：$160~^{circ}$ C用于干膜，$260~^{circ}$ C - $280~^{circ}$ C用于微凸起。微凸起是用传统的电镀方法制造的，而非光敏干膜的图案是通过激光烧蚀来实现的，绕过了传统光刻的需要。此外，优化微凸点的厚度、干膜的开口尺寸、最大键合压力和键合温度，使微凸点和干膜之间形成无接缝的键合界面成为可能。作为验证，该材料具有优异的互连性能，平均抗拉强度约为8.11 MPa。非光敏干膜由于介电常数和耗散系数较低，应用于玻璃封装时具有较低的传输损耗。因此，所提出的混合键合技术为未来多层玻璃/聚酰亚胺（PI）射频（RF）三维集成提供了一种极具成本效益和前景的方法。
{"title":"Hybrid Bonding of Nonphotosensitive Dry Films and Cu/SnAg Microbumps for Multilayer Glass Packaging","authors":"Qing Zhou;Ying Tian;Yaqing Zhou;Yi Zhong;Tian Yu;Miao Zhang;Daquan Yu","doi":"10.1109/TCPMT.2025.3616264","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3616264","url":null,"abstract":"A novel low-temperature wafer-level hybrid bonding technique using metal microbumps (Cu/SnAg) and nonphotosensitive dry films has been developed and investigated. The bonding process is conducted at low temperatures: <inline-formula> <tex-math>$160~^{circ }$ </tex-math></inline-formula>C for the dry film and within the range of <inline-formula> <tex-math>$260~^{circ }$ </tex-math></inline-formula>C–<inline-formula> <tex-math>$280~^{circ }$ </tex-math></inline-formula>C for the microbumps. The microbumps are fabricated using conventional electroplating, while patterning of the nonphotosensitive dry film is achieved through laser ablation, bypassing the need for traditional lithography. Furthermore, optimizing the thickness of the microbumps, the opening dimensions of the dry film, the maximum bonding pressure, and the bonding temperature has enabled the development of a stepped control profile, which allows a seam-free bonding interface between the microbumps and the dry films. For demonstration, superior interconnect performance with an average tensile strength of approximately 8.11 MPa is achieved. The nonphotosensitive dry film exhibits low transmission loss when applied to glass packaging due to its low dielectric constant and dissipation factor. Consequently, the proposed hybrid bonding technique provides a highly cost-effective and promising approach for future multilayer glass/polyimide (PI) radio frequency (RF) 3-D integration.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 11","pages":"2513-2520"},"PeriodicalIF":3.0,"publicationDate":"2025-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145584622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-09-29DOI: 10.1109/TCPMT.2025.3615235
So-Yeon Park;Yoonho Choi;Cha-Hee Kim;Seung-Ho Seo;Sarah Eunkyung Kim;Won-Jun Lee
There is a critical need to understand the optimal process conditions and pad design for hybrid bonding at progressively finer pitches. The finite element method (FEM) analysis is a valuable approach for elucidating the bonding mechanism and predicting the bonded area. In this study, we investigated hybrid bonding using FEM analysis to study bonding mechanisms and suggest optimal design strategies. Models were constructed for sub-micrometer copper pads with silicon carbonitride (SiCN) as the dielectric film at the bonding interface, with variations in copper pad dimensions and dishing depth. The postbond annealing process was simulated with different annealing temperatures. The results show that high annealing temperatures and low chemical mechanical polishing (CMP) dishing depths promote sufficient pad expansion to achieve complete copper-to-copper bonding, which is consistent with established observations in the field. Furthermore, the study highlights a strong dependence of the bonded area on the copper pad dimensions, emphasizing the need for proper optimization of pad dimensions. In particular, copper bonding was highly sensitive to pad thickness and aspect ratio. As the pad thickness increased, thermal expansion increased, resulting in a larger bonded area. For all pad thicknesses, maximum thermal expansion occurred at an aspect ratio of approximately 0.4. Therefore, a specific diameter range was identified where the maximum bonded area could be achieved for a given pad thickness.
{"title":"Effect of Process and Design Parameters in Cu/SiCN Hybrid Bonding Process: A Finite Element Analysis Study","authors":"So-Yeon Park;Yoonho Choi;Cha-Hee Kim;Seung-Ho Seo;Sarah Eunkyung Kim;Won-Jun Lee","doi":"10.1109/TCPMT.2025.3615235","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3615235","url":null,"abstract":"There is a critical need to understand the optimal process conditions and pad design for hybrid bonding at progressively finer pitches. The finite element method (FEM) analysis is a valuable approach for elucidating the bonding mechanism and predicting the bonded area. In this study, we investigated hybrid bonding using FEM analysis to study bonding mechanisms and suggest optimal design strategies. Models were constructed for sub-micrometer copper pads with silicon carbonitride (SiCN) as the dielectric film at the bonding interface, with variations in copper pad dimensions and dishing depth. The postbond annealing process was simulated with different annealing temperatures. The results show that high annealing temperatures and low chemical mechanical polishing (CMP) dishing depths promote sufficient pad expansion to achieve complete copper-to-copper bonding, which is consistent with established observations in the field. Furthermore, the study highlights a strong dependence of the bonded area on the copper pad dimensions, emphasizing the need for proper optimization of pad dimensions. In particular, copper bonding was highly sensitive to pad thickness and aspect ratio. As the pad thickness increased, thermal expansion increased, resulting in a larger bonded area. For all pad thicknesses, maximum thermal expansion occurred at an aspect ratio of approximately 0.4. Therefore, a specific diameter range was identified where the maximum bonded area could be achieved for a given pad thickness.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 11","pages":"2492-2500"},"PeriodicalIF":3.0,"publicationDate":"2025-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145584621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：