首页 > 最新文献

IEEE Transactions on Components, Packaging and Manufacturing Technology最新文献

英文 中文
A New High-Sensitivity Near-Field Composite Probe With Mirror Symmetry Design 一种新型镜面对称设计的高灵敏度近场复合探头
IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-23 DOI: 10.1109/TCPMT.2025.3582405
Lei Wang;Jianke Li;Quan Huang;Chengyang Luo;Guoguang Lu
In this letter, a new high-sensitivity near-field composite probe with mirror symmetry design is presented. Unlike conventional differential magnetic-field probes that can only measure a magnetic-field component, a new differential composite probe with series loops is proposed to simultaneously test electric and magnetic field components. To increase the detection sensitivity, a pair of series loops are inserted into the conventional differential loops, which form the composite probe. Note that these series loops and differential loops are connected in series, not in parallel. The equivalent circuit models on the detection loops are used to explain the operating mechanism of the sensitivity enhancement of this design. In addition, four evolutionary models are simulated, compared, and studied to verify the effectiveness of the sensitivity enhancement. Moreover, the composite probe is together simulated, manufactured, and measured to verify the design rationality. The measured results reveal that the magnetic-field sensitivities of the probe exceed –40 dB at 0.6–5.4 GHz, while the electric-field sensitivities of that are over –40 dB at 1.3–6 GHz, respectively. Therefore, the designed composite probe not only has higher detection sensitivity but also can test the electric and magnetic field components simultaneously.
本文介绍了一种新型镜面对称设计的高灵敏度近场复合探头。与传统的差分磁场探头只能测量一个磁场分量不同,提出了一种串联回路的差分复合探头,可以同时测试电场和磁场分量。为了提高探测灵敏度,在传统的差分回路中插入一对串联回路,构成复合探头。请注意,这些串联回路和微分回路是串联的,而不是并联的。利用检测回路上的等效电路模型解释了该设计提高灵敏度的工作机理。此外,还对四种进化模型进行了仿真、比较和研究,以验证灵敏度增强的有效性。并对复合探头进行了仿真、制造和测量,验证了设计的合理性。测量结果表明,该探头在0.6 ~ 5.4 GHz范围内的磁场灵敏度超过-40 dB,在1.3 ~ 6 GHz范围内的电场灵敏度超过-40 dB。因此,所设计的复合探头不仅具有较高的检测灵敏度,而且可以同时对电场和磁场元件进行检测。
{"title":"A New High-Sensitivity Near-Field Composite Probe With Mirror Symmetry Design","authors":"Lei Wang;Jianke Li;Quan Huang;Chengyang Luo;Guoguang Lu","doi":"10.1109/TCPMT.2025.3582405","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3582405","url":null,"abstract":"In this letter, a new high-sensitivity near-field composite probe with mirror symmetry design is presented. Unlike conventional differential magnetic-field probes that can only measure a magnetic-field component, a new differential composite probe with series loops is proposed to simultaneously test electric and magnetic field components. To increase the detection sensitivity, a pair of series loops are inserted into the conventional differential loops, which form the composite probe. Note that these series loops and differential loops are connected in series, not in parallel. The equivalent circuit models on the detection loops are used to explain the operating mechanism of the sensitivity enhancement of this design. In addition, four evolutionary models are simulated, compared, and studied to verify the effectiveness of the sensitivity enhancement. Moreover, the composite probe is together simulated, manufactured, and measured to verify the design rationality. The measured results reveal that the magnetic-field sensitivities of the probe exceed –40 dB at 0.6–5.4 GHz, while the electric-field sensitivities of that are over –40 dB at 1.3–6 GHz, respectively. Therefore, the designed composite probe not only has higher detection sensitivity but also can test the electric and magnetic field components simultaneously.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 8","pages":"1666-1671"},"PeriodicalIF":3.0,"publicationDate":"2025-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144891047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Negative Dispersion-Less Coupling Structure and Its Application for Realization of Extremely Small Negative Couplings in Waveguide Filters 负无色散耦合结构及其在波导滤波器中实现极小负耦合的应用
IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-23 DOI: 10.1109/TCPMT.2025.3582009
Zai-Cheng Guo;Weijun Li;Wangtao Ye;Xuedao Wang;Yi Wang
Negative coupling is widely used in microwave filter design, especially for filters with finite transmission zeros (TZs). Conventionally, negative coupling is realized through capacitive irises or probes. However, when the negative coupling is small, capacitive irises need to be very narrow, which presents significant challenges in manufacturing and tuning the filters. In this article, a negative dispersion-less coupling structure (NDLCS) is proposed based on a partial-height post for waveguide filters. Compared to capacitive irises, the NDLCS achieves a comparable effect while allowing the minimum dimension of coupling structures to increase from tens of micrometers to a few millimeters. The NDLCS also enables the installation of tuning screws, which significantly lowers both the manufacturing difficulty and the sensitivity to manufacturing tolerances. Two waveguide filters with narrow bandwidths are designed using the proposed NDLCS and compared to filters with conventional capacitive irises and dispersive coupling structures. The investigated and measured results demonstrate the advantages of the proposed NDLCS in manufacturing and tuning when realizing small negative coupling for waveguide filters.
负耦合在微波滤波器设计中有着广泛的应用,特别是对于具有有限传输零点的滤波器。传统上,负耦合是通过电容虹膜或探头实现的。然而,当负耦合很小时,电容虹膜需要非常窄,这在制造和调整滤波器时提出了重大挑战。本文提出了一种基于部分高度柱的负无色散耦合结构(NDLCS)。与电容式虹膜相比,NDLCS实现了类似的效果,同时允许耦合结构的最小尺寸从几十微米增加到几毫米。NDLCS还可以安装调谐螺钉,这大大降低了制造难度和对制造公差的敏感性。利用所提出的NDLCS设计了两个窄带波导滤波器,并与传统电容虹膜和色散耦合结构的滤波器进行了比较。研究和测量结果表明,在实现波导滤波器的小负耦合时,所提出的NDLCS在制造和调谐方面具有优势。
{"title":"Negative Dispersion-Less Coupling Structure and Its Application for Realization of Extremely Small Negative Couplings in Waveguide Filters","authors":"Zai-Cheng Guo;Weijun Li;Wangtao Ye;Xuedao Wang;Yi Wang","doi":"10.1109/TCPMT.2025.3582009","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3582009","url":null,"abstract":"Negative coupling is widely used in microwave filter design, especially for filters with finite transmission zeros (TZs). Conventionally, negative coupling is realized through capacitive irises or probes. However, when the negative coupling is small, capacitive irises need to be very narrow, which presents significant challenges in manufacturing and tuning the filters. In this article, a negative dispersion-less coupling structure (NDLCS) is proposed based on a partial-height post for waveguide filters. Compared to capacitive irises, the NDLCS achieves a comparable effect while allowing the minimum dimension of coupling structures to increase from tens of micrometers to a few millimeters. The NDLCS also enables the installation of tuning screws, which significantly lowers both the manufacturing difficulty and the sensitivity to manufacturing tolerances. Two waveguide filters with narrow bandwidths are designed using the proposed NDLCS and compared to filters with conventional capacitive irises and dispersive coupling structures. The investigated and measured results demonstrate the advantages of the proposed NDLCS in manufacturing and tuning when realizing small negative coupling for waveguide filters.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 8","pages":"1644-1651"},"PeriodicalIF":3.0,"publicationDate":"2025-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144891008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
3-D Packaging Technologies for Advanced Integrated Photonics Modules: A Review 先进集成光子学模块的三维封装技术综述
IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-23 DOI: 10.1109/TCPMT.2025.3582041
Jean Charbonnier;Thierry Mourier;Stéphane Bernabé
Recent developments in photonics applications, in the fields of datacom, high-performance computing, and integrated optical sensors, have accelerated the trend toward electronic/optical convergence announced over ten years ago. The growing maturity of silicon photonics and its use in conjunction with advanced packaging techniques (3-D stacking, through silicon via (TSV), and fan-out wafer-level packaging) have contributed to the emergence of two new objects that are becoming standards: co-packaged optics (CPOs) and photonic interposers, both leveraging photonic chiplets. This article reviews the emergence of these two objects, as well as the most recent achievements.
在数据通信、高性能计算和集成光学传感器领域,光子学应用的最新发展加速了十多年前宣布的电子/光学融合趋势。硅光子学的日益成熟及其与先进封装技术(3-D堆叠,通过硅通孔(TSV)和扇出晶圆级封装)的结合,促成了两种新对象的出现,这些新对象正在成为标准:共封装光学器件(CPOs)和光子中间层,两者都利用光子芯片。本文回顾了这两个对象的出现,以及最近的成就。
{"title":"3-D Packaging Technologies for Advanced Integrated Photonics Modules: A Review","authors":"Jean Charbonnier;Thierry Mourier;Stéphane Bernabé","doi":"10.1109/TCPMT.2025.3582041","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3582041","url":null,"abstract":"Recent developments in photonics applications, in the fields of datacom, high-performance computing, and integrated optical sensors, have accelerated the trend toward electronic/optical convergence announced over ten years ago. The growing maturity of silicon photonics and its use in conjunction with advanced packaging techniques (3-D stacking, through silicon via (TSV), and fan-out wafer-level packaging) have contributed to the emergence of two new objects that are becoming standards: co-packaged optics (CPOs) and photonic interposers, both leveraging photonic chiplets. This article reviews the emergence of these two objects, as well as the most recent achievements.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 8","pages":"1565-1580"},"PeriodicalIF":3.0,"publicationDate":"2025-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144891160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Packaged Ka-Band IPD Bandpass Filter Using In-Phase and Out-of-Phase Mixed Couplings 采用相内和相外混合耦合的封装ka波段IPD带通滤波器
IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-20 DOI: 10.1109/TCPMT.2025.3581320
Na Ji;Guangxu Shen;Wenjie Feng;Quan Xue;Wenquan Che
By effectively merging in-phase and out-of-phase electric and magnetic mixed couplings in an in-line fourth-order topology, a high-selectivity millimeter-wave (mm-wave) bandpass filter (BPF) is proposed. The use of in-phase and out-of-phase mixed couplings introduces pairs of 180° phase shift, resulting in multiple transmission zeros (TZs) generated outside the passband, whose locations can be independently controlled by adjusting the coupling strength. Furthermore, the equivalent circuit models are analyzed and discussed to elucidate the operating mechanism. For experimental verification, a 25-GHz in-line fourth-order high-selectivity BPF is designed and fabricated using gallium arsenide (GaAs)-based integrated passive device (IPD) process. Compared with prior works, the proposed BPF shows the merits of high selectivity, wider rejection bandwidth, and low insertion losses, making it well-suited for enhancing receiver sensitivity and suppressing interference in satellite communication systems.
通过在线四阶拓扑结构中有效地合并同相和非同相的电磁混合耦合,提出了一种高选择性毫米波带通滤波器。相内和相外混合耦合的使用引入了180°相移对,导致在通带外产生多个传输零点(TZs),其位置可以通过调节耦合强度独立控制。并对等效电路模型进行了分析和讨论,阐明了等效电路的运行机理。为了验证实验结果,采用砷化镓(GaAs)集成无源器件(IPD)工艺,设计并制作了一个25 ghz在线四阶高选择性BPF。与以往的研究成果相比,所提出的BPF具有高选择性、更宽的抑制带宽和低插入损耗等优点,非常适合用于卫星通信系统中提高接收机灵敏度和抑制干扰。
{"title":"Packaged Ka-Band IPD Bandpass Filter Using In-Phase and Out-of-Phase Mixed Couplings","authors":"Na Ji;Guangxu Shen;Wenjie Feng;Quan Xue;Wenquan Che","doi":"10.1109/TCPMT.2025.3581320","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3581320","url":null,"abstract":"By effectively merging in-phase and out-of-phase electric and magnetic mixed couplings in an in-line fourth-order topology, a high-selectivity millimeter-wave (mm-wave) bandpass filter (BPF) is proposed. The use of in-phase and out-of-phase mixed couplings introduces pairs of 180° phase shift, resulting in multiple transmission zeros (TZs) generated outside the passband, whose locations can be independently controlled by adjusting the coupling strength. Furthermore, the equivalent circuit models are analyzed and discussed to elucidate the operating mechanism. For experimental verification, a 25-GHz in-line fourth-order high-selectivity BPF is designed and fabricated using gallium arsenide (GaAs)-based integrated passive device (IPD) process. Compared with prior works, the proposed BPF shows the merits of high selectivity, wider rejection bandwidth, and low insertion losses, making it well-suited for enhancing receiver sensitivity and suppressing interference in satellite communication systems.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 8","pages":"1750-1758"},"PeriodicalIF":3.0,"publicationDate":"2025-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144891155","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Deep Kernel-Based Hyperparameter Adaptive Learning and Frequency Response Predictions Using Transposed Convolutional Neural Network 基于深度核的超参数自适应学习和基于转置卷积神经网络的频率响应预测
IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-12 DOI: 10.1109/TCPMT.2025.3578968
Yiliang Guo;Yifan Wang;Joshua Corsello;Madhavan Swaminathan
Electronic design automation (EDA) has unique challenges for addressing the design of systems for emerging applications due to the complexities involved, where multiple chiplets are integrated together on a heterogeneous platform. This challenge arises due to the long computation time required for simulation to capture all the necessary first order, second order, and sometimes third-order parasitic effects. Emerging machine learning (ML) and Gaussian process (GP) methods have helped expedite these processes. The deep kernel learning (DKL) model combines the structural properties of deep learning architectures with the nonparametric flexibility of kernel methods. It shows advantages by applying a GP with the corresponding kernel function to the final hidden layer of a deep neural network (DNN). However, DKL sometimes suffers from overfitting and scalability issues. In this article, we propose an adaptive learning framework for S-parameter prediction, incorporating the spectral transposed convolutional neural network (S-TCNN) and DKL. The proposed model takes input parameters from the design space, upsamples them through transposed convolutional layers, and utilizes a GP kernel layer to approximate the desired kernel function. Additionally, the latent feature space adaptively compresses and extracts features from the input matrix, serving as a separate input parameter for the GP kernel layer. Further, we discuss the training strategy and model scalability. The proposed model is tested and evaluated using two advanced packaging examples. Results show a reduction in the number of hyperparameters by over 50% and approximately 40% improvements in loss and normalized mean-square error (NMSE).
由于涉及的复杂性,电子设计自动化(EDA)在解决新兴应用系统设计方面面临着独特的挑战,其中多个芯片集成在异构平台上。这一挑战的出现是由于模拟捕获所有必要的一阶、二阶和有时是三阶寄生效应所需的长计算时间。新兴的机器学习(ML)和高斯过程(GP)方法有助于加快这些过程。深度核学习(DKL)模型将深度学习体系结构的结构特性与核方法的非参数灵活性相结合。将具有相应核函数的GP应用于深度神经网络(DNN)的最终隐藏层,显示出其优势。然而,DKL有时会遇到过拟合和可伸缩性问题。在本文中,我们提出了一个自适应学习框架,用于s参数预测,结合频谱转置卷积神经网络(S-TCNN)和DKL。该模型从设计空间中获取输入参数,通过转置卷积层对其进行上采样,并利用GP核层来近似期望的核函数。此外,潜在特征空间自适应地从输入矩阵中压缩和提取特征,作为GP核层的单独输入参数。进一步,我们讨论了训练策略和模型的可扩展性。采用两个先进的包装实例对所提出的模型进行了测试和评价。结果表明,超参数数量减少了50%以上,损耗和归一化均方误差(NMSE)改善了约40%。
{"title":"Deep Kernel-Based Hyperparameter Adaptive Learning and Frequency Response Predictions Using Transposed Convolutional Neural Network","authors":"Yiliang Guo;Yifan Wang;Joshua Corsello;Madhavan Swaminathan","doi":"10.1109/TCPMT.2025.3578968","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3578968","url":null,"abstract":"Electronic design automation (EDA) has unique challenges for addressing the design of systems for emerging applications due to the complexities involved, where multiple chiplets are integrated together on a heterogeneous platform. This challenge arises due to the long computation time required for simulation to capture all the necessary first order, second order, and sometimes third-order parasitic effects. Emerging machine learning (ML) and Gaussian process (GP) methods have helped expedite these processes. The deep kernel learning (DKL) model combines the structural properties of deep learning architectures with the nonparametric flexibility of kernel methods. It shows advantages by applying a GP with the corresponding kernel function to the final hidden layer of a deep neural network (DNN). However, DKL sometimes suffers from overfitting and scalability issues. In this article, we propose an adaptive learning framework for <italic>S</i>-parameter prediction, incorporating the spectral transposed convolutional neural network (S-TCNN) and DKL. The proposed model takes input parameters from the design space, upsamples them through transposed convolutional layers, and utilizes a GP kernel layer to approximate the desired kernel function. Additionally, the latent feature space adaptively compresses and extracts features from the input matrix, serving as a separate input parameter for the GP kernel layer. Further, we discuss the training strategy and model scalability. The proposed model is tested and evaluated using two advanced packaging examples. Results show a reduction in the number of hyperparameters by over 50% and approximately 40% improvements in loss and normalized mean-square error (NMSE).","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 9","pages":"1964-1972"},"PeriodicalIF":3.0,"publicationDate":"2025-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145100391","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Wet Etching Process Optimization and Consistency Enhancement of Massive Through Glass Vias Through Laser-Induced Wet Etching 湿法蚀刻工艺优化及激光诱导玻璃通孔一致性增强
IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-11 DOI: 10.1109/TCPMT.2025.3578609
Maoxiang Hou;Nan Liao;Junjie Zhang;Meihong He;Wei Feng;Yun Chen;Xin Chen
Through glass via (TGV) technology presents a promising alternative for 3-D vertical interconnects in advanced packaging. As device integration progresses, the number of through vias in glass interposers is on the rise, which presents challenges in achieving high-quality and consistent processing of massive TGVs. This study utilizes laser-induced wet etching, complemented by multienergy field mixing assistance to produce highly consistent and significant quantities of TGVs on Corning Eagle XG (EXG) glass. Initially, a specialized wet etching system was developed, featuring an ultrasonic field, temperature control for a water bath, and sample reciprocation. The impact of these parameters on the morphology of the TGVs was systematically investigated. In addition, the study explored the mechanisms by which various etching parameters—such as temperature, etchant concentration, and ultrasonic power—affect the consistency of the TGVs. Ultimately, through the optimization of etching parameters via orthogonal experiments and statistical data sampling, it was confirmed that integrating an ultrasonic field, sample reciprocation, and rotation during the etching process significantly enhances the quality and consistency of the massive TGVs. The consistency of all TGVs (26898 per substrate) was enhanced with a relative standard deviation of 0.73% for the surface hole diameter and an etching rate of $1.24~mu $ m/min. This advanced etching technology for high-consistent massive TGVs greatly improves the productivity and practicality of devices utilizing TGVs in 3-D packaging applications.
通过玻璃通孔(TGV)技术提出了一个有前途的替代3d垂直互连在先进的封装。随着器件集成的进展,玻璃中间层中的通孔数量不断增加,这给实现高质量和一致的大规模tgv加工带来了挑战。本研究利用激光诱导湿法蚀刻,辅以多能场混合辅助,在康宁Eagle XG (EXG)玻璃上产生高度一致且数量可观的tgv。最初,开发了一个专门的湿法蚀刻系统,具有超声波场,水浴温度控制和样品往复。系统地研究了这些参数对tgv形貌的影响。此外,研究还探讨了不同蚀刻参数(如温度、蚀刻剂浓度和超声功率)对tgv一致性的影响机制。最终,通过正交实验和统计数据采样对刻蚀参数进行优化,证实了在刻蚀过程中集成超声场、样品往复和旋转可以显著提高大规模tgv的质量和一致性。表面孔直径的相对标准偏差为0.73%,蚀刻速率为$1.24~mu $ m/min,所有tgv的一致性(每基板26898)都得到了提高。这种用于高一致性大规模tgv的先进蚀刻技术大大提高了在3d封装应用中利用tgv的设备的生产率和实用性。
{"title":"Wet Etching Process Optimization and Consistency Enhancement of Massive Through Glass Vias Through Laser-Induced Wet Etching","authors":"Maoxiang Hou;Nan Liao;Junjie Zhang;Meihong He;Wei Feng;Yun Chen;Xin Chen","doi":"10.1109/TCPMT.2025.3578609","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3578609","url":null,"abstract":"Through glass via (TGV) technology presents a promising alternative for 3-D vertical interconnects in advanced packaging. As device integration progresses, the number of through vias in glass interposers is on the rise, which presents challenges in achieving high-quality and consistent processing of massive TGVs. This study utilizes laser-induced wet etching, complemented by multienergy field mixing assistance to produce highly consistent and significant quantities of TGVs on Corning Eagle XG (EXG) glass. Initially, a specialized wet etching system was developed, featuring an ultrasonic field, temperature control for a water bath, and sample reciprocation. The impact of these parameters on the morphology of the TGVs was systematically investigated. In addition, the study explored the mechanisms by which various etching parameters—such as temperature, etchant concentration, and ultrasonic power—affect the consistency of the TGVs. Ultimately, through the optimization of etching parameters via orthogonal experiments and statistical data sampling, it was confirmed that integrating an ultrasonic field, sample reciprocation, and rotation during the etching process significantly enhances the quality and consistency of the massive TGVs. The consistency of all TGVs (26898 per substrate) was enhanced with a relative standard deviation of 0.73% for the surface hole diameter and an etching rate of <inline-formula> <tex-math>$1.24~mu $ </tex-math></inline-formula>m/min. This advanced etching technology for high-consistent massive TGVs greatly improves the productivity and practicality of devices utilizing TGVs in 3-D packaging applications.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 8","pages":"1788-1794"},"PeriodicalIF":3.0,"publicationDate":"2025-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144892379","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Jet-Dispensing-Based Assembly of Electric Field Adaptively Controlled Structure in Power Electronic Modules 基于喷注的电力电子模块电场自适应控制结构装配
IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-10 DOI: 10.1109/TCPMT.2025.3578405
Ya Sun;Zhikang Yuan;Zhiwen Huang;Jun Hu;Jinliang He
In power modules, partial discharge (PD) at the triple points of “Copper-Ceramic-Silicone Gel” poses a significant challenge to the development of higher voltage and power density. This article utilized a reliable and controllable method, jet dispensing, to assemble the electric field adaptively controlled structure in power electronic modules to optimize the electric field distribution. The structure was composed of ZnO/epoxy resin nonlinear conductivity composites, with the thickness controlled at $300~pm ~50~mu $ m. The assembled electric field adaptively controlled structure significantly enhanced the PD inception voltage (PDIV) of the module from 6.0 to 13.2 kV, with a 120.0% increase under the sinusoidal waves, and from 4.0 to 9.6 kV under positive polarity square-wave pulses, with an increased ratio of 140.0%. This article provides a new perspective on the application of nonlinear materials in power electronic modules.
在功率模块中,“铜-陶瓷-硅凝胶”三相点的局部放电(PD)对高电压和高功率密度的发展提出了重大挑战。本文采用可靠可控的喷射点胶方法,在电力电子模块中装配电场自适应控制结构,以优化电场分布。该结构由ZnO/环氧树脂非线性电导率复合材料组成,厚度控制在$300~pm ~ $ 50~mu $ m。组装后的电场自适应控制结构显著提高了模块的PD起始电压(PDIV),在正弦波下从6.0提高到13.2 kV,提高了120.0%,在正极性方波脉冲下从4.0提高到9.6 kV,提高了140.0%。本文为非线性材料在电力电子模块中的应用提供了一个新的视角。
{"title":"Jet-Dispensing-Based Assembly of Electric Field Adaptively Controlled Structure in Power Electronic Modules","authors":"Ya Sun;Zhikang Yuan;Zhiwen Huang;Jun Hu;Jinliang He","doi":"10.1109/TCPMT.2025.3578405","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3578405","url":null,"abstract":"In power modules, partial discharge (PD) at the triple points of “Copper-Ceramic-Silicone Gel” poses a significant challenge to the development of higher voltage and power density. This article utilized a reliable and controllable method, jet dispensing, to assemble the electric field adaptively controlled structure in power electronic modules to optimize the electric field distribution. The structure was composed of ZnO/epoxy resin nonlinear conductivity composites, with the thickness controlled at <inline-formula> <tex-math>$300~pm ~50~mu $ </tex-math></inline-formula>m. The assembled electric field adaptively controlled structure significantly enhanced the PD inception voltage (PDIV) of the module from 6.0 to 13.2 kV, with a 120.0% increase under the sinusoidal waves, and from 4.0 to 9.6 kV under positive polarity square-wave pulses, with an increased ratio of 140.0%. This article provides a new perspective on the application of nonlinear materials in power electronic modules.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 8","pages":"1803-1810"},"PeriodicalIF":3.0,"publicationDate":"2025-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144892369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Reducing Warpage for Polymer-Based Embedded Silicon Fan-Out (P-eSiFO) Packaging During Thermal Process Loadings 减少聚合物基嵌入式硅扇出(P-eSiFO)封装在热加工加载过程中的翘曲
IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-09 DOI: 10.1109/TCPMT.2025.3578042
Jianyu Du;Lang Chen;Han Xu;Jinwen Zhang;Huaiqiang Yu;Chi Zhang;Wei Wang
Polymer-based embedded silicon-based fan-out (P-eSiFO) is a new packaging technique, which provides a way to high-density integration of high-performance chiplets. However, integrating multiple materials with diverse physical properties in the P-eSiFO leads to substantial warpage during downstream high-temperature manufacturing processes. In this study, a thermomechanical model of a P-eSiFO was developed to examine the thermomechanical with varying structural parameters and material selections. Test dies having an area of 0.5 cm2 were embedded in a 500- $mu $ m-thick silicon carrier following the P-eSiFO process. After careful parameters, optimization chip warpage can effectively decrease by over 60%. Experimental results showed that the height difference between the embedded chip and its silicon interposer can be reduced down to $1~mu $ m with optimized parameters after high-temperature processes. This work provides useful insights for addressing multimaterial warpage concerns during thermal processes in advanced packaging.
基于聚合物的嵌入式硅基扇出(P-eSiFO)是一种新型封装技术,为高性能小芯片的高密度集成提供了途径。然而,在P-eSiFO中集成具有不同物理特性的多种材料会在下游高温制造过程中导致大量翘曲。在这项研究中,建立了P-eSiFO的热力学模型,以研究不同结构参数和材料选择下的热力学。按照P-eSiFO工艺,将面积为0.5 cm2的测试模具嵌入500- $mu $ m厚的硅载体中。经过精心的参数设计,优化后的芯片翘曲率可有效降低60%以上。实验结果表明,经高温处理后,优化后的工艺参数可使芯片与硅中间层之间的高度差减小到$1~ $ μ $ m。这项工作提供了有用的见解,解决多材料翘曲问题在热过程中的先进封装。
{"title":"Reducing Warpage for Polymer-Based Embedded Silicon Fan-Out (P-eSiFO) Packaging During Thermal Process Loadings","authors":"Jianyu Du;Lang Chen;Han Xu;Jinwen Zhang;Huaiqiang Yu;Chi Zhang;Wei Wang","doi":"10.1109/TCPMT.2025.3578042","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3578042","url":null,"abstract":"Polymer-based embedded silicon-based fan-out (P-eSiFO) is a new packaging technique, which provides a way to high-density integration of high-performance chiplets. However, integrating multiple materials with diverse physical properties in the P-eSiFO leads to substantial warpage during downstream high-temperature manufacturing processes. In this study, a thermomechanical model of a P-eSiFO was developed to examine the thermomechanical with varying structural parameters and material selections. Test dies having an area of 0.5 cm<sup>2</sup> were embedded in a 500-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m-thick silicon carrier following the P-eSiFO process. After careful parameters, optimization chip warpage can effectively decrease by over 60%. Experimental results showed that the height difference between the embedded chip and its silicon interposer can be reduced down to <inline-formula> <tex-math>$1~mu $ </tex-math></inline-formula>m with optimized parameters after high-temperature processes. This work provides useful insights for addressing multimaterial warpage concerns during thermal processes in advanced packaging.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 9","pages":"2033-2040"},"PeriodicalIF":3.0,"publicationDate":"2025-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145100455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
100 Gb/s Multichannel TOSA With Low Tracking Error at the Industry Operating Temperature 100gb /s多通道TOSA,在工业工作温度下具有低跟踪误差
IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-05 DOI: 10.1109/TCPMT.2025.3576864
Liang Zhang;Xiaochuan Xia;Haoran Ma;Yang Liu;Hongwei Liang
Tracking error is a crucial metric for assessing optical alignment changes in transmitter optical subassemblies (TOSAs) under varying temperatures. We present a 100 Gb/s four-channel TOSA developed for industrial temperature ranges (– $40~^{circ }$ C– $+ 85~^{circ }$ C), featuring enhanced Z-sleeve thickness (0.45 mm) and optimized optical alignment. Finite-element analysis (FEA) showed that this increase reduced maximum stress from 150 to 94 MPa and displacement from 5.5 to $3.6~mu $ m under identical shear loading by increasing the Z-sleeve thickness from 0.35 to 0.45 mm. Meanwhile, the root mean squares (rms) displacement ranges from 55.8 to $7.6~mu $ m, achieving quasi-coaxial beam alignment. Moreover, thermal characterization revealed that the optimized 0.45 mm configuration consistently maintained tracking errors below 0.4 dB across all channels and temperatures. These results confirm that the dual strategy of mechanical reinforcement and precise optical path alignment effectively improves thermal stability, meeting the stringent requirements of high-density wavelength division multiplexing (WDM) systems for data centers and 5G/6G applications.
跟踪误差是评估发射机光学组件(tosa)在不同温度下光学对准变化的关键指标。我们提出了一种100gb /s的四通道TOSA,用于工业温度范围(- $40~^{circ}$ C - $+ 85~^{circ}$ C),具有增强的z套筒厚度(0.45 mm)和优化的光学对准。有限元分析(FEA)表明,在相同剪切载荷下,通过将z轴套厚度从0.35 mm增加到0.45 mm,最大应力从150 MPa降低到94 MPa,位移从5.5 ~ 3.6 mu $ m降低。同时,均方根(rms)位移范围在55.8 ~ 7.6~mu $ m之间,实现了光束准同轴对准。此外,热特性分析表明,优化后的0.45 mm结构在所有通道和温度下都能将跟踪误差保持在0.4 dB以下。这些结果证实,机械增强和精确光路对齐的双重策略有效地提高了热稳定性,满足数据中心和5G/6G应用的高密度波分复用(WDM)系统的严格要求。
{"title":"100 Gb/s Multichannel TOSA With Low Tracking Error at the Industry Operating Temperature","authors":"Liang Zhang;Xiaochuan Xia;Haoran Ma;Yang Liu;Hongwei Liang","doi":"10.1109/TCPMT.2025.3576864","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3576864","url":null,"abstract":"Tracking error is a crucial metric for assessing optical alignment changes in transmitter optical subassemblies (TOSAs) under varying temperatures. We present a 100 Gb/s four-channel TOSA developed for industrial temperature ranges (–<inline-formula> <tex-math>$40~^{circ }$ </tex-math></inline-formula>C–<inline-formula> <tex-math>$+ 85~^{circ }$ </tex-math></inline-formula>C), featuring enhanced Z-sleeve thickness (0.45 mm) and optimized optical alignment. Finite-element analysis (FEA) showed that this increase reduced maximum stress from 150 to 94 MPa and displacement from 5.5 to <inline-formula> <tex-math>$3.6~mu $ </tex-math></inline-formula>m under identical shear loading by increasing the Z-sleeve thickness from 0.35 to 0.45 mm. Meanwhile, the root mean squares (rms) displacement ranges from 55.8 to <inline-formula> <tex-math>$7.6~mu $ </tex-math></inline-formula>m, achieving quasi-coaxial beam alignment. Moreover, thermal characterization revealed that the optimized 0.45 mm configuration consistently maintained tracking errors below 0.4 dB across all channels and temperatures. These results confirm that the dual strategy of mechanical reinforcement and precise optical path alignment effectively improves thermal stability, meeting the stringent requirements of high-density wavelength division multiplexing (WDM) systems for data centers and 5G/6G applications.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 7","pages":"1557-1560"},"PeriodicalIF":2.3,"publicationDate":"2025-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144581708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-Loss Self-Packaged Full Phase Shift Reflection-Type Phase Shifter Based on Hybrid Integrated Suspended Line Technology 基于混合集成悬索线技术的低损耗自封装全移相反射式移相器
IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2025-06-04 DOI: 10.1109/TCPMT.2025.3576350
Jin Wu;Yuefeng Hou;Liqi Yang;Zhenshuai Fu;Meicheng Liu;Dawei Zhang;Mingtao Zhang;Kaixue Ma
A low-loss and self-packaged full phase shift reflection-type phase shifter (RTPS) based on the hybrid integrated suspended line (HISL) technology is introduced. The proposed RTPS consists of a 90° branch line coupler and two tunable parallel L–C loads connected to the through port and coupled ports. First, an enhanced two-step phase extraction method is proposed, reducing the evaluation state of the RTPS and achieving the minimal phase step while keeping the number of states unchanged. Second, the HISL technology is adopted in the design to achieve low insertion loss (IL). Due to the self-packaging characteristics of HISL, the proposed RTPS effectively avoids interference with surrounding circuits and is highly integrated. Third, the low-power digital tunable capacitor (DTC) with a bus interface is used as the tunable load, making the RTPS easy to integrate into large-scale phased array systems. Finally, a prototype is fabricated by using the sheet metal and PCB process. At the center frequency of 2.45 GHz, the proposed RTPS achieved a measured phase shift range (PSR) of 368° under 128 sweeping states with an IL of 0.9–1.6 dB, and the figure of merit (FoM) is 230°/dB.
介绍了一种基于混合集成悬吊线(HISL)技术的低损耗自封装全移相反射式移相器(RTPS)。所提出的RTPS由一个90°分支线耦合器和两个可调谐的并联L-C负载组成,该负载连接到直通端口和耦合端口。首先,提出了一种增强的两步相位提取方法,减少了RTPS的评估状态,在保持状态数不变的情况下实现了最小相位步长;其次,设计中采用HISL技术,实现低插入损耗(IL)。由于HISL的自封装特性,所提出的RTPS有效地避免了对周围电路的干扰,并且集成度高。第三,采用带总线接口的低功耗数字可调谐电容(DTC)作为可调谐负载,使RTPS易于集成到大规模相控阵系统中。最后,采用钣金和PCB工艺制作了原型机。在中心频率为2.45 GHz时,该RTPS在128种扫描状态下的相移范围(PSR)为368°,IL为0.9 ~ 1.6 dB,性能值(FoM)为230°/dB。
{"title":"Low-Loss Self-Packaged Full Phase Shift Reflection-Type Phase Shifter Based on Hybrid Integrated Suspended Line Technology","authors":"Jin Wu;Yuefeng Hou;Liqi Yang;Zhenshuai Fu;Meicheng Liu;Dawei Zhang;Mingtao Zhang;Kaixue Ma","doi":"10.1109/TCPMT.2025.3576350","DOIUrl":"https://doi.org/10.1109/TCPMT.2025.3576350","url":null,"abstract":"A low-loss and self-packaged full phase shift reflection-type phase shifter (RTPS) based on the hybrid integrated suspended line (HISL) technology is introduced. The proposed RTPS consists of a 90° branch line coupler and two tunable parallel <italic>L</i>–<italic>C</i> loads connected to the through port and coupled ports. First, an enhanced two-step phase extraction method is proposed, reducing the evaluation state of the RTPS and achieving the minimal phase step while keeping the number of states unchanged. Second, the HISL technology is adopted in the design to achieve low insertion loss (IL). Due to the self-packaging characteristics of HISL, the proposed RTPS effectively avoids interference with surrounding circuits and is highly integrated. Third, the low-power digital tunable capacitor (DTC) with a bus interface is used as the tunable load, making the RTPS easy to integrate into large-scale phased array systems. Finally, a prototype is fabricated by using the sheet metal and PCB process. At the center frequency of 2.45 GHz, the proposed RTPS achieved a measured phase shift range (PSR) of 368° under 128 sweeping states with an IL of 0.9–1.6 dB, and the figure of merit (FoM) is 230°/dB.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 9","pages":"2010-2018"},"PeriodicalIF":3.0,"publicationDate":"2025-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145100409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
期刊
IEEE Transactions on Components, Packaging and Manufacturing Technology
全部 Acc. Chem. Res. ACS Applied Bio Materials ACS Appl. Electron. Mater. ACS Appl. Energy Mater. ACS Appl. Mater. Interfaces ACS Appl. Nano Mater. ACS Appl. Polym. Mater. ACS BIOMATER-SCI ENG ACS Catal. ACS Cent. Sci. ACS Chem. Biol. ACS Chemical Health & Safety ACS Chem. Neurosci. ACS Comb. Sci. ACS Earth Space Chem. ACS Energy Lett. ACS Infect. Dis. ACS Macro Lett. ACS Mater. Lett. ACS Med. Chem. Lett. ACS Nano ACS Omega ACS Photonics ACS Sens. ACS Sustainable Chem. Eng. ACS Synth. Biol. Anal. Chem. BIOCHEMISTRY-US Bioconjugate Chem. BIOMACROMOLECULES Chem. Res. Toxicol. Chem. Rev. Chem. Mater. CRYST GROWTH DES ENERG FUEL Environ. Sci. Technol. Environ. Sci. Technol. Lett. Eur. J. Inorg. Chem. IND ENG CHEM RES Inorg. Chem. J. Agric. Food. Chem. J. Chem. Eng. Data J. Chem. Educ. J. Chem. Inf. Model. J. Chem. Theory Comput. J. Med. Chem. J. Nat. Prod. J PROTEOME RES J. Am. Chem. Soc. LANGMUIR MACROMOLECULES Mol. Pharmaceutics Nano Lett. Org. Lett. ORG PROCESS RES DEV ORGANOMETALLICS J. Org. Chem. J. Phys. Chem. J. Phys. Chem. A J. Phys. Chem. B J. Phys. Chem. C J. Phys. Chem. Lett. Analyst Anal. Methods Biomater. Sci. Catal. Sci. Technol. Chem. Commun. Chem. Soc. Rev. CHEM EDUC RES PRACT CRYSTENGCOMM Dalton Trans. Energy Environ. Sci. ENVIRON SCI-NANO ENVIRON SCI-PROC IMP ENVIRON SCI-WAT RES Faraday Discuss. Food Funct. Green Chem. Inorg. Chem. Front. Integr. Biol. J. Anal. At. Spectrom. J. Mater. Chem. A J. Mater. Chem. B J. Mater. Chem. C Lab Chip Mater. Chem. Front. Mater. Horiz. MEDCHEMCOMM Metallomics Mol. Biosyst. Mol. Syst. Des. Eng. Nanoscale Nanoscale Horiz. Nat. Prod. Rep. New J. Chem. Org. Biomol. Chem. Org. Chem. Front. PHOTOCH PHOTOBIO SCI PCCP Polym. Chem.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1