Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816820
R. Fragasse, R. Tantawy, D. Smith, S. Ay, W. Khalil
An imaging pixel unit-cell topology leveraging a photodiode in the forward-bias region is proposed for the visible and near-infrared spectral ranges. The open-circuit voltage pixel (VocP) architecture applied to visible imaging allows for improvement in the effective responsivity of the photodetector, leading to significant enhancement in pixel sensitivity across a wide spectral-range, while relaxing the requirements on the photodiode, and chosen CMOS process. Theoretical analysis is presented to show the operation, response, and performance benefits of the VocP. The pixel topology has been verified in simulation in a 0.13 μm standard CMOS technology, and has also been embedded in an end-to-end readout system model to show the projected performance compared against a conventional 4T-APS.
{"title":"An Open-Circuit Voltage Pixel for Low-Light Visible Imaging in a Standard CMOS Process","authors":"R. Fragasse, R. Tantawy, D. Smith, S. Ay, W. Khalil","doi":"10.1109/prime55000.2022.9816820","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816820","url":null,"abstract":"An imaging pixel unit-cell topology leveraging a photodiode in the forward-bias region is proposed for the visible and near-infrared spectral ranges. The open-circuit voltage pixel (VocP) architecture applied to visible imaging allows for improvement in the effective responsivity of the photodetector, leading to significant enhancement in pixel sensitivity across a wide spectral-range, while relaxing the requirements on the photodiode, and chosen CMOS process. Theoretical analysis is presented to show the operation, response, and performance benefits of the VocP. The pixel topology has been verified in simulation in a 0.13 μm standard CMOS technology, and has also been embedded in an end-to-end readout system model to show the projected performance compared against a conventional 4T-APS.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"129 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124233989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816837
Paolo Lazzaroni, M. Hammer, M. Manghisoni, A. Miceli, L. Ratti, V. Re
This work reports the current state of the development of a pixelated readout for nanometer resolution X-ray ptychography applications. A very dense, low-noise and low-power pixel developed in a commercial 65nm CMOS technology is envisioned for such applications, targeting a pixel area of 150 μm × 150 μm, an overall noise of 200e- rms and a power consumption of 150μW per pixel. In the paper, an introduction to the application and an overview of the experimental setup are given, the designed frontend channel is reported and revised in its components and simulation results of the schematic-level design are shown and discussed.
{"title":"FALCON readout channel for X-ray ptychography applications","authors":"Paolo Lazzaroni, M. Hammer, M. Manghisoni, A. Miceli, L. Ratti, V. Re","doi":"10.1109/prime55000.2022.9816837","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816837","url":null,"abstract":"This work reports the current state of the development of a pixelated readout for nanometer resolution X-ray ptychography applications. A very dense, low-noise and low-power pixel developed in a commercial 65nm CMOS technology is envisioned for such applications, targeting a pixel area of 150 μm × 150 μm, an overall noise of 200e- rms and a power consumption of 150μW per pixel. In the paper, an introduction to the application and an overview of the experimental setup are given, the designed frontend channel is reported and revised in its components and simulation results of the schematic-level design are shown and discussed.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131355811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816780
Andreas Ott, Federico D'Aniello, A. Baschirotto
In this paper, a direct modulated Power Line Communication (PLC) technique is presented, which realizes the transmitter part by a switched-capacitor (SC) implementation. It is shown that in terms of energy, latency and costs, the presented transmission scheme is an improvement compared to state-of-the-art carrier based solutions. Two variants of the transmitter will be analyzed that use an unshielded twisted-pair (UTP) cable to connect the network nodes differentially, while the supply of the nodes is embedded simultaneously. These PLC approaches have been verified by a discrete component based demonstrator and by a transmitter test chip, fabricated in a 180nm HV-CMOS SOI technology.
{"title":"A Switched Capacitor Approach for Power Line Communication in Differential Networks","authors":"Andreas Ott, Federico D'Aniello, A. Baschirotto","doi":"10.1109/prime55000.2022.9816780","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816780","url":null,"abstract":"In this paper, a direct modulated Power Line Communication (PLC) technique is presented, which realizes the transmitter part by a switched-capacitor (SC) implementation. It is shown that in terms of energy, latency and costs, the presented transmission scheme is an improvement compared to state-of-the-art carrier based solutions. Two variants of the transmitter will be analyzed that use an unshielded twisted-pair (UTP) cable to connect the network nodes differentially, while the supply of the nodes is embedded simultaneously. These PLC approaches have been verified by a discrete component based demonstrator and by a transmitter test chip, fabricated in a 180nm HV-CMOS SOI technology.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132821995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816795
M. Baldo, E. Petroni, L. Laurin, G. Samanni, Octavian Melinc, D. Ielmini, A. Redaelli
Ge enrichment of the GeSbTe (GST) chalcogenide made possible for embedded phase change memories (ePCM) to guarantee the retention level necessary to satisfy the automotive market’s requirements. In Ge-GST devices at the end of the fabrication process memory cells are in the pristine state (virgin) and, in order to be programmed, an activation step is necessary (forming). In this work an investigation on the influence of two back end of the line (BEOL) processes on the virgin state and forming process is presented. A model that accurately replicates both physical and electrical trends is also shown.
{"title":"Interaction between forming pulse and integration process flow in ePCM","authors":"M. Baldo, E. Petroni, L. Laurin, G. Samanni, Octavian Melinc, D. Ielmini, A. Redaelli","doi":"10.1109/prime55000.2022.9816795","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816795","url":null,"abstract":"Ge enrichment of the GeSbTe (GST) chalcogenide made possible for embedded phase change memories (ePCM) to guarantee the retention level necessary to satisfy the automotive market’s requirements. In Ge-GST devices at the end of the fabrication process memory cells are in the pristine state (virgin) and, in order to be programmed, an activation step is necessary (forming). In this work an investigation on the influence of two back end of the line (BEOL) processes on the virgin state and forming process is presented. A model that accurately replicates both physical and electrical trends is also shown.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130034582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816784
Chiara Venezia, A. Ballo, S. Pennisi
This paper proposes a novel solution for CMOS inverter-based comparators with threshold voltage control. The solution was simulated in a 28-nm bulk technology under 0.5-V supply. Extensive simulation results show that a reasonable accuracy in the threshold voltage setting is achieved regardless PVT variations. Outperformed average current consumption of about 125 nA, excluding reference circuitry, and rise/fall time of 7.9 $mu$s suggest wide field of applications for the proposed circuit, ranging from A/D converters to sensors for biomedical applications.
{"title":"A 0.5-V 28-nm CMOS Inverter-Based Comparator with Threshold Voltage Control","authors":"Chiara Venezia, A. Ballo, S. Pennisi","doi":"10.1109/prime55000.2022.9816784","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816784","url":null,"abstract":"This paper proposes a novel solution for CMOS inverter-based comparators with threshold voltage control. The solution was simulated in a 28-nm bulk technology under 0.5-V supply. Extensive simulation results show that a reasonable accuracy in the threshold voltage setting is achieved regardless PVT variations. Outperformed average current consumption of about 125 nA, excluding reference circuitry, and rise/fall time of 7.9 $mu$s suggest wide field of applications for the proposed circuit, ranging from A/D converters to sensors for biomedical applications.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117325362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816799
Rafael de la Rosa-Vidal, Rubén Gómez-Merchán, J. A. Leñero-Bardallo, Á. Rodríguez-Vázquez
We present a new tool, PixiStamp, to readout, process, and sequence data of event-driven systems that exchange data using the Address Event Representation (AER) protocol. PixiStamp is a compact acquisition board that can be easily attached to other devices. Over other existing solutions, it has enhanced hardware processing capabilities to process AER data and generate control signals after data processing, making possible a closed-loop device control. The article describes in detail the system architecture, its mechanical design, and its main features.
{"title":"PixiStamp: A tool to acquire, process, and sequence AER data from event-driven systems","authors":"Rafael de la Rosa-Vidal, Rubén Gómez-Merchán, J. A. Leñero-Bardallo, Á. Rodríguez-Vázquez","doi":"10.1109/prime55000.2022.9816799","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816799","url":null,"abstract":"We present a new tool, PixiStamp, to readout, process, and sequence data of event-driven systems that exchange data using the Address Event Representation (AER) protocol. PixiStamp is a compact acquisition board that can be easily attached to other devices. Over other existing solutions, it has enhanced hardware processing capabilities to process AER data and generate control signals after data processing, making possible a closed-loop device control. The article describes in detail the system architecture, its mechanical design, and its main features.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126087098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816768
Rubén Gómez-Merchán, Rafael de la Rosa-Vidal, J. A. Leñero-Bardallo, Á. Rodríguez-Vázquez
Energy harvesting plays a crucial role in low-power systems and Internet-of-Things (IoT) sensing nodes. Measuring the illumination level of the scene is desired in such applications. Few studies have explored the possibility of designing image sensors that use photodiodes to harvest energy from the scene to reduce consumption or even achieve a self-powered operation using frame-based approaches. This work aims to validate the switching capabilities of photodiodes independently within a photodiode array. While most studies focus on alternating the harvesting and sensing operation in two different phases, in this approach a fraction of the photodiodes are connected to a global node to harvest energy, while the rest are sensing. This configuration qualifies to design asynchronous imagers and optimize the harvesting operation. The preliminary experimental results reported in this publication emphasize the validity of this asynchronous switching in photodiode arrays.
{"title":"On the implementation of in-pixel controlled diodes with sensing and energy harvesting capabilities","authors":"Rubén Gómez-Merchán, Rafael de la Rosa-Vidal, J. A. Leñero-Bardallo, Á. Rodríguez-Vázquez","doi":"10.1109/prime55000.2022.9816768","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816768","url":null,"abstract":"Energy harvesting plays a crucial role in low-power systems and Internet-of-Things (IoT) sensing nodes. Measuring the illumination level of the scene is desired in such applications. Few studies have explored the possibility of designing image sensors that use photodiodes to harvest energy from the scene to reduce consumption or even achieve a self-powered operation using frame-based approaches. This work aims to validate the switching capabilities of photodiodes independently within a photodiode array. While most studies focus on alternating the harvesting and sensing operation in two different phases, in this approach a fraction of the photodiodes are connected to a global node to harvest energy, while the rest are sensing. This configuration qualifies to design asynchronous imagers and optimize the harvesting operation. The preliminary experimental results reported in this publication emphasize the validity of this asynchronous switching in photodiode arrays.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127935969","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816750
Federica Benedini, Luca Sant, R. Gaggl, A. Baschirotto
In this paper a low-power, low-noise interface for Micro Electro-Mechanical System (MEMS) silicon microphones built in a 55 nm MOSFET technology is presented. The designed interface is made up by a pseudo-differential structure, based on two single-ended Super-Source-Followers with PMOS input device, to reduce Flicker noise contribution that would affect low frequency applications. The challenge of this design regards the implementation in 55 nm of high performance analog cells. The device performs output integrated noise in the [20 Hz 20 kHz] audio band of about -110 dBV(A), with a total power consumption of 270 $mu{mathrm W}$ from a 1.5 V voltage supply. Acoustic Overload Point (AOP) reaches a mean value of 130 dBspl.
{"title":"A 55nm Low-Noise Super-Source-Follower Preamplifier for MEMS Microphones","authors":"Federica Benedini, Luca Sant, R. Gaggl, A. Baschirotto","doi":"10.1109/prime55000.2022.9816750","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816750","url":null,"abstract":"In this paper a low-power, low-noise interface for Micro Electro-Mechanical System (MEMS) silicon microphones built in a 55 nm MOSFET technology is presented. The designed interface is made up by a pseudo-differential structure, based on two single-ended Super-Source-Followers with PMOS input device, to reduce Flicker noise contribution that would affect low frequency applications. The challenge of this design regards the implementation in 55 nm of high performance analog cells. The device performs output integrated noise in the [20 Hz 20 kHz] audio band of about -110 dBV(A), with a total power consumption of 270 $mu{mathrm W}$ from a 1.5 V voltage supply. Acoustic Overload Point (AOP) reaches a mean value of 130 dBspl.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127181355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816840
Ayman Sakr, Mohamed Atef Hassan, Khubaib Khan, M. Kern, J. Anders
This paper presents an amplitude control loop (ACL) for VCO-array-based electron paramagnetic resonance (EPR) detectors. The proposed ACL enhances the microwave magnetic field (B1) stability over the whole VCO frequency sweep range, against different sample environments and at varying experimental conditions. By introducing a distributed amplitude detection scheme, the proposed ACL implementation can regulate B1 field intensities in injection-locked VCO arrays with reduced loading effects and minimal phase noise degradation. Extracted-level circuit simulations on an example VCO array implementation demonstrate the functionality and excellent achievable performance of the proposed approach.
{"title":"A distributed amplitude control loop for VCO-array-based EPR-on-a-chip detectors","authors":"Ayman Sakr, Mohamed Atef Hassan, Khubaib Khan, M. Kern, J. Anders","doi":"10.1109/prime55000.2022.9816840","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816840","url":null,"abstract":"This paper presents an amplitude control loop (ACL) for VCO-array-based electron paramagnetic resonance (EPR) detectors. The proposed ACL enhances the microwave magnetic field (B1) stability over the whole VCO frequency sweep range, against different sample environments and at varying experimental conditions. By introducing a distributed amplitude detection scheme, the proposed ACL implementation can regulate B1 field intensities in injection-locked VCO arrays with reduced loading effects and minimal phase noise degradation. Extracted-level circuit simulations on an example VCO array implementation demonstrate the functionality and excellent achievable performance of the proposed approach.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127387588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-12DOI: 10.1109/prime55000.2022.9816804
E. D. Mallemace, T. Crisci, F. D. Corte, S. Rao, M. Casalino
Silicon Carbide (SiC), with its superior electronic properties, is recognized as one of the most promising candidates for the new generation of optoelectronic devices. In the present work, a preliminary study about a graphene/4H-SiC Schottky junction photodiode operating in the near-infrared (NIR) spectral range was performed. In particular, we report about the fabrication and the electro-optical characterization of the first - to the best of our knowledge - graphene/4H-SiC-based Schottky near-infrared photodetector. Ten devices, with the same geometry, were electrically characterized, the I-V plot shows a good rectifying behavior, with a series resistance of 60±23 Ω, an ideality factor of 7±1, and a zero-bias Schottky barrier height of 0.55±0.05 eV. Concerning the optical characterization, it was performed at the wavelength of λ=785 nm, which is far away from the absorption edge of the used wide bandgap semiconductor. The maximum internal responsivity without bias-voltage was evaluated as 0.12 mA/W. Even if the measured responsivity is still limited, we believe that this device can pave the way to investigations on near-infrared Schottky photodetectors based on graphene/4H-SiC junctions, useful for communications at the common fiber optic wavelengths.
{"title":"Near-Infrared Graphene/4H-SiC Schottky Photodetectors","authors":"E. D. Mallemace, T. Crisci, F. D. Corte, S. Rao, M. Casalino","doi":"10.1109/prime55000.2022.9816804","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816804","url":null,"abstract":"Silicon Carbide (SiC), with its superior electronic properties, is recognized as one of the most promising candidates for the new generation of optoelectronic devices. In the present work, a preliminary study about a graphene/4H-SiC Schottky junction photodiode operating in the near-infrared (NIR) spectral range was performed. In particular, we report about the fabrication and the electro-optical characterization of the first - to the best of our knowledge - graphene/4H-SiC-based Schottky near-infrared photodetector. Ten devices, with the same geometry, were electrically characterized, the I-V plot shows a good rectifying behavior, with a series resistance of 60±23 Ω, an ideality factor of 7±1, and a zero-bias Schottky barrier height of 0.55±0.05 eV. Concerning the optical characterization, it was performed at the wavelength of λ=785 nm, which is far away from the absorption edge of the used wide bandgap semiconductor. The maximum internal responsivity without bias-voltage was evaluated as 0.12 mA/W. Even if the measured responsivity is still limited, we believe that this device can pave the way to investigations on near-infrared Schottky photodetectors based on graphene/4H-SiC junctions, useful for communications at the common fiber optic wavelengths.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126934784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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