Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015835
W. Y. Sam, Z. Zakaria, M. A. Mutalib, M. Fadhli, A. R. Othman, A. Isa
This paper presents compact structure of bandstop filter with Defected Microstrip Structure (DMS) to produce a triple - band reject response. To prove the concept of the narrow notched DMS, the operating on centre frequency of 4.0 GHz is demonstrated and validated through simulation. The DMS structure is embedded in the middle of transmission lines in order to reject any undesired signals which may interfere with any communication systems. The design was simulated based on Roger Duroid RO4350B with a thickness of 0.508 mm and dielectric constant of 3.48. This type of filter is useful in any RF/ microwave communication systems, particularly to eliminate any undesired signals in wideband spectrum. While maintaining its excellent performance, the overall physical and cost reduction can also be achieved using this technique.
{"title":"A compact DMS triple-band bandstop filter with U-slots for communication systems","authors":"W. Y. Sam, Z. Zakaria, M. A. Mutalib, M. Fadhli, A. R. Othman, A. Isa","doi":"10.1109/ICED.2014.7015835","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015835","url":null,"abstract":"This paper presents compact structure of bandstop filter with Defected Microstrip Structure (DMS) to produce a triple - band reject response. To prove the concept of the narrow notched DMS, the operating on centre frequency of 4.0 GHz is demonstrated and validated through simulation. The DMS structure is embedded in the middle of transmission lines in order to reject any undesired signals which may interfere with any communication systems. The design was simulated based on Roger Duroid RO4350B with a thickness of 0.508 mm and dielectric constant of 3.48. This type of filter is useful in any RF/ microwave communication systems, particularly to eliminate any undesired signals in wideband spectrum. While maintaining its excellent performance, the overall physical and cost reduction can also be achieved using this technique.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132334291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015841
Y. N. Jurn, M. F. Malek, Wei‐Wen Liu, Haider K. Hoomod
This work investigates the fundamental properties of armchair single-wall carbon nanotubes (armchair-SWCNTs) dipole antenna at THz band using Drude method. Due to their metallic conducting properties, the armchair SWCNTs will be utilized in this work. The radiation pattern, s11 parameters, phase velocity and antenna directivity are presented for this antenna. The results demonstrate that armchair-SWCNTs dipole antenna with a radius of 2.71 nm takes on the resonant frequency properties from 1THz to 18THz, corresponding antenna lengths 1500nm to 50nm. All results in this work can be used for design of CNTs antenna (armchair-SWCNTs antenna) in wide THz band. The evaluation of the antenna's performance was done using Computer Simulation Technology (Microwave studio) CST (MWS), which exhibited and analyzed the key parameters of the antenna.
{"title":"Investigation of single-wall carbon nanotubes at THz antenna","authors":"Y. N. Jurn, M. F. Malek, Wei‐Wen Liu, Haider K. Hoomod","doi":"10.1109/ICED.2014.7015841","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015841","url":null,"abstract":"This work investigates the fundamental properties of armchair single-wall carbon nanotubes (armchair-SWCNTs) dipole antenna at THz band using Drude method. Due to their metallic conducting properties, the armchair SWCNTs will be utilized in this work. The radiation pattern, s11 parameters, phase velocity and antenna directivity are presented for this antenna. The results demonstrate that armchair-SWCNTs dipole antenna with a radius of 2.71 nm takes on the resonant frequency properties from 1THz to 18THz, corresponding antenna lengths 1500nm to 50nm. All results in this work can be used for design of CNTs antenna (armchair-SWCNTs antenna) in wide THz band. The evaluation of the antenna's performance was done using Computer Simulation Technology (Microwave studio) CST (MWS), which exhibited and analyzed the key parameters of the antenna.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131265454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015779
M. Ong, N. El-Hassan, T. N. Kumar, H. Almurib
This paper presents a novel LTSPICE based Phase Change Memory (PCM) cell emulator model, using only off the shelf discrete electronic components. The electrical based model simulates not only the continuous resistance change (as corresponding to amorphous and crystalline phases), but also the temperature profile across the cell during programming, while assessing the impact of the programming time. The designed emulator circuit is able to fully characterize the holding voltage and generate the standard I-V characteristic curve of a PCM cell, and possesses the operational features of an actual PCM element. The simulation results are found to be in close agreement to experimental data.
{"title":"A novel emulator design for phase change memory cell","authors":"M. Ong, N. El-Hassan, T. N. Kumar, H. Almurib","doi":"10.1109/ICED.2014.7015779","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015779","url":null,"abstract":"This paper presents a novel LTSPICE based Phase Change Memory (PCM) cell emulator model, using only off the shelf discrete electronic components. The electrical based model simulates not only the continuous resistance change (as corresponding to amorphous and crystalline phases), but also the temperature profile across the cell during programming, while assessing the impact of the programming time. The designed emulator circuit is able to fully characterize the holding voltage and generate the standard I-V characteristic curve of a PCM cell, and possesses the operational features of an actual PCM element. The simulation results are found to be in close agreement to experimental data.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132707162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015770
S. M. Saad, A. Y. Md Shakaff, A. R. M. Saad, A. Kamarudin
Indoor air quality is a rising issue these days. People are becoming are of the importance of indoor air quality. This paper further advances the technology for indoor air quality surveillance by adding an index feature to it. The index feature, accompanied with real-time monitoring system is very useful in giving the real-time alert to the users on the conditions of the current indoor air quality. This index is very handy because human being's ability to detect the changes in the air quality is limited while the changes in the air quality may be rapid. The index helps the users to recognize the conditions of the air instantly by giving four signals, good, normal, unhealthy and hazardous. The index is developed based on the index used in the outside environment but by emphasizing on the internal air quality elements.
{"title":"Implementation of index for real-time monitoring indoor air quality system","authors":"S. M. Saad, A. Y. Md Shakaff, A. R. M. Saad, A. Kamarudin","doi":"10.1109/ICED.2014.7015770","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015770","url":null,"abstract":"Indoor air quality is a rising issue these days. People are becoming are of the importance of indoor air quality. This paper further advances the technology for indoor air quality surveillance by adding an index feature to it. The index feature, accompanied with real-time monitoring system is very useful in giving the real-time alert to the users on the conditions of the current indoor air quality. This index is very handy because human being's ability to detect the changes in the air quality is limited while the changes in the air quality may be rapid. The index helps the users to recognize the conditions of the air instantly by giving four signals, good, normal, unhealthy and hazardous. The index is developed based on the index used in the outside environment but by emphasizing on the internal air quality elements.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124229012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015861
Anwar Faizd Osman, N. Mohd Noh, M. T. Mustaffa, Asrulnizam Abd Manaf
This paper describes the design of two wideband LNA topologies for TIA-603 software defined radio (SDR) applications. The two LNA designs are the negative feedback and the balanced amplifier. The negative feedback employs the resistive drain to gate feedback whereas the balanced amplifier incorporates a compact 3dB branch line coupler. Both designs utilized the GaAs transistor, operated by a 5V DC supply and were implemented in a RO4003 PCB. Comparing the performance of the two designs, the balanced amplifier achieved the best RF performance with a stable gain of at least 17.5dB, noise figure lower than 1.03dB, input and output return loss of greater than 11dB and IIP3 of at least 14dBm, which makes it comparable to previously published works.
{"title":"Comparison of wideband LNA designs for SDR applications","authors":"Anwar Faizd Osman, N. Mohd Noh, M. T. Mustaffa, Asrulnizam Abd Manaf","doi":"10.1109/ICED.2014.7015861","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015861","url":null,"abstract":"This paper describes the design of two wideband LNA topologies for TIA-603 software defined radio (SDR) applications. The two LNA designs are the negative feedback and the balanced amplifier. The negative feedback employs the resistive drain to gate feedback whereas the balanced amplifier incorporates a compact 3dB branch line coupler. Both designs utilized the GaAs transistor, operated by a 5V DC supply and were implemented in a RO4003 PCB. Comparing the performance of the two designs, the balanced amplifier achieved the best RF performance with a stable gain of at least 17.5dB, noise figure lower than 1.03dB, input and output return loss of greater than 11dB and IIP3 of at least 14dBm, which makes it comparable to previously published works.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123698028","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015809
Ahmad Hafiz Mohamad Razy, S. Z. M. Naziri, R. C. Ismail, N. Idris
The best security factor in any encryption algorithm is the random values used in key management or the structure of the algorithm itself. Thus, some of the encryption algorithm employed random number generator to produce this type of numbers. This paper describes the process of selecting the most efficient algorithm to represent the hardware RNG for the usage in cryptography. For this purpose, a number of RNG algorithms are selected and analyzed in terms of the sequence's randomness using theoretical simulator analysis. Among of the algorithms, the Inverse Congruential Generator algorithm was chosen based on the analysis as it provides the most high quality random sequence and insensitivity in initial condition. The algorithm was further proceed to the NIST test for non-randomness test and it shown reasonable complexity. The design was proven to be implemented successfully on hardware as it then been designed using Verilog HDL and been simulated and verified using Altera QuartusII 9.0sp2 web edition software. The design utilized 7,711 logic elements of Cyclone EP1C20F400C6. Benefited the usage of FPGA, the design could possibly provide reduction in size of the RNG, low power consumption and low cost production for hardware-based encryption.
{"title":"Investigation and design of the efficient hardware-based RNG for cryptographic applications","authors":"Ahmad Hafiz Mohamad Razy, S. Z. M. Naziri, R. C. Ismail, N. Idris","doi":"10.1109/ICED.2014.7015809","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015809","url":null,"abstract":"The best security factor in any encryption algorithm is the random values used in key management or the structure of the algorithm itself. Thus, some of the encryption algorithm employed random number generator to produce this type of numbers. This paper describes the process of selecting the most efficient algorithm to represent the hardware RNG for the usage in cryptography. For this purpose, a number of RNG algorithms are selected and analyzed in terms of the sequence's randomness using theoretical simulator analysis. Among of the algorithms, the Inverse Congruential Generator algorithm was chosen based on the analysis as it provides the most high quality random sequence and insensitivity in initial condition. The algorithm was further proceed to the NIST test for non-randomness test and it shown reasonable complexity. The design was proven to be implemented successfully on hardware as it then been designed using Verilog HDL and been simulated and verified using Altera QuartusII 9.0sp2 web edition software. The design utilized 7,711 logic elements of Cyclone EP1C20F400C6. Benefited the usage of FPGA, the design could possibly provide reduction in size of the RNG, low power consumption and low cost production for hardware-based encryption.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115566102","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015810
Ooi Chip Pin, A. B. Jambek, S. Yaacob
This paper discusses the circuit comparison of the electrocardiogram (ECG) heart rate detector for wearable biomedical devices. In this work, the QRS complex is used to calculate heart rate, representing the main component of the ECG signal. In order to achieve a high level of accuracy by the detector, the measured ECG signal must be free of noise. Typically, such noise originates from power line interferences and baseline wandering. To eliminate these noises, the ECG signal must be processed using the signal processing method. The ECG detection process can be divided into a preprocessing stage, which eliminates noise from the raw ECG signal, and the feature extraction stage, which extracts the QRS complex for heart rate calculation. Based on our analysis, the trade-off between complexity and accuracy in ECG signal architecture is important when designing a high-efficiency system.
{"title":"Circuit architectures reviews for portable ECG signal analyzer","authors":"Ooi Chip Pin, A. B. Jambek, S. Yaacob","doi":"10.1109/ICED.2014.7015810","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015810","url":null,"abstract":"This paper discusses the circuit comparison of the electrocardiogram (ECG) heart rate detector for wearable biomedical devices. In this work, the QRS complex is used to calculate heart rate, representing the main component of the ECG signal. In order to achieve a high level of accuracy by the detector, the measured ECG signal must be free of noise. Typically, such noise originates from power line interferences and baseline wandering. To eliminate these noises, the ECG signal must be processed using the signal processing method. The ECG detection process can be divided into a preprocessing stage, which eliminates noise from the raw ECG signal, and the feature extraction stage, which extracts the QRS complex for heart rate calculation. Based on our analysis, the trade-off between complexity and accuracy in ECG signal architecture is important when designing a high-efficiency system.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125256915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015821
S. Hashim, U. Chandaran, Z. A. Halim
This paper analyzes power consumption of microelectromechanical-system (MEMS) heater design in combination with Negative Temperature Coefficient (NTC) thermistor in Wheatstone bridge circuit. The simulation of heater design is carried out based on the minimal power usage depends on heater shape, resistance and current supply. Temperature measurement of the heater is recorded through resistive sensor, which is NTC thermistor. Resistance value of thermistor is selected based on the heater design parameters. For temperature readout circuit, NTC thermistor and heater is combined together in Wheatstone bridge. Results show that by using Wheatstone bridge principle, it offers the simplest and low cost application especially for microheater gas sensor array design.
{"title":"Temperature sensor readout circuit for microheaters","authors":"S. Hashim, U. Chandaran, Z. A. Halim","doi":"10.1109/ICED.2014.7015821","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015821","url":null,"abstract":"This paper analyzes power consumption of microelectromechanical-system (MEMS) heater design in combination with Negative Temperature Coefficient (NTC) thermistor in Wheatstone bridge circuit. The simulation of heater design is carried out based on the minimal power usage depends on heater shape, resistance and current supply. Temperature measurement of the heater is recorded through resistive sensor, which is NTC thermistor. Resistance value of thermistor is selected based on the heater design parameters. For temperature readout circuit, NTC thermistor and heater is combined together in Wheatstone bridge. Results show that by using Wheatstone bridge principle, it offers the simplest and low cost application especially for microheater gas sensor array design.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125427627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015803
L. Said, A. Madian, A. Radwan, A. Soliman
This paper generalizes the concept of the oscillators based on the operational transresistance amplifier (OTRA) into the fractional order domain. The added parameter in the fractional-order design is an important in practical and can model the non-ideality of the conventional capacitors. The general condition and frequency of oscillation have been derived analytically in terms of the circuit components and the fractional order parameters. Different special cases are introduced based on the extra fractional-order parameters in which some features are appeared in the fractional-order circuit only. Through the proposed circuit, the phase and frequency can be controlled individually via the fractional order parameters. Numerical and Spice simulation results of different fractional-order oscillators are presented to validate the analytical formulas.
{"title":"Fractional order oscillator with independent control of phase and frequency","authors":"L. Said, A. Madian, A. Radwan, A. Soliman","doi":"10.1109/ICED.2014.7015803","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015803","url":null,"abstract":"This paper generalizes the concept of the oscillators based on the operational transresistance amplifier (OTRA) into the fractional order domain. The added parameter in the fractional-order design is an important in practical and can model the non-ideality of the conventional capacitors. The general condition and frequency of oscillation have been derived analytically in terms of the circuit components and the fractional order parameters. Different special cases are introduced based on the extra fractional-order parameters in which some features are appeared in the fractional-order circuit only. Through the proposed circuit, the phase and frequency can be controlled individually via the fractional order parameters. Numerical and Spice simulation results of different fractional-order oscillators are presented to validate the analytical formulas.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117089502","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-08-01DOI: 10.1109/ICED.2014.7015799
Mohammad Ali Sarvghadi, T. Wan
The emergence of Wireless Sensor Networks (WSNs) applications such as localizing, tracking, surveillance, speedometers, and so on, synchronizing sensor motes' clocks is essential in WSNs. Thus, many time synchronization protocols are proposed in recent decade to get network wide synchronization. Each of those protocols strives to get a good precision in different ways. This paper aims to review some of the main protocols and classify them based on their scope, topology structure, and dynamicity then analyzes them based on three criteria of accuracy, robustness, and computation load. At the end a comparison is done for the reviewed protocols.
{"title":"Overview of time synchronization protocols in wireless sensor networks","authors":"Mohammad Ali Sarvghadi, T. Wan","doi":"10.1109/ICED.2014.7015799","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015799","url":null,"abstract":"The emergence of Wireless Sensor Networks (WSNs) applications such as localizing, tracking, surveillance, speedometers, and so on, synchronizing sensor motes' clocks is essential in WSNs. Thus, many time synchronization protocols are proposed in recent decade to get network wide synchronization. Each of those protocols strives to get a good precision in different ways. This paper aims to review some of the main protocols and classify them based on their scope, topology structure, and dynamicity then analyzes them based on three criteria of accuracy, robustness, and computation load. At the end a comparison is done for the reviewed protocols.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126255922","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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