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2000 10th Mediterranean Electrotechnical Conference. Information Technology and Electrotechnology for the Mediterranean Countries. Proceedings. MeleCon 2000 (Cat. No.00CH37099)最新文献

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On-line adaptive RBF network in stationary and nonstationary environment 平稳和非平稳环境下的在线自适应RBF网络
B. Todorovic, M. Stankovic, S. Todorovic-Zarkula
Sequential adaptation of RBF network parameters and structure is achieved using extended Kalman filter (EKF). Criterion for network growing is obtained from Kalman filter's consistency test The optimal brain surgeon and optimal brain damage pruning methods are derived for networks which parameters are estimated by EKF. Criteria for neurons/connections pruning are based on the statistical parameter significance test.
利用扩展卡尔曼滤波(EKF)实现了RBF网络参数和结构的顺序自适应。通过卡尔曼滤波的一致性检验,得到了网络生长的判据,导出了由EKF估计参数的网络的最优脑外科医生和最优脑损伤修剪方法。神经元/连接修剪的标准基于统计参数显著性检验。
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引用次数: 0
Noise wave modeling of microwave transistors [MESFETs] 微波晶体管[mesfet]的噪声波建模
N. Males-Ilic, V. Markovic, O. Pronic
This paper presents a new procedure for noise modeling of microwave transistors based on the wave approach. The correlation matrix elements are calculated in terms of three equivalent noise temperatures. The strength of noise wave sources and correlation coefficient are shown graphically as a function of frequency and discussed. Also, the transistor noise parameters are determined from calculated noise wave sources by using microwave circuit simulator Libra.
本文提出了一种基于波法的微波晶体管噪声建模新方法。根据三个等效噪声温度计算相关矩阵元素。噪声波源的强度和相关系数以图形形式表示为频率的函数,并进行了讨论。利用微波电路模拟器Libra,从计算得到的噪声波源确定晶体管的噪声参数。
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引用次数: 0
CMOS mixed digital analog reconfigurable neural network with Gaussian synapses 具有高斯突触的CMOS混合数字模拟可重构神经网络
A.N. Al-Zeftawi, K.M. Abd El-Fattah, H. Shanan, T. Kamel
In the neuromorphic arena, different engineering problems require different neural network topologies. In view of this concept, the motivation was to build a reconfigurable neural network chip. The distributed Gaussian-neuron synapse is introduced as a new type of synapses. Also a new improved resolution current-mode winner-takes-all circuit is added to realize a self-organizing topology. The chip is organized into 4 partially connected tiles with 4/spl times/3 fully connected neurons per tile. The chip was fabricated through MOSIS in 1.2 /spl mu/m AMI CMOS process occupying an area of 2 mm /spl times/2 mm.
在神经形态领域,不同的工程问题需要不同的神经网络拓扑结构。基于这个概念,我们的动机是构建一个可重构的神经网络芯片。分布式高斯神经元突触是一种新的突触类型。此外,还增加了一种新的改进分辨率的电流模式赢家通吃电路,以实现自组织拓扑结构。芯片被组织成4个部分连接的块,每个块有4/spl倍/3个完全连接的神经元。该芯片采用1.2 /spl mu/m AMI CMOS工艺,面积为2mm /spl × / 2mm,采用MOSIS工艺制备。
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引用次数: 1
The development of an ISO 9000 quality management system to meet the requirements of the European Foundation for Quality Management (EFQM) model-the Cyprus Telecommunications Authority's case 开发ISO 9000质量管理体系,以满足欧洲质量管理基金会(EFQM)模式的要求——塞浦路斯电信管理局的案例
M. Achilleos, G. Ioannou
The Cyprus Telecommunications Authority's (CYTA) modernisation programme focuses on the use of business process re-engineering tools in order to improve the organisation's customer focus and people focus orientation with parallel improvements in productivity, and the ability to develop and offer products and services with market improvements in operational flexibility. The Authority, in its search to find a modern management model able to support this modernisation programme and its path towards excellence, has opted for the European Foundation for Quality Management excellence model. In a parallel but not separated move, the Authority has decided to embark on the development and implementation of the ISO 9000 quality systems standard in its customer service operations. The first such system to be certified in June 1999, was the Authority's Limassol Customer Order Fulfillment Department and the second was the whole of the Customer Services in the area of Larnaca. The purpose of this paper is firstly to define how an ISO 9000 certified business unit can be measured against the requirements of the EFQM model and secondly outline a plan of action that could be used to guide this business unit towards the EFQM model of excellence.
塞浦路斯电信管理局(CYTA)的现代化计划侧重于使用业务流程重新设计工具,以提高组织以客户为中心和以人为中心的导向,同时提高生产力,以及开发和提供产品和服务的能力,同时提高市场运营灵活性。管理局在寻找一种现代管理模式,能够支持这一现代化计划,并朝着卓越的方向发展,因此选择了欧洲质量管理卓越基金会模式。与此同时,房委会亦决定在其客户服务工作中推行iso9000质量体系标准。第一个这样的系统于1999年6月获得认证,是管理局的利马索尔客户订单履行部,第二个是拉纳卡地区的整个客户服务部门。本文的目的首先是定义如何根据EFQM模型的要求来衡量ISO 9000认证的业务单位,其次概述了可用于指导该业务单位实现EFQM卓越模型的行动计划。
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引用次数: 5
Spectral overlay of spread spectrum broadcasting system for digital video delivery on analog TV band: a preliminary estimate 模拟电视频带数字视频传输扩频广播系统的频谱叠加:初步估计
D. Dres, P. Constantinou, A. Kastereli
The paper examines the conditions under which analog television and a spread spectrum system can share spectrum. After a preliminary assessment and a limited number of laboratory measurements which support the conclusions of the paper, the paper concludes that the interference caused by a constant amplitude spread spectrum system should be comparable to that caused by a conventional, narrowband FM signal of same total power, provided the spread spectrum signal has an RF bandwidth less than 2 MHz. With spectrum spreads greater than 8 MHz the spread spectrum system should have some advantage. Furthermore, in order to examine the interference caused by the TV signal in the spread spectrum system a simple mathematical equation representing the power spectrum of the TV signal is derived, and a general formulation of the bit error rate of a conventional BPSK/QPSK spread spectrum system is represented.
本文探讨了模拟电视与扩频系统共享频谱的条件。在初步评估和有限数量的实验室测量支持本文的结论后,本文得出结论,恒定振幅扩频系统引起的干扰应该与相同总功率的传统窄带调频信号引起的干扰相当,前提是扩频信号的RF带宽小于2mhz。当频谱扩展大于8mhz时,扩频系统应该具有一定的优势。此外,为了研究电视信号对扩频系统的干扰,推导了一个表示电视信号功率谱的简单数学方程,并给出了传统BPSK/QPSK扩频系统误码率的一般公式。
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引用次数: 1
Broadband services delivery over an ATM PON FTTx system 通过ATM PON FTTx系统提供宽带服务
C. Pantjiaros, C. Combes, R. van Wolfswinkel, P. McDonagh, K.I. Sletta, S. Panis, N. Charalambous
The specification of a cost-effective full services access network (FSAN) has been the target and ambition of telecommunications operators. With such fully managed architecture the telecommunications operator can be sure of providing the variety of narrowband and broadband services including digital broadcast services, video on demand, IP services and traditional telecommunication services including POTs, ISDN, ATM and circuit emulation. In 1999, EURESCOM has launched the BOBAN project which considers the evaluation and testing of new broadband access technologies in a field, or lab trial environment. A primary consideration is the evaluation of FSAN-like systems and the interconnection to service platforms for the provisioning of symmetric and asymmetric broadband services, including point-to-point and point-to-multipoint broadcast services. More specifically, the scope of part of this program is to evaluate, in the field or laboratory, FTTCab/B/H solutions with connections to service platforms. The document presents a description of this on-going project.
具有成本效益的全业务接入网(FSAN)规范一直是电信运营商的目标和抱负。有了这种完全管理的架构,电信运营商可以确保提供各种窄带和宽带业务,包括数字广播业务、视频点播、IP业务和传统电信业务,包括POTs、ISDN、ATM和电路仿真。1999年,EURESCOM启动了BOBAN项目,该项目考虑在现场或实验室试验环境中评估和测试新的宽带接入技术。主要考虑的是评估类似fsan的系统和服务平台的互连,以提供对称和非对称宽带服务,包括点对点和点对多点广播服务。更具体地说,该项目的部分范围是在现场或实验室评估连接到服务平台的FTTCab/B/H解决方案。该文档描述了这个正在进行的项目。
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引用次数: 2
A neural network sidelobe suppression filter for a pulse-compression radar with powers-of-two weights 一种用于二权幂脉冲压缩雷达的神经网络旁瓣抑制滤波器
Y. Grishin, A. Zankiewicz
A new compression filter for binary coded wideband digital signals with sidelobe reduction capabilities using a feedforward time-delay neural network is considered. This filter uses powers-of-two synaptic weights and the backpropagation learning algorithm. Using digital hardware implementation of such a filter for pulse compression is easier owing to elimination of multipliers. The simulation results showed that the time sidelobes of the output signal can be reduced up to about 60 dB. The quantization of the filter weights causes additional losses of about 6-14 dB depending on the input signal to noise ratio.
提出了一种基于前馈时滞神经网络的具有旁瓣抑制能力的二值编码宽带数字信号压缩滤波器。该滤波器使用2次幂突触权重和反向传播学习算法。由于消除了乘法器,使用数字硬件实现这种脉冲压缩滤波器更容易。仿真结果表明,输出信号的时间副瓣可以降低到60 dB左右。根据输入信噪比的不同,滤波器权重的量化会造成约6-14 dB的额外损失。
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引用次数: 2
PTAT sensors based on SJFETs 基于sjfet的PTAT传感器
S. Amon, D. Vrtacnik, D. Rsnik, D. Križaj, U. Aljancic, M. Mozek
A new PTAT temperature sensor is studied. Sensor structure is based on the recently introduced SJFET approach, enabling device isolation/integration on the same chip and being compatible with micromachining. The approach is based on the well-established discrete silicon device bipolar technology. Test PTAT structures were designed, fabricated and characterized. Measurements on fabricated test PTAT structures revealed good sensitivity, stability and linearity of sensor response.
研究了一种新型PTAT温度传感器。传感器结构基于最近推出的SJFET方法,在同一芯片上实现器件隔离/集成,并与微加工兼容。该方法基于成熟的离散硅器件双极技术。测试PTAT结构进行了设计、制作和表征。对制备的PTAT测试结构的测量表明,该传感器具有良好的灵敏度、稳定性和线性度。
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引用次数: 0
High impedance arcing fault detector for three-wire power distribution networks 三线制配电网高阻抗电弧故障检测器
A. Lazkano, J. Ruiz, L. Leturiondo, E. Aramendi
A new approach to a high impedance fault (HIF) detector is presented, suitable for the European scene where the power distribution systems are usually three-phase and three-wire configured. This paper aims to be a contribution to the proposals that, in the last twenty years, have been trying to solve the HIF problem with no definitive solution known yet. The purpose of the study presented is to design an electric arc detector and characterise the danger of the fault looking at fault context conditions. The detector system input signals are the three individual phase currents which comply with 3I/sub 0/=I/sub 1/+I/sub 2/+I/sub 3//spl ne/0 at the three-wire configuration. First, a continuous HIF context conditions study is proposed: overcurrent or reclosing in every phase, noticeable load variation monitoring and 3I/sub 0/ monitoring. Secondly, a short, medium and long-term statistical analysis is performed both with odd harmonics (third, fifth, seventh and ninth) and even harmonics (second and fourth) of the I/sub 0/ current. Thirdly, the estimated arc probability is calculated and combined with context conditions in order to determine a diagnosis. The proposed detector has been tested on 100 unfaulted condition event records (some have leakage current) and 32 staged fault records on different surfaces. The test results presented in the paper are satisfactory both in the sense of dependability and sensitivity.
提出了一种适用于欧洲配电系统通常采用三相三线制的高阻抗故障检测器的新方法。在过去的二十年里,人们一直在试图解决HIF问题,但目前还没有明确的解决方案,本文旨在为这些建议做出贡献。本研究的目的是设计一个电弧探测器,并根据故障环境条件来表征故障的危险。检测器系统输入信号是三个独立的相电流,在三线制配置下符合3I/sub 0/=I/sub 1/+I/sub 2/+I/sub 3//spl ne/0。首先,提出了一个连续的HIF环境条件研究:每个相位的过流或重合闸,明显的负载变化监测和3I/sub 0/监测。其次,对I/sub 0/电流的奇次谐波(三次、五次、七次和九次)和偶次谐波(二次和四次)进行了短期、中期和长期统计分析。第三,计算估计的弧概率,并结合上下文条件确定诊断。该检测器已在100条无故障状态事件记录(部分有漏电流)和32条不同表面的分段故障记录上进行了测试。本文给出的测试结果在可靠性和灵敏度上都令人满意。
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引用次数: 20
FPGA implementation of an ATM traffic classifier for quality of service management 一种用于业务质量管理的ATM流量分类器的FPGA实现
S. Holgado, S. López-Buedo, A. Pearmain
One of the main problems in modern broadband networks is the variation of quality of service (QoS) that can occur. A very common technology used for broadband networks is ATM (asynchronous transfer mode). ATM can offer QoS guarantees for a number of different traffic classes. In an ATM switch it is possible to discard low-priority cells when the buffer is full. This can be done using logic implemented on a FPGA (field programmable gate array) chip, used because of its flexibility and easy re-configuration. This paper presents the FPGA implementation of an ATM cell priority classifier, which can be used in QoS management. The circuit directly receives a 155 Mbps ATM serial stream from a physical medium device, and performs cell delineation, serial to parallel conversion and classification according to the cell loss priority (CLP) bit. It has been implemented on a Xilinx Virtex XCV50PQ240-6 FPGA occupying 8252 equivalent gates. Simulation results show that the circuit can directly process a 155 Mbps ATM stream.
现代宽带网络的主要问题之一是可能出现的服务质量(QoS)变化。用于宽带网络的一种非常常见的技术是ATM(异步传输模式)。ATM可以为许多不同的流量类别提供QoS保证。在ATM交换机中,当缓冲区已满时,可以丢弃低优先级的单元。这可以使用FPGA(现场可编程门阵列)芯片上实现的逻辑来完成,因为它的灵活性和易于重新配置。提出了一种可用于QoS管理的ATM小区优先级分类器的FPGA实现方法。该电路直接接收来自物理介质设备的155 Mbps ATM串行流,并根据单元丢失优先级(CLP)位进行单元划分、串行到并行转换和分类。它已在Xilinx Virtex XCV50PQ240-6 FPGA上实现,占用8252个等效门。仿真结果表明,该电路可以直接处理155mbps的ATM流。
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引用次数: 1
期刊
2000 10th Mediterranean Electrotechnical Conference. Information Technology and Electrotechnology for the Mediterranean Countries. Proceedings. MeleCon 2000 (Cat. No.00CH37099)
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