Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573650
J. K. K. Seng, T. Heng, Melzner Hanno
Design for Manufacturing (DFM) and Design for Reliability (DFR) are important measure to verify and increase a product's manufacturability and reliability. This assessment can be achieved with Critical Area Analysis (CAA). In this study, the CAA results are correlated to the reliability data in terms of Defect Per Million (DPM) derived from the number of customer's field return units. Our differentiator approach was to analyze the defects and the hot spot location of the failed unit, and map the location to the CAA heat map to investigate if the failure locations fall in the critical area. The analysis was performed on products with high DPM rate. This paper shows some of the mapping examples and the outcome indicated > 50% Back End of Line (BEOL) failure can be potentially avoided upfront in layout design.
{"title":"Critical Area Analysis of IC layout for automotive application","authors":"J. K. K. Seng, T. Heng, Melzner Hanno","doi":"10.1109/SMELEC.2016.7573650","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573650","url":null,"abstract":"Design for Manufacturing (DFM) and Design for Reliability (DFR) are important measure to verify and increase a product's manufacturability and reliability. This assessment can be achieved with Critical Area Analysis (CAA). In this study, the CAA results are correlated to the reliability data in terms of Defect Per Million (DPM) derived from the number of customer's field return units. Our differentiator approach was to analyze the defects and the hot spot location of the failed unit, and map the location to the CAA heat map to investigate if the failure locations fall in the critical area. The analysis was performed on products with high DPM rate. This paper shows some of the mapping examples and the outcome indicated > 50% Back End of Line (BEOL) failure can be potentially avoided upfront in layout design.","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"71 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123181600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573630
Pradeep Kumar, C. Kang, Z. A. Burhanudin, M. Saheed, Muhammad Imran Irshad, N. M. Mohamed
Graphene-based hybrid thin films are investigated specifically for its optical transmittance and sheet resistance. The hybrid films were made of stacked or fused chemical vapor deposition (CVD)-grown graphene, carbon nanotubes (CNT) and copper nanowires. It was found that the fused graphene/CNT has the highest transmittance nearly 90% in the visible region and the lowest sheet resistance (RS) of ~830 Ω/□. Upon further optimization, it is believed that the latter parameters can be significantly improved and made it feasible to be used as transparent conductive electrode (TCE) for optoelectronic devices.
{"title":"Graphene-based hybrid thin films as transparent conductive electrode for optoelectronic devices","authors":"Pradeep Kumar, C. Kang, Z. A. Burhanudin, M. Saheed, Muhammad Imran Irshad, N. M. Mohamed","doi":"10.1109/SMELEC.2016.7573630","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573630","url":null,"abstract":"Graphene-based hybrid thin films are investigated specifically for its optical transmittance and sheet resistance. The hybrid films were made of stacked or fused chemical vapor deposition (CVD)-grown graphene, carbon nanotubes (CNT) and copper nanowires. It was found that the fused graphene/CNT has the highest transmittance nearly 90% in the visible region and the lowest sheet resistance (RS) of ~830 Ω/□. Upon further optimization, it is believed that the latter parameters can be significantly improved and made it feasible to be used as transparent conductive electrode (TCE) for optoelectronic devices.","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122236347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573619
Muslihah Ali, Abdullah C. W. Noorakma, Norliana Yusof, W. N. Mohamad, N. Soin, S. F. Wan Muhamad Hatta
MEMS intraocular capacitive pressure sensor is used for monitoring glaucoma disease. The structure of the diaphragm of MEMS capacitive pressure sensor is one of the important factors which could affect the sensor's performance. In this paper, Taguchi and Two-Level Factorial approach are employed to optimize the size of diaphragm thickness, slot width, and slot length. The typical range of intraocular pressure is at 0 - 60 mmHg and applied on 550 × 550 μm four slotted diaphragms. The effects of sensitivity and linearity on these parameters are investigated. From this study, it is found that the optimized parameters are 4.2μm, 25μm, and 100μm for diaphragm thickness, slot width, and slot length respectively. Simulated results by COMSOL Multiphysics indicate that the optimized parameters produce more sensitivity with high linearity compared to the initial parameters condition.
{"title":"Optimization of MEMS intraocular capacitive pressure sensor","authors":"Muslihah Ali, Abdullah C. W. Noorakma, Norliana Yusof, W. N. Mohamad, N. Soin, S. F. Wan Muhamad Hatta","doi":"10.1109/SMELEC.2016.7573619","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573619","url":null,"abstract":"MEMS intraocular capacitive pressure sensor is used for monitoring glaucoma disease. The structure of the diaphragm of MEMS capacitive pressure sensor is one of the important factors which could affect the sensor's performance. In this paper, Taguchi and Two-Level Factorial approach are employed to optimize the size of diaphragm thickness, slot width, and slot length. The typical range of intraocular pressure is at 0 - 60 mmHg and applied on 550 × 550 μm four slotted diaphragms. The effects of sensitivity and linearity on these parameters are investigated. From this study, it is found that the optimized parameters are 4.2μm, 25μm, and 100μm for diaphragm thickness, slot width, and slot length respectively. Simulated results by COMSOL Multiphysics indicate that the optimized parameters produce more sensitivity with high linearity compared to the initial parameters condition.","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121341333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573596
Mohammad Faseehuddin, J. Sampe, Shabiul Islam
This paper presents a current mode Schmitt Trigger based on Dual Output Current Controlled Current Conveyor (DOCCCII). To overcome the frequency limitation and enable low voltage low power operation (LVLP) current mode circuits are generally preferred. They offer higher bandwidth, improved slew rate and better (LVLP) performance compared to their voltage mode counterparts. So for the design we have selected second generation current controlled current conveyor which is regarded as the universal current mode active building block. The circuit topology is very simple, its construction consists of a single DOCCCII and an inverter implemented in 16 nm bulk CMOS technology model parameters obtained from Predictive Technology Model (PTM) together with two resistors. The circuit is suitable for integration, it uses the supply voltage of ±0.8V and a bias current of 10μA. The performance of the proposed circuit is examined using H-Spice where the circuit exhibited the power dissipation of 57.78μW. The circuit performance is in agreement with the theoretical explanation. The noise removing capability of the circuit is presented here as an application.
{"title":"Schmitt Trigger based on Dual Output Current Controlled Current Conveyor in 16nm CMOS technology for digital applications","authors":"Mohammad Faseehuddin, J. Sampe, Shabiul Islam","doi":"10.1109/SMELEC.2016.7573596","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573596","url":null,"abstract":"This paper presents a current mode Schmitt Trigger based on Dual Output Current Controlled Current Conveyor (DOCCCII). To overcome the frequency limitation and enable low voltage low power operation (LVLP) current mode circuits are generally preferred. They offer higher bandwidth, improved slew rate and better (LVLP) performance compared to their voltage mode counterparts. So for the design we have selected second generation current controlled current conveyor which is regarded as the universal current mode active building block. The circuit topology is very simple, its construction consists of a single DOCCCII and an inverter implemented in 16 nm bulk CMOS technology model parameters obtained from Predictive Technology Model (PTM) together with two resistors. The circuit is suitable for integration, it uses the supply voltage of ±0.8V and a bias current of 10μA. The performance of the proposed circuit is examined using H-Spice where the circuit exhibited the power dissipation of 57.78μW. The circuit performance is in agreement with the theoretical explanation. The noise removing capability of the circuit is presented here as an application.","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134391882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573618
A. Mansor, S. Ibrahim
Electric field intensity is important in trapping biological cells during dielectrophoresis (DEP). In this paper, two designs of ring interdigitated electrode (RIDE) with varied spacing between electrodes; 300 μm to 500 μm, were modelled and analyzed. Analysis was done using finite element analysis software, COMSOL Multiphysics to study the intensities of electric fields generated on the electrodes. Simulation results show that higher electric fields are generated by the asymmetrical RIDE compared to the symmetrical RIDE design. The average value of positive electric fields peaks for symmetrical RIDE is 16.1kV/m and 19.9 kV/m for asymmetrical RIDE. Simulations also revealed that higher electric field were generated on smaller spacing compared to larger one. This suggested that better cellular attraction can be predicted on smallest distance of asymmetrical RIDE. Trapped cells can later be used to study the intercellular or intracellular interactions of the specific cells, such as through impedance sensing to form an integrated DEP-impedance biosensor.
{"title":"Simulation of ring interdigitated electrode for dielectrophoretic trapping","authors":"A. Mansor, S. Ibrahim","doi":"10.1109/SMELEC.2016.7573618","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573618","url":null,"abstract":"Electric field intensity is important in trapping biological cells during dielectrophoresis (DEP). In this paper, two designs of ring interdigitated electrode (RIDE) with varied spacing between electrodes; 300 μm to 500 μm, were modelled and analyzed. Analysis was done using finite element analysis software, COMSOL Multiphysics to study the intensities of electric fields generated on the electrodes. Simulation results show that higher electric fields are generated by the asymmetrical RIDE compared to the symmetrical RIDE design. The average value of positive electric fields peaks for symmetrical RIDE is 16.1kV/m and 19.9 kV/m for asymmetrical RIDE. Simulations also revealed that higher electric field were generated on smaller spacing compared to larger one. This suggested that better cellular attraction can be predicted on smallest distance of asymmetrical RIDE. Trapped cells can later be used to study the intercellular or intracellular interactions of the specific cells, such as through impedance sensing to form an integrated DEP-impedance biosensor.","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131363491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573653
M. Zaki, U. Hashim, M. K. Md Arshad, M. Nasir, A. R. Ruslinda
This paper presents the electrical properties of ZnO deposited on Al interdigitated electrodes (IDE) for detection of synthetic formaldehyde liquid at different concentration. Firstly, the 50-nm gap size of Al IDE pattern was designed and fabricated. The ZnO solution was prepared and deposited on entire surface consisting of Al IDE and SiO2 (in between the IDE fingers) structure through sol-gel method. The surface was characterized by using scanning electron microscopy (SEM) and the electrical characteristics was measured by using source meter (keithley 6487). Result shows that the IDE with ZnO device sensor is capable to detect various formaldehyde liquid concentration (5 ppm, 3 ppm and 1.5 ppm).
{"title":"Integration of IDE with ZnO nanoparticles for detection of synthetic formaldehyde liquid","authors":"M. Zaki, U. Hashim, M. K. Md Arshad, M. Nasir, A. R. Ruslinda","doi":"10.1109/SMELEC.2016.7573653","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573653","url":null,"abstract":"This paper presents the electrical properties of ZnO deposited on Al interdigitated electrodes (IDE) for detection of synthetic formaldehyde liquid at different concentration. Firstly, the 50-nm gap size of Al IDE pattern was designed and fabricated. The ZnO solution was prepared and deposited on entire surface consisting of Al IDE and SiO2 (in between the IDE fingers) structure through sol-gel method. The surface was characterized by using scanning electron microscopy (SEM) and the electrical characteristics was measured by using source meter (keithley 6487). Result shows that the IDE with ZnO device sensor is capable to detect various formaldehyde liquid concentration (5 ppm, 3 ppm and 1.5 ppm).","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"603 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134482794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573658
H. E. Z. Abidin, A. A. Hamzah, M. A. Mohamed, J. Yunas, B. Majlis, M. Abid
Planar interdigital micro supercapacitor with the graphene growth via Plasma Enhanced Chemical Vapor Deposition (PECVD) with the different temperatures has been investigated in this works. The structure of the micro supercapacitor consists of SiO2 substrate, graphene growth on Nickel (Ni) electrodes coated with Polypyrrole (Ppy) and Polyvinyl Alcohol (PVA) layers as solid state electrolyte. A single layer of graphene which has sp2 hybridized carbon atoms is one of the promising material that has been used for micro supercapacitor electrodes due to several advantages such as high specific surface area, high thermal conductivity and high electron mobility. PECVD method is a main method for graphene growth due to the advantages such as high growth selectivity and good control in nanostructure patterning. In this works, the graphene growth on the interdigital electrodes was investigated in various temperatures from 400°C to 1000°C. The graphene growth structure on the interdigital electrodes of micro supercapacitor was characterized by Raman Spectroscopy. Raman Spectroscopy was carried out using a 532 nm laser excitation. A Raman spectrum of graphene was observed on interdigital electrode have identified three peaks which is D band, G band and 2D band. Raman spectra show that the intensity ratio of the 2D band and G band at 1000°C of 0.43 indicating a good quality of multilayer graphene growth.
{"title":"Structural analysis of graphene growth on interdigital electrodes micro supercapacitor by PECVD at various temperatures","authors":"H. E. Z. Abidin, A. A. Hamzah, M. A. Mohamed, J. Yunas, B. Majlis, M. Abid","doi":"10.1109/SMELEC.2016.7573658","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573658","url":null,"abstract":"Planar interdigital micro supercapacitor with the graphene growth via Plasma Enhanced Chemical Vapor Deposition (PECVD) with the different temperatures has been investigated in this works. The structure of the micro supercapacitor consists of SiO2 substrate, graphene growth on Nickel (Ni) electrodes coated with Polypyrrole (Ppy) and Polyvinyl Alcohol (PVA) layers as solid state electrolyte. A single layer of graphene which has sp2 hybridized carbon atoms is one of the promising material that has been used for micro supercapacitor electrodes due to several advantages such as high specific surface area, high thermal conductivity and high electron mobility. PECVD method is a main method for graphene growth due to the advantages such as high growth selectivity and good control in nanostructure patterning. In this works, the graphene growth on the interdigital electrodes was investigated in various temperatures from 400°C to 1000°C. The graphene growth structure on the interdigital electrodes of micro supercapacitor was characterized by Raman Spectroscopy. Raman Spectroscopy was carried out using a 532 nm laser excitation. A Raman spectrum of graphene was observed on interdigital electrode have identified three peaks which is D band, G band and 2D band. Raman spectra show that the intensity ratio of the 2D band and G band at 1000°C of 0.43 indicating a good quality of multilayer graphene growth.","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"219 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116161137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573580
M. Ya, N. Soin, A. Nordin
Dielectric charges cause stiction problems in most capacitive RF-MEMS switches, creating a major reliability issue during production. A new method based on finite-element-method simulation is developed in this paper to analyze the dielectric charging effect on the RF-MEMS switch's pull voltages (namely, pull-in and pull-out voltages). The pull voltages have been simulated by using a triangular voltage input; and the actuation time has been obtained by using a step-up bias voltage. The charge effect on the pull voltages due to parasitic charges has been discussed. And the effect of dielectric surface roughness on the switch performance is also deliberated. The study results show that in order to develop a long-lifetime RF-MEMS switch, a small actuation voltage with a flat-dielectric-layer design is preferred. In the end a two-step bipolar rectangular waveform as bias voltage has been proposed additionally for long-lifetime purpose.
{"title":"Theoretical and simulated investigation of dielectric charging effect on a capacitive RF-MEMS switch","authors":"M. Ya, N. Soin, A. Nordin","doi":"10.1109/SMELEC.2016.7573580","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573580","url":null,"abstract":"Dielectric charges cause stiction problems in most capacitive RF-MEMS switches, creating a major reliability issue during production. A new method based on finite-element-method simulation is developed in this paper to analyze the dielectric charging effect on the RF-MEMS switch's pull voltages (namely, pull-in and pull-out voltages). The pull voltages have been simulated by using a triangular voltage input; and the actuation time has been obtained by using a step-up bias voltage. The charge effect on the pull voltages due to parasitic charges has been discussed. And the effect of dielectric surface roughness on the switch performance is also deliberated. The study results show that in order to develop a long-lifetime RF-MEMS switch, a small actuation voltage with a flat-dielectric-layer design is preferred. In the end a two-step bipolar rectangular waveform as bias voltage has been proposed additionally for long-lifetime purpose.","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122105409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573620
S. S. Shariffudin, N. Ibrahim, M. Sarah, H. Hashim
Nanoparticles ZnO/CuO composite was successfully prepared through a simple sol-gel spin coating technique. The annealing temperature was within the range of 400°C to 600°C to study its effect to the physical, optical and electrical properties to the thin films. Their characteristics were studied by field emission scanning electron microscopy (FESEM), Atomic Force Microscopy (AFM), UV-Vis spectroscopy and 2-point probes I-V measurement. The thickness and grain size increased with the annealing temperature. The direct optical bandgap observed were between 3.06 eV to 3.2 eV, which increased with the decreased of the annealing temperature. The highest conductivity was obtained for sample annealed at 400°C with a value of 0.61614 S/cm.
{"title":"Effect of annealing temperature on characteristics of ZnO/CuO nanocomposite thin films","authors":"S. S. Shariffudin, N. Ibrahim, M. Sarah, H. Hashim","doi":"10.1109/SMELEC.2016.7573620","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573620","url":null,"abstract":"Nanoparticles ZnO/CuO composite was successfully prepared through a simple sol-gel spin coating technique. The annealing temperature was within the range of 400°C to 600°C to study its effect to the physical, optical and electrical properties to the thin films. Their characteristics were studied by field emission scanning electron microscopy (FESEM), Atomic Force Microscopy (AFM), UV-Vis spectroscopy and 2-point probes I-V measurement. The thickness and grain size increased with the annealing temperature. The direct optical bandgap observed were between 3.06 eV to 3.2 eV, which increased with the decreased of the annealing temperature. The highest conductivity was obtained for sample annealed at 400°C with a value of 0.61614 S/cm.","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127939223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-08-01DOI: 10.1109/SMELEC.2016.7573572
H. Mizuta
Graphene possesses remarkable electronic and mechanical properties and provides a promising platform to explore future nanoelectronic and nano electro-mechanical (NEM) devices for challenging applications. In this talk, we first present state-of-the-art fabrication technologies for sub-10-nm graphene nanostructures using atomic-size focused helium ion beam (Fig. 1) [1][2] and the HSQ-based electron beam lithography [3]. We then introduce graphene tunnel FETs (GTFETs) [4] and graphene single carrier transistors (GSCTs) [5] briefly which are expected to show advanced characteristics beyond Si-based MOSFETs. We then present our recent attempts of developing graphene NEM (GNEM) switches which achieves extremely abrupt switching with very low switching voltages [6][7] (Fig. 2: upper) and high-performance GNEM environmental sensors (Fig. 2: lower) with single-molecular-level detection limit [8][9]. This work was supported by Grant-in-Aid for Scientific Research No. 25220904 from Japan Society for the Promotion of Science and the Center of Innovation Program from Japan Science and Technology Agency.
{"title":"Recent progress of graphene-based nanoelectronic and NEM device technologies for advanced applications","authors":"H. Mizuta","doi":"10.1109/SMELEC.2016.7573572","DOIUrl":"https://doi.org/10.1109/SMELEC.2016.7573572","url":null,"abstract":"Graphene possesses remarkable electronic and mechanical properties and provides a promising platform to explore future nanoelectronic and nano electro-mechanical (NEM) devices for challenging applications. In this talk, we first present state-of-the-art fabrication technologies for sub-10-nm graphene nanostructures using atomic-size focused helium ion beam (Fig. 1) [1][2] and the HSQ-based electron beam lithography [3]. We then introduce graphene tunnel FETs (GTFETs) [4] and graphene single carrier transistors (GSCTs) [5] briefly which are expected to show advanced characteristics beyond Si-based MOSFETs. We then present our recent attempts of developing graphene NEM (GNEM) switches which achieves extremely abrupt switching with very low switching voltages [6][7] (Fig. 2: upper) and high-performance GNEM environmental sensors (Fig. 2: lower) with single-molecular-level detection limit [8][9]. This work was supported by Grant-in-Aid for Scientific Research No. 25220904 from Japan Society for the Promotion of Science and the Center of Innovation Program from Japan Science and Technology Agency.","PeriodicalId":169983,"journal":{"name":"2016 IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117170334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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