Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551725
Yohan Kim, U. Monga, Jungmin Lee, Minkyoung Kim, Jaesung Park, C. Yoo, Kyungjin Jung, Sungduk Hong, Sung Jin Kim, D. Kim, Hokyu Kang
This paper introduces the recent modeling challenges of the Process Development Kit (PDK) development due to the limitations of transistor scaling and the impact of new process technologies. And a new modeling solution, Agile PDK is presented to break though these development challenges by enabling the Design Technology Co-Optimization (DTCO) activities in the manufacturing levels. A series of advanced algorithms are newly introduced to not only reduce the PDK development time (TAT), but also improve the model accuracies and Model-to-Hardware Correlation (MHC). It is applied to the latest DRAM technology and dramatically reduces the development TAT up to 50% with improved model accuracies.
{"title":"The efficient DTCO Compact Modeling Solutions to Improve MHC and Reduce TAT","authors":"Yohan Kim, U. Monga, Jungmin Lee, Minkyoung Kim, Jaesung Park, C. Yoo, Kyungjin Jung, Sungduk Hong, Sung Jin Kim, D. Kim, Hokyu Kang","doi":"10.1109/SISPAD.2018.8551725","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551725","url":null,"abstract":"This paper introduces the recent modeling challenges of the Process Development Kit (PDK) development due to the limitations of transistor scaling and the impact of new process technologies. And a new modeling solution, Agile PDK is presented to break though these development challenges by enabling the Design Technology Co-Optimization (DTCO) activities in the manufacturing levels. A series of advanced algorithms are newly introduced to not only reduce the PDK development time (TAT), but also improve the model accuracies and Model-to-Hardware Correlation (MHC). It is applied to the latest DRAM technology and dramatically reduces the development TAT up to 50% with improved model accuracies.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132493277","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551674
J. Lacord, M. Parihar, C. Navarro, François Tcheme Wakam, M. Bawedin, S. Cristoloveanu, F. Gamiz, J. Barbe
In this study, we propose a benchmark of performance between three promising 1T-DRAM device structures on SOI substrate: MSDRAM, A2RAM and $mathrm{Z}^{2} -$FET. For a fair comparison, TCAD simulation with the same basic calibration and typical 28FDSOI technological parameters was used. The merits and limitations of each variant are discussed.
{"title":"MSDRAM, A2RAM and Z2-FET performance benchmark for 1T-DRAM applications","authors":"J. Lacord, M. Parihar, C. Navarro, François Tcheme Wakam, M. Bawedin, S. Cristoloveanu, F. Gamiz, J. Barbe","doi":"10.1109/SISPAD.2018.8551674","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551674","url":null,"abstract":"In this study, we propose a benchmark of performance between three promising 1T-DRAM device structures on SOI substrate: MSDRAM, A2RAM and $mathrm{Z}^{2} -$FET. For a fair comparison, TCAD simulation with the same basic calibration and typical 28FDSOI technological parameters was used. The merits and limitations of each variant are discussed.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128627978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551619
Sundara Murthy Mopurisetty, M. Bajaj, S. Ganguly
We demonstrate the application of a calibrated simulation deck for Cu2ZnSnS4 (CZTS) solar cells developed by us for predictive device modeling. Specifically, we study the effect of nonidealities - series resistance (RS), carrier lifetime (τ), surface recombination velocity (SRV) - as well as that of novel transparent conductor materials.
{"title":"Predictive TCAD of Cu2 ZnSnS4(CZTS) Solar Cells","authors":"Sundara Murthy Mopurisetty, M. Bajaj, S. Ganguly","doi":"10.1109/SISPAD.2018.8551619","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551619","url":null,"abstract":"We demonstrate the application of a calibrated simulation deck for Cu2ZnSnS4 (CZTS) solar cells developed by us for predictive device modeling. Specifically, we study the effect of nonidealities - series resistance (RS), carrier lifetime (τ), surface recombination velocity (SRV) - as well as that of novel transparent conductor materials.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116787503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551716
A. Makarov, V. Sverdlov, S. Selberherr
We demonstrate that the spin-orbit torques generated by two orthogonal consecutive current pulses enable reliable and deterministic switching of a perpendicularly magnetized free magnetic layer without applying an external magnetic field. The switching current can be reduced by allowing the wire through which the second pulse is delivered to overlap only partly with the free layer. Surprisingly, the partial overlap makes the switching faster and 100% robust.
{"title":"Field-free Fast Reliable Deterministic Switching in Perpendicular Spin-Orbit Torque MRAM Cells","authors":"A. Makarov, V. Sverdlov, S. Selberherr","doi":"10.1109/SISPAD.2018.8551716","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551716","url":null,"abstract":"We demonstrate that the spin-orbit torques generated by two orthogonal consecutive current pulses enable reliable and deterministic switching of a perpendicularly magnetized free magnetic layer without applying an external magnetic field. The switching current can be reduced by allowing the wire through which the second pulse is delivered to overlap only partly with the free layer. Surprisingly, the partial overlap makes the switching faster and 100% robust.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116805209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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