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2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)最新文献

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Design guidelines for thermopower generators with multi-layered black phosphorus 多层黑磷热电发电机设计导则
P. Sengupta, Giftsondass Irudayadass, J. Shi
We study a thermal gradient induced current $( I _{th})$ flow in potassium (K)-doped two-dimensional anisotropic black phosphorus (BP) with semi-Dirac dispersion. The prototype device is a BP channel clamped between two contacts maintained at unequal temperatures. The choice of BP lies in the predicted efficient thermolectric behaviour. A temperature-induced difference in the Fermi levels of the two contacts drives the current (typified by the electro-thermal conductance) which we calculate using the Landauer transport equation. The current shows an initial rise when the device is operated at lower temperatures. The rise stalls at progressively higher temperatures and $I _{th}$ acquires a plateau-like flat profile indicating a competing effect between a larger number of transmission modes and a corresponding drop in the Fermi level difference between the contacts. The current is computed for both n- and p -type BP and the difference thereof is attributed to the particle-hole asymmetry. We conclude by pointing out improved thermal behaviour that may arise in multi-layered BP through topological phase transitions induced by additional K-doping.
研究了半狄拉克色散的钾(K)掺杂二维各向异性黑磷(BP)中的热梯度感应电流$(I _{th})$流动。原型装置是夹在两个保持不均匀温度的触点之间的BP通道。BP的选择取决于预测的有效热分子行为。两个触点的费米能级由温度引起的差异驱动电流(以电热导率为代表),我们使用朗道尔输运方程来计算。当器件在较低温度下工作时,电流显示初始上升。在逐渐升高的温度下,上升停止,$I _{th}$获得一个类似高原的平坦轮廓,表明在大量的传输模式和接触之间的费米能级差的相应下降之间存在竞争效应。计算了n型和p型BP的电流,其差异归因于粒子-空穴不对称。我们最后指出,通过额外的k掺杂引起的拓扑相变,多层BP可能会出现改善的热行为。
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引用次数: 0
PCM compact model: Optimized methodology for model card extraction PCM紧凑模型:优化的模型卡提取方法
C. Pigot, F. Gilibert, M. Reyboz, M. Bocquet, J. Portal
To achieve high yield on product embedding PCM memory, it is mandatory to provide to designers accurately calibrated PCM compact model. To achieve this goal, it is mandatory to develop standardized model card extraction methodology. In this paper, we present a PCM model card extraction flow based on a minimal set of static and dynamic measurements. Based on this measurement, characteristics are first obtained and model card parameters extracted without any loop back, i.e. each parameter is extracted only once on a given characteristic. After this extraction procedure, model card values are validated through a comparison with an extra characteristics SET-Low characteristic not used for the extraction.
为了实现产品嵌入PCM存储器的高成品率,必须向设计人员提供精确校准的PCM紧凑模型。为了实现这一目标,必须开发标准化的模型卡提取方法。在本文中,我们提出了一个基于静态和动态测量最小集的PCM模型卡片提取流程。在此测量基础上,首先获得特征,提取名片参数,没有任何回环,即每个参数只对给定特征提取一次。在此提取过程之后,通过与未用于提取的额外特征SET-Low特征进行比较来验证模型卡值。
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引用次数: 0
Optical Properties of Organic Perovskite Materials for Finite Nanostructures 有限纳米结构有机钙钛矿材料的光学性质
H. Ryu, K. Hong
We examine the effect of the structural confinement on optical properties of organic lead halide perovskite supercells of various shapes. With a set of 8-band tight-binding parameters that reproduce the bulk band gaps and offsets of MAPb (I/ Br/Cl)3 that have been known through DFT simulations, we explore the band gap of finite supercells that have homogeneous and mixed halides. This preliminary work already delivers a set of information that is useful for potential device designs because band gaps of organic lead halide perovskite supercells are rarely understood, particularly for realistically sized finite structures.
研究了结构约束对不同形状有机卤化铅钙钛矿超级电池光学性能的影响。通过一组8波段紧密结合参数,再现了通过DFT模拟已知的MAPb (I/ Br/Cl)3的大块带隙和偏移量,我们探索了具有均匀和混合卤化物的有限超级电池的带隙。这项初步工作已经为潜在的器件设计提供了一组有用的信息,因为有机卤化铅钙钛矿超级电池的带隙很少被理解,特别是对于实际尺寸有限的结构。
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引用次数: 0
The influence of carbon in the back-barrier layers on the surface electric field peaks in GaN Schottky diodes GaN肖特基二极管中后势垒层中碳对表面电场峰的影响
B. Bakeroot, B. D. Jaeger, N. Ronchi, S. Stoffels, M. Zhao, S. Decoutere
Technology Computer Aided Design simulations are used to assess the influence of carbon in the back-barrier layers of GaN-on-Si wafers on the voltage distribution in GaN Schottky diodes. It is shown that carbon cannot be present as an acceptor only – as it is commonly assumed. The carbon needs to be compensated by donors or partly electrically inactive in order to explain the observed high hard breakdown voltage in GaN-onSi Schottky diodes. Furthermore, it is shown that the level of donor compensation of the carbon will have a significant influence on the two-dimensional voltage distribution in the devices, and, hence, on the surface electric field peaks. This conclusion is important to consider in the design of field plate extensions of the Schottky diode.
采用计算机辅助设计模拟技术,评估了硅基氮化镓硅片背势垒层中碳对氮化镓肖特基二极管电压分布的影响。结果表明,碳不能像通常认为的那样仅仅作为受体存在。为了解释在GaN-onSi肖特基二极管中观察到的高硬击穿电压,碳需要被供体补偿或部分电非活性。此外,研究表明,碳的供体补偿水平将对器件中的二维电压分布产生显著影响,从而对表面电场峰产生显著影响。这一结论对肖特基二极管场极板扩展的设计具有重要的参考价值。
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引用次数: 0
SISPAD 2018 Cover Page SISPAD 2018封面
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引用次数: 0
First Principles Calculations of the Effect of Stress in the I-V Characteristics of the CoSi2/Si Interface 应力对CoSi2/Si界面I-V特性影响的第一性原理计算
O. D. Restrepo, Qun Gao, S. Pandey, E. Cruz‐Silva, E. Bazizi
We present ab initio-based electronic transport calculations on the effect of uniaxial and bi-axial stress on the CoSi2/n Si interface resistivity for the three main silicon crystallographic directions. For the [001] case, we identify two distinctive low and high bias conduction regimes for both compressive and tensile stress. In these regimes, the current is dominated by electronic transmission pathways near the Γ point for bias up to ~0.1V, while for higher bias it is dominated by transmission at the (±1/2, ±1/2) conduction band valleys of the Brillouin zone, which results in a contact resistivity decrease of up to 30% at 0.2V bias. This effect is less pronounced for the [110] direction, and negligible for the [111] case due to the symmetry of the Si conduction band valleys along these directions. This study provides insight into stress-based optimization pathways for contact resistivity reduction of silicide interfaces in next generation semiconductor devices.
我们提出了基于从头算的电子输运计算,计算了单轴和双轴应力对CoSi2/n Si界面电阻率在三个主要硅晶体学方向上的影响。对于[001]案例,我们确定了压应力和拉应力两种不同的低和高偏置传导机制。在这些条件下,当偏置为~0.1V时,电流主要由Γ点附近的电子传输路径主导,而当偏置较高时,电流主要由布里渊区(±1/2,±1/2)导带谷处的传输主导,这导致0.2V偏置时接触电阻率降低高达30%。这种效应在[110]方向上不太明显,在[111]情况下可以忽略不计,因为沿这些方向的硅导带谷是对称的。该研究为下一代半导体器件中硅化物界面接触电阻率降低的应力优化途径提供了见解。
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引用次数: 0
SISPAD 2018 Program
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引用次数: 0
High Throughput Simulation On The Impurity-Vacancy Diffusion Mechanism Using First-Principles 基于第一性原理的杂质-空位扩散机制高通量模拟
I. Martín-Bragado, Yumi Park, C. Zechner, Y. Oh
First principle calculations are a convenient and cost effective procedure to obtain the properties of the new and optimized materials required to solve the challenges of the next generation of semiconductor devices. But, even with reliable tools, the computation of the vacancy intermediated impurity diffusion can be challenging, especially in alloys. This work shows an algorithm to automate the process of such calculation by implementing a methodology tocompute ring mechanisms in generic materials. Results for semiconductor (namely, Ge diffusion in Si and As diffusion in a Si0.5 Ge0.5 random alloy) and non-semiconductor materials (Al diffusion in TiN) are shown. The results stress botha) the importance of the ring mechanism in understanding the diffusivity of impurities in crystalline materials, and b) the need for automatic algorithms that deal with the complexity of sampling and generating consistent configurations for such calculations.
第一性原理计算是一种方便且经济有效的方法,可以获得解决下一代半导体器件挑战所需的新材料和优化材料的特性。但是,即使有可靠的工具,空位中间杂质扩散的计算也是具有挑战性的,特别是在合金中。这项工作展示了一种算法,通过实施一种方法来计算通用材料中的环机制,使这种计算过程自动化。显示了半导体材料(即Ge在Si中的扩散和As在Si0.5 Ge0.5随机合金中的扩散)和非半导体材料(Al在TiN中的扩散)的结果。这些结果强调了环机制在理解晶体材料中杂质扩散性方面的重要性,以及b)需要自动算法来处理采样的复杂性,并为此类计算生成一致的配置。
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引用次数: 0
Quantum Transport Investigation of Threshold Voltage Variability in Sub-10 nm JunctionlessSi Nanowire FETs 亚10nm无结硅纳米线场效应管阈值电压变化的量子输运研究
S. Berrada, Jaehyun Lee, H. Carrillo-Nuñez, C. Medina-Bailón, F. Adamu-Lema, V. Georgiev, P. Asenov
In this paper, we use the Non-Equilibrium Green's Function formalism to study the dependence of the threshold voltage variability on the cross-section shape and the gate length in Junction Less Field Effect Transistors. Each configuration, i.e. gate length and cross-section, was investigated using a statistical ensemble of 100 samples. We found that the variability in threshold voltage is increased independently of the cross-section shape when the gate length isshrunk down to 5 nm. We attribute this results to the higher wave function “randomization” in longer gate lengths.
本文采用非平衡格林函数的形式,研究了无结场效应晶体管的阈值电压变异性与截面形状和栅极长度的关系。每种配置,即闸门长度和截面,使用100个样本的统计集合进行调查。我们发现,当栅极长度缩小到5 nm时,阈值电压的可变性与截面形状无关。我们将这一结果归因于更长的栅极长度中更高的波函数“随机化”。
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引用次数: 3
Modeling and Finite Element Simulation of Gate Leakage in Cylindrical GAA Nanowire FETs 圆柱形GAA纳米线场效应管栅极泄漏的建模与有限元仿真
Ashutosh Mahajan, Ravi Solanki, R. Sahoo, R. Patrikar
The gate-all-around (GAA) nanowire based devices have generated research interest in recent years for their potential in scaling beyond $10mathrm{n}mathrm{m}$ as they offer excellent control over channel. Reduction in gate oxide thickness and low effective mass channel material for better drive current aid gate leakage which can put limit to further scaling. In this work, we study gate leakage problem for cylindrical nanowire (NW) GAA device and present a model to accurately compute lifetime of the quasi-bound-states (QBS) in inversion region of NW. We study scattering of cylindrical waves by solving Schrodinger equation with open boundary conditions using finite element method (FEM), and thereby calculate gate leakage current for the GAA device. We conduct survey of a broad range of device materials, investigate effect of device dimensions and stress on the gate tunneling leakage. We try to bring out the conditions at which direct tunneling current through the oxide is significant and can possibly exceed the maximum permissible gate current density.
近年来,基于栅极全能(GAA)纳米线的器件因其具有超过$10 mathm {n} mathm {m}$的潜力而引起了研究兴趣,因为它们提供了出色的通道控制。减少栅极氧化物厚度和低有效质量沟道材料,以更好地驱动电流,帮助栅极泄漏,这可能限制进一步缩放。本文研究了圆柱纳米线(NW) GAA器件的栅极泄漏问题,提出了一个精确计算NW反转区准束缚态(QBS)寿命的模型。利用有限元法求解开放边界条件下的薛定谔方程,研究圆柱波的散射特性,从而计算出GAA器件的栅极漏电流。我们对各种器件材料进行了调查,研究了器件尺寸和应力对闸门隧道泄漏的影响。我们试图找出通过氧化物的直接隧道电流显著且可能超过最大允许栅极电流密度的条件。
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2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)
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