Pub Date : 2018-09-01DOI: 10.1109/sispad.2018.8551651
{"title":"SISPAD 2018 Copyright Page","authors":"","doi":"10.1109/sispad.2018.8551651","DOIUrl":"https://doi.org/10.1109/sispad.2018.8551651","url":null,"abstract":"","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133729057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551749
T. Gunst, A. Blom, K. Stokbro
We present several extensions to the Boltzmann Transport Equation (BTE) solver implemented in QuantumATK. This enables computational efficient simulations of first-principles transport coefficients in linear response to an applied electric field, magnetic field or temperature gradient. We calculate the phonon-limited resistivity in three FCC metals (Gold, Silver and Cobber) with the calculation of scattering rates from the electron-phonon interaction from first-principles. We correctly find that Gold has the highest resistivity while the resitivity of Copper is only slightly larger than that of Silver. In addition, we find that the resistivity of a 1nm diameter Au nanowire is more than doubled as compared to that of bulk Au due to the increased electron-phonon coupling in nanowires. The simulations illustrate the predictive capabilities of the implemented Boltzmann Transport Equation (BTE) solver.
{"title":"First-principles method for the phonon-limited resistivity of metals","authors":"T. Gunst, A. Blom, K. Stokbro","doi":"10.1109/SISPAD.2018.8551749","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551749","url":null,"abstract":"We present several extensions to the Boltzmann Transport Equation (BTE) solver implemented in QuantumATK. This enables computational efficient simulations of first-principles transport coefficients in linear response to an applied electric field, magnetic field or temperature gradient. We calculate the phonon-limited resistivity in three FCC metals (Gold, Silver and Cobber) with the calculation of scattering rates from the electron-phonon interaction from first-principles. We correctly find that Gold has the highest resistivity while the resitivity of Copper is only slightly larger than that of Silver. In addition, we find that the resistivity of a 1nm diameter Au nanowire is more than doubled as compared to that of bulk Au due to the increased electron-phonon coupling in nanowires. The simulations illustrate the predictive capabilities of the implemented Boltzmann Transport Equation (BTE) solver.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129555980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551635
A. Ghetti, A. Benvenuti, A. Mauri, Haitao Liu, C. Mouli
Emerging Memory (EM) is a broad class of memory devices leveraging a wide spectrum of physical phenomena and/or material properties, that go beyond the charge storage concept of more conventional NAND and DRAM technologies. Availability of physical models and simulation tools to understand their behavior, predict performance, engineer materials and cell architecture would be extremely useful for their successful development. However, such tools are not always available because of the diversity and complexity of the physical mechanisms. This paper would like to review the main trends of the on-going modeling and simulation activities in the field of EM, trying to point out what are the needs and challenges for the future.
{"title":"Emerging Memory Modeling Challenges (Invited Paper)","authors":"A. Ghetti, A. Benvenuti, A. Mauri, Haitao Liu, C. Mouli","doi":"10.1109/SISPAD.2018.8551635","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551635","url":null,"abstract":"Emerging Memory (EM) is a broad class of memory devices leveraging a wide spectrum of physical phenomena and/or material properties, that go beyond the charge storage concept of more conventional NAND and DRAM technologies. Availability of physical models and simulation tools to understand their behavior, predict performance, engineer materials and cell architecture would be extremely useful for their successful development. However, such tools are not always available because of the diversity and complexity of the physical mechanisms. This paper would like to review the main trends of the on-going modeling and simulation activities in the field of EM, trying to point out what are the needs and challenges for the future.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126315925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551701
S. Berrada, T. Dutta, H. Carrillo-Nuñez, M. Duan, F. Adamu-Lema, Jehyun Lee, V. Georgiev, C. Medina-Bailón, A. Asenov
In this paper, we present an integrated simulation environment called NESS that enables the modelling of nano CMOS transistors with different models and degrees of complexity. Thanks to its unified simulation domain for all solvers, NESS offers the possibility to consider confinement-aware band structures, generate different sources of variability and assess their impact on the figures of merit using different transport models. NESS is also a modular open-ended simulation environment that can be easily extended to include new modules such as nano-interconnects and a direct Boltzmann solver.
{"title":"NESS: new flexible Nano-Electronic Simulation Software","authors":"S. Berrada, T. Dutta, H. Carrillo-Nuñez, M. Duan, F. Adamu-Lema, Jehyun Lee, V. Georgiev, C. Medina-Bailón, A. Asenov","doi":"10.1109/SISPAD.2018.8551701","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551701","url":null,"abstract":"In this paper, we present an integrated simulation environment called NESS that enables the modelling of nano CMOS transistors with different models and degrees of complexity. Thanks to its unified simulation domain for all solvers, NESS offers the possibility to consider confinement-aware band structures, generate different sources of variability and assess their impact on the figures of merit using different transport models. NESS is also a modular open-ended simulation environment that can be easily extended to include new modules such as nano-interconnects and a direct Boltzmann solver.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120916223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551703
H. Lo, Jianwei Peng, P. Zhao, E. Bazizi, Yue Hu, Y. Shi, Y. Qi, A. Vinslava, Y. Shen, W. Hong, H. Zang, Xing Zhang, A. Jha, X. Dou, S. Mun, Yanzhen Wang, Jae Gon Lee, D. Choi, O. Hu, S. Samavedam
We present a novel cavity engineering work – we named this cavity as dual-curvature cavity, which improves pFET electrical performance. This new cavity shape design minimizes the source/drain leakage penalty from deeper cavity depth while enabling the transistor performance benefits from larger eSiGe. In addition, this new cavity shape minimizes the penalty of deeper cavity on SDB (single diffusion break) devices through minimizing the facet effect in SDB structure. This work demonstrates that this new cavity shape could improve p-type transistor performance by 4{%} on top of the Fin shape optimization.
{"title":"Transistor Optimization with Novel Cavity for Advanced FinFET Technology","authors":"H. Lo, Jianwei Peng, P. Zhao, E. Bazizi, Yue Hu, Y. Shi, Y. Qi, A. Vinslava, Y. Shen, W. Hong, H. Zang, Xing Zhang, A. Jha, X. Dou, S. Mun, Yanzhen Wang, Jae Gon Lee, D. Choi, O. Hu, S. Samavedam","doi":"10.1109/SISPAD.2018.8551703","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551703","url":null,"abstract":"We present a novel cavity engineering work – we named this cavity as dual-curvature cavity, which improves pFET electrical performance. This new cavity shape design minimizes the source/drain leakage penalty from deeper cavity depth while enabling the transistor performance benefits from larger eSiGe. In addition, this new cavity shape minimizes the penalty of deeper cavity on SDB (single diffusion break) devices through minimizing the facet effect in SDB structure. This work demonstrates that this new cavity shape could improve p-type transistor performance by 4{%} on top of the Fin shape optimization.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131422722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551664
Zhanfei Chen, Jun Liu, Jia Zhen, Lingling Sun
Knowledge of thermal characteristic in device is valuable to thermal management determination. In this paper, the dynamic thermal characteristic of bulk FinFET is investigated with an analytic method of thermal impedance extraction. The validation of this method is confirmed with the model of smallsignal Y-parameters at low frequency. The results show that, although the saturation current is relatively small, the associated temperature rise is very significant. As comparison, dynamic thermal behavior of SOI is also investigated. The results provide a reliable base for the selection of thermal management algorithms for the circuits carrying various frequency components. This method is easy to scale and adjust to device with different dimension and fabrication processes.
{"title":"Investigation of the Dynamic Thermal Characteristic in Bulk FinFET","authors":"Zhanfei Chen, Jun Liu, Jia Zhen, Lingling Sun","doi":"10.1109/SISPAD.2018.8551664","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551664","url":null,"abstract":"Knowledge of thermal characteristic in device is valuable to thermal management determination. In this paper, the dynamic thermal characteristic of bulk FinFET is investigated with an analytic method of thermal impedance extraction. The validation of this method is confirmed with the model of smallsignal Y-parameters at low frequency. The results show that, although the saturation current is relatively small, the associated temperature rise is very significant. As comparison, dynamic thermal behavior of SOI is also investigated. The results provide a reliable base for the selection of thermal management algorithms for the circuits carrying various frequency components. This method is easy to scale and adjust to device with different dimension and fabrication processes.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128161565","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551745
P. Muralidharan, S. Goodnick, D. Vasileska
Silicon based technology continues to mature and move steadily towards the auger limited maximum efficiency ($sim$29%). In particular silicon heterojunction technology currently holds the world record for silicon based single junction cells. Optimization of heterojunction solar cells now requires a concentrated and deep understanding of the physics of transport. In this paper we present a multi-physics/multiscale approach to understanding and analyzing transport in silicon heterojunction solar cells. We self-consistently couple a traditional drift-diffusion model to an ensemble Monte Carlo and kinetic Monte Carlo to create a multiscale solver that is capable of including high field effects present at the a-Si/c-Si heterointerface and the nuances of defect assisted transport through the a-Si:H(i) buffer layer.
硅基技术不断成熟，并稳步向螺旋钻有限的最高效率(29%)迈进。特别是硅异质结技术目前保持着硅基单结电池的世界纪录。异质结太阳能电池的优化现在需要对输运物理的集中和深入的理解。本文提出了一种多物理场/多尺度的方法来理解和分析硅异质结太阳能电池中的输运。我们自一致地将传统的漂移-扩散模型与系综蒙特卡罗和动力学蒙特卡罗相耦合，以创建一个多尺度求解器，该求解器能够包括存在于a- si /c-Si异质界面的高场效应以及通过a- si:H(i)缓冲层的缺陷辅助输运的细微差别。
{"title":"Quasi 1D multi-physics modeling of silicon heterojunction solar cells","authors":"P. Muralidharan, S. Goodnick, D. Vasileska","doi":"10.1109/SISPAD.2018.8551745","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551745","url":null,"abstract":"Silicon based technology continues to mature and move steadily towards the auger limited maximum efficiency ($sim$29%). In particular silicon heterojunction technology currently holds the world record for silicon based single junction cells. Optimization of heterojunction solar cells now requires a concentrated and deep understanding of the physics of transport. In this paper we present a multi-physics/multiscale approach to understanding and analyzing transport in silicon heterojunction solar cells. We self-consistently couple a traditional drift-diffusion model to an ensemble Monte Carlo and kinetic Monte Carlo to create a multiscale solver that is capable of including high field effects present at the a-Si/c-Si heterointerface and the nuances of defect assisted transport through the a-Si:H(i) buffer layer.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125265564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551717
Nupur Navlakha, A. Kranti
The work presents physical insights on the control of energy barriers at junctions of a planar trigate Tunnel FET (TFET) for dynamic memory applications. Results demonstrate the significance of electric field (EF) at each junction i.e. Source-Gate1 (S-G1), Drain-Gate2 (D-G2), and that between gates, evaluated through the energy barrier between G1-G2 (Eb) to improve Sense Margin (SM), Current Ratio (CR), speed (write time) and Retention Time (RT). The work highlights the impact of device parameters that aid to improve the performance metrics, and also reduce the associated trade-offs in dynamic memory.
{"title":"Physical Insights on Junction Controllability for Improved Performance of Planar Trigate Tunnel FET as Capacitorless Dynamic Memory","authors":"Nupur Navlakha, A. Kranti","doi":"10.1109/SISPAD.2018.8551717","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551717","url":null,"abstract":"The work presents physical insights on the control of energy barriers at junctions of a planar trigate Tunnel FET (TFET) for dynamic memory applications. Results demonstrate the significance of electric field (EF) at each junction i.e. Source-Gate1 (S-G1), Drain-Gate2 (D-G2), and that between gates, evaluated through the energy barrier between G1-G2 (Eb) to improve Sense Margin (SM), Current Ratio (CR), speed (write time) and Retention Time (RT). The work highlights the impact of device parameters that aid to improve the performance metrics, and also reduce the associated trade-offs in dynamic memory.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117193522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551752
Heetaek Lim, S. Kong, E. Guichard, A. Hoessinger
We present a simulation approach that is based on non-linear finite element method. This simulation flow allows to calculate large deformation field and associated stress and strain. The obtained simulation result agrees well with analytic solution. We extend this simulation method to evaluate the impacts of the deformation induced stress on device performance as well as structural integrity.
{"title":"A General Approach for Deformation Induced Stress on Flexible Electronics","authors":"Heetaek Lim, S. Kong, E. Guichard, A. Hoessinger","doi":"10.1109/SISPAD.2018.8551752","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551752","url":null,"abstract":"We present a simulation approach that is based on non-linear finite element method. This simulation flow allows to calculate large deformation field and associated stress and strain. The obtained simulation result agrees well with analytic solution. We extend this simulation method to evaluate the impacts of the deformation induced stress on device performance as well as structural integrity.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123727502","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/SISPAD.2018.8551693
Junsung Park, Sung-Min Hong
The $beta$-Ga2O3(beta-gallium oxide) is one of promising candidate materials for the future power and RF devices. Since the high-quality gate dielectric layer is mandatory for developing the Ga2O3 based MOSFET, theoretical investigation on the properties of Al2O3$beta$-Ga2O3 interface is required. We have generated atomistic Al2O3$beta$-Ga2O3 interface models, which are consistent with experimental results. By the density functional theory(DFT)-based electronic structure calculation, it is confirmed that the generated interface structures are physically stable. The band offset levels are applicable to the MOS structure for device application. It is expected that the atomistic interface structures generated in this work can be used for further first principles investigation on the Al2O3$beta$-Ga2O3 interface.
{"title":"First Principles Investigation of Al2O3 γ-Ga2O3 Interface Structures","authors":"Junsung Park, Sung-Min Hong","doi":"10.1109/SISPAD.2018.8551693","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551693","url":null,"abstract":"The $beta$-Ga<inf>2</inf>O<inf>3</inf>(beta-gallium oxide) is one of promising candidate materials for the future power and RF devices. Since the high-quality gate dielectric layer is mandatory for developing the Ga<inf>2</inf>O<inf>3</inf> based MOSFET, theoretical investigation on the properties of Al<inf>2</inf>O<inf>3</inf>$beta$-Ga<inf>2</inf>O<inf>3</inf> interface is required. We have generated atomistic Al<inf>2</inf>O<inf>3</inf>$beta$-Ga<inf>2</inf>O<inf>3</inf> interface models, which are consistent with experimental results. By the density functional theory(DFT)-based electronic structure calculation, it is confirmed that the generated interface structures are physically stable. The band offset levels are applicable to the MOS structure for device application. It is expected that the atomistic interface structures generated in this work can be used for further first principles investigation on the Al<inf>2</inf>O<inf>3</inf>$beta$-Ga<inf>2</inf>O<inf>3</inf> interface.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"210 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115494574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：