In this letter, high power density AlGaN/GaN high electron-mobility transistors (HEMTs) on a freestanding GaN substrate are reported. An asymmetric Γ-shaped 500-nm gate with a field plate of 650 nm is introduced to improve microwave power performance. The breakdown voltage (BV) is increased to more than 200 V for the fabricated device with gate-to-source and gate-to-drain distances of 1.08 and 2.92 μm. A record continuous-wave power density of 11.2 W/mm@10 GHz is realized with a drain bias of 70 V. The maximum oscillation frequency (fmax) and unity current gain cut-off frequency (ft) of the AlGaN/GaN HEMTs exceed 30 and 20 GHz, respectively. The results demonstrate the potential of AlGaN/GaN HEMTs on free-standing GaN substrates for microwave power applications.
{"title":"11.2 W/mm power density AlGaN/GaN high electron-mobility transistors on a GaN substrate","authors":"Yansheng Hu, Yuangang Wang, Wei Wang, Yuanjie Lv, Hongyu Guo, Zhirong Zhang, Hao Yu, Xubo Song, Xingye zhou, Tingting Han, Shaobo Dun, Hongyu Liu, Aimin Bu, Zhihong Feng","doi":"10.1088/1674-4926/45/1/012501","DOIUrl":"https://doi.org/10.1088/1674-4926/45/1/012501","url":null,"abstract":"In this letter, high power density AlGaN/GaN high electron-mobility transistors (HEMTs) on a freestanding GaN substrate are reported. An asymmetric Γ-shaped 500-nm gate with a field plate of 650 nm is introduced to improve microwave power performance. The breakdown voltage (BV) is increased to more than 200 V for the fabricated device with gate-to-source and gate-to-drain distances of 1.08 and 2.92 <italic toggle=\"yes\">μ</italic>m. A record continuous-wave power density of 11.2 W/mm@10 GHz is realized with a drain bias of 70 V. The maximum oscillation frequency (<italic toggle=\"yes\">f</italic>\u0000<sub>max</sub>) and unity current gain cut-off frequency (<italic toggle=\"yes\">f</italic>\u0000<sub>t</sub>) of the AlGaN/GaN HEMTs exceed 30 and 20 GHz, respectively. The results demonstrate the potential of AlGaN/GaN HEMTs on free-standing GaN substrates for microwave power applications.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"199 1","pages":""},"PeriodicalIF":5.1,"publicationDate":"2024-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139509727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In the past few years, many groups have focused on the research and development of GaN-based ultraviolet laser diodes (UV LDs). Great progresses have been achieved even though many challenges exist. In this article, we analyze the challenges of developing GaN-based ultraviolet laser diodes, and the approaches to improve the performance of ultraviolet laser diode are reviewed. With these techniques, room temperature (RT) pulsed oscillation of AlGaN UVA (ultraviolet A) LD has been realized, with a lasing wavelength of 357.9 nm. Combining with the suppression of thermal effect, the high output power of 3.8 W UV LD with a lasing wavelength of 386.5 nm was also fabricated.
{"title":"GaN based ultraviolet laser diodes","authors":"Jing Yang, Degang Zhao, Zongshun Liu, Yujie Huang, Baibin Wang, Xiaowei Wang, Yuheng Zhang, Zhenzhuo Zhang, Feng Liang, Lihong Duan, Hai Wang, Yongsheng Shi","doi":"10.1088/1674-4926/45/1/011501","DOIUrl":"https://doi.org/10.1088/1674-4926/45/1/011501","url":null,"abstract":"In the past few years, many groups have focused on the research and development of GaN-based ultraviolet laser diodes (UV LDs). Great progresses have been achieved even though many challenges exist. In this article, we analyze the challenges of developing GaN-based ultraviolet laser diodes, and the approaches to improve the performance of ultraviolet laser diode are reviewed. With these techniques, room temperature (RT) pulsed oscillation of AlGaN UVA (ultraviolet A) LD has been realized, with a lasing wavelength of 357.9 nm. Combining with the suppression of thermal effect, the high output power of 3.8 W UV LD with a lasing wavelength of 386.5 nm was also fabricated.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"70 1","pages":""},"PeriodicalIF":5.1,"publicationDate":"2024-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139509911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-01-01DOI: 10.1088/1674-4926/45/1/012504
Shunpeng Lu, Jiangxiao Bai, Hongbo Li, Ke Jiang, Jianwei Ben, Shanli Zhang, Zi-Hui Zhang, Xiaojuan Sun, Dabing Li
240 nm AlGaN-based micro-LEDs with different sizes are designed and fabricated. Then, the external quantum efficiency (EQE) and light extraction efficiency (LEE) are systematically investigated by comparing size and edge effects. Here, it is revealed that the peak optical output power increases by 81.83% with the size shrinking from 50.0 to 25.0 μm. Thereinto, the LEE increases by 26.21% and the LEE enhancement mainly comes from the sidewall light extraction. Most notably, transverse-magnetic (TM) mode light intensifies faster as the size shrinks due to the tilted mesa side-wall and Al reflector design. However, when it turns to 12.5 μm sized micro-LEDs, the output power is lower than 25.0 μm sized ones. The underlying mechanism is that even though protected by SiO2 passivation, the edge effect which leads to current leakage and Shockley-Read-Hall (SRH) recombination deteriorates rapidly with the size further shrinking. Moreover, the ratio of the p-contact area to mesa area is much lower, which deteriorates the p-type current spreading at the mesa edge. These findings show a role of thumb for the design of high efficiency micro-LEDs with wavelength below 250 nm, which will pave the way for wide applications of deep ultraviolet (DUV) micro-LEDs.
{"title":"240 nm AlGaN-based deep ultraviolet micro-LEDs: size effect versus edge effect","authors":"Shunpeng Lu, Jiangxiao Bai, Hongbo Li, Ke Jiang, Jianwei Ben, Shanli Zhang, Zi-Hui Zhang, Xiaojuan Sun, Dabing Li","doi":"10.1088/1674-4926/45/1/012504","DOIUrl":"https://doi.org/10.1088/1674-4926/45/1/012504","url":null,"abstract":"240 nm AlGaN-based micro-LEDs with different sizes are designed and fabricated. Then, the external quantum efficiency (EQE) and light extraction efficiency (LEE) are systematically investigated by comparing size and edge effects. Here, it is revealed that the peak optical output power increases by 81.83% with the size shrinking from 50.0 to 25.0 <italic toggle=\"yes\">μ</italic>m. Thereinto, the LEE increases by 26.21% and the LEE enhancement mainly comes from the sidewall light extraction. Most notably, transverse-magnetic (TM) mode light intensifies faster as the size shrinks due to the tilted mesa side-wall and Al reflector design. However, when it turns to 12.5 <italic toggle=\"yes\">μ</italic>m sized micro-LEDs, the output power is lower than 25.0 <italic toggle=\"yes\">μ</italic>m sized ones. The underlying mechanism is that even though protected by SiO<sub>2</sub> passivation, the edge effect which leads to current leakage and Shockley-Read-Hall (SRH) recombination deteriorates rapidly with the size further shrinking. Moreover, the ratio of the p-contact area to mesa area is much lower, which deteriorates the p-type current spreading at the mesa edge. These findings show a role of thumb for the design of high efficiency micro-LEDs with wavelength below 250 nm, which will pave the way for wide applications of deep ultraviolet (DUV) micro-LEDs.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"19 1","pages":""},"PeriodicalIF":5.1,"publicationDate":"2024-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139509722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-01-01DOI: 10.1088/1674-4926/45/1/012502
Guang Yang, Lingbo Xu, Can Cui, Xiaodong Pi, Deren Yang, Rong Wang
Molten-alkali etching has been widely used to reveal dislocations in 4H silicon carbide (4H-SiC), which has promoted the identification and statistics of dislocation density in 4H-SiC single crystals. However, the etching mechanism of 4H-SiC is limited misunderstood. In this letter, we reveal the anisotropic etching mechanism of the Si face and C face of 4H-SiC by combining molten-KOH etching, X-ray photoelectron spectroscopy (XPS) and first-principles investigations. The activation energies for the molten-KOH etching of the C face and Si face of 4H-SiC are calculated to be 25.09 and 35.75 kcal/mol, respectively. The molten-KOH etching rate of the C face is higher than the Si face. Combining XPS analysis and first-principles calculations, we find that the molten-KOH etching of 4H-SiC is proceeded by the cycling of the oxidation of 4H-SiC by the dissolved oxygen and the removal of oxides by molten KOH. The faster etching rate of the C face is caused by the fact that the oxides on the C face are unstable, and easier to be removed with molten alkali, rather than the C face being easier to be oxidized.
熔碱刻蚀已被广泛用于揭示 4H 碳化硅（4H-SiC）中的位错，这促进了对 4H-SiC 单晶中位错密度的识别和统计。然而，4H-SiC 的蚀刻机理被误解得很有限。在这封信中，我们结合熔融-KOH蚀刻、X射线光电子能谱（XPS）和第一原理研究，揭示了4H-SiC硅面和C面的各向异性蚀刻机制。计算得出 4H-SiC C 面和 Si 面的熔融-KOH 蚀刻活化能分别为 25.09 和 35.75 kcal/mol。C 面的熔融-KOH 蚀刻率高于 Si 面。结合 XPS 分析和第一原理计算，我们发现 4H-SiC 的熔融-KOH 蚀刻是由溶解氧氧化 4H-SiC 和熔融 KOH 去除氧化物循环进行的。C 面蚀刻速度较快的原因是 C 面的氧化物不稳定，更容易被熔融碱去除，而不是 C 面更容易被氧化。
{"title":"Anisotropic etching mechanisms of 4H-SiC: Experimental and first-principles insights","authors":"Guang Yang, Lingbo Xu, Can Cui, Xiaodong Pi, Deren Yang, Rong Wang","doi":"10.1088/1674-4926/45/1/012502","DOIUrl":"https://doi.org/10.1088/1674-4926/45/1/012502","url":null,"abstract":"Molten-alkali etching has been widely used to reveal dislocations in 4H silicon carbide (4H-SiC), which has promoted the identification and statistics of dislocation density in 4H-SiC single crystals. However, the etching mechanism of 4H-SiC is limited misunderstood. In this letter, we reveal the anisotropic etching mechanism of the Si face and C face of 4H-SiC by combining molten-KOH etching, X-ray photoelectron spectroscopy (XPS) and first-principles investigations. The activation energies for the molten-KOH etching of the C face and Si face of 4H-SiC are calculated to be 25.09 and 35.75 kcal/mol, respectively. The molten-KOH etching rate of the C face is higher than the Si face. Combining XPS analysis and first-principles calculations, we find that the molten-KOH etching of 4H-SiC is proceeded by the cycling of the oxidation of 4H-SiC by the dissolved oxygen and the removal of oxides by molten KOH. The faster etching rate of the C face is caused by the fact that the oxides on the C face are unstable, and easier to be removed with molten alkali, rather than the C face being easier to be oxidized.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"70 1","pages":""},"PeriodicalIF":5.1,"publicationDate":"2024-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139509723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-01DOI: 10.1088/1674-4926/44/12/121801
Chen-Chung Du, Ran Ye, Xiaolong Cai, Xiangyang Duan, Haijun Liu, Yu Zhang, Gang Qiu, Minhan Mi
The GaN HEMT is a potential candidate for RF applications due to the high frequency and large power handling capability. To ensure the quality of the communication signal, linearity is a key parameter during the system design. However, the GaN HEMT usually suffers from the nonlinearity problems induced by the nonlinear parasitic capacitance, transconductance, channel transconductance etc. Among them, the transconductance reduction is the main contributor for the nonlinearity and is mostly attributed to the scattering effect, the increasing resistance of access region, the self-heating effect and the trapping effects. Based on the mechanisms, device-level improvement methods of transconductance including the trapping suppression, the nanowire channel, the graded channel, the double channel, the transconductance compensation and the new material structures have been proposed recently. The features of each method are reviewed and compared to provide an overview perspective on the linearity of the GaN HEMT at the device level.
GaN HEMT 具有高频率和大功率处理能力，是射频应用的潜在候选器件。为确保通信信号的质量，线性度是系统设计中的一个关键参数。然而，GaN HEMT 通常会受到非线性寄生电容、跨电导、沟道跨电导等非线性因素的影响。其中，跨导降低是造成非线性的主要原因，主要归因于散射效应、接入区电阻增加、自热效应和陷波效应。根据这些机理，最近有人提出了器件级的跨导改进方法，包括抑制陷波、纳米线沟道、分级沟道、双沟道、跨导补偿和新材料结构。我们对每种方法的特点进行了回顾和比较，以便从器件层面对 GaN HEMT 的线性度进行全面透视。
{"title":"A review on GaN HEMTs: nonlinear mechanisms and improvement methods","authors":"Chen-Chung Du, Ran Ye, Xiaolong Cai, Xiangyang Duan, Haijun Liu, Yu Zhang, Gang Qiu, Minhan Mi","doi":"10.1088/1674-4926/44/12/121801","DOIUrl":"https://doi.org/10.1088/1674-4926/44/12/121801","url":null,"abstract":"The GaN HEMT is a potential candidate for RF applications due to the high frequency and large power handling capability. To ensure the quality of the communication signal, linearity is a key parameter during the system design. However, the GaN HEMT usually suffers from the nonlinearity problems induced by the nonlinear parasitic capacitance, transconductance, channel transconductance etc. Among them, the transconductance reduction is the main contributor for the nonlinearity and is mostly attributed to the scattering effect, the increasing resistance of access region, the self-heating effect and the trapping effects. Based on the mechanisms, device-level improvement methods of transconductance including the trapping suppression, the nanowire channel, the graded channel, the double channel, the transconductance compensation and the new material structures have been proposed recently. The features of each method are reviewed and compared to provide an overview perspective on the linearity of the GaN HEMT at the device level.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"2 3","pages":""},"PeriodicalIF":5.1,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139024517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-01DOI: 10.1088/1674-4926/44/12/124101
Zhenzhen Kong, Hongxiao Lin, Hailing Wang, Yanpeng Song, Junjie Li, Xiaomeng Liu, Anyan Du, Yuanhao Miao, Yiwen Zhang, Yuhui Ren, Chen Li, Jiahan Yu, Jinbiao Liu, Jingxiong Liu, Qinzhu Zhang, Jianfeng Gao, Huihui Li, Xiangsheng Wang, Junfeng Li, Henry H. Radamson, Chao Zhao, Tianchun Ye, Guilei Wang
Fifteen periods of Si/Si0.7Ge0.3 multilayers (MLs) with various SiGe thicknesses are grown on a 200 mm Si substrate using reduced pressure chemical vapor deposition (RPCVD). Several methods were utilized to characterize and analyze the ML structures. The high resolution transmission electron microscopy (HRTEM) results show that the ML structure with 20 nm Si0.7Ge0.3 features the best crystal quality and no defects are observed. Stacked Si0.7Ge0.3 ML structures etched by three different methods were carried out and compared, and the results show that they have different selectivities and morphologies. In this work, the fabrication process influences on Si/SiGe MLs are studied and there are no significant effects on the Si layers, which are the channels in lateral gate all around field effect transistor (L-GAAFET) devices. For vertically-stacked dynamic random access memory (VS-DRAM), it is necessary to consider the dislocation caused by strain accumulation and stress release after the number of stacked layers exceeds the critical thickness. These results pave the way for the manufacture of high-performance multivertical-stacked Si nanowires, nanosheet L-GAAFETs, and DRAM devices.
利用减压化学气相沉积（RPCVD）技术，在 200 毫米的硅衬底上生长出 15 个不同硅锗厚度的硅/硅 0.7 锗 0.3 多层膜（ML）。我们采用了多种方法来表征和分析 ML 结构。高分辨率透射电子显微镜（HRTEM）结果表明，20 nm Si0.7Ge0.3 的 ML 结构具有最佳的晶体质量，且未观察到缺陷。通过比较三种不同方法蚀刻的堆叠 Si0.7Ge0.3 ML 结构，结果表明它们具有不同的选择性和形态。在这项工作中，研究了硅/硅锗 ML 的制造工艺影响，结果表明硅层没有受到明显影响，而硅层是侧栅全周场效应晶体管（L-GAAFET）器件的通道。对于垂直堆叠动态随机存取存储器（VS-DRAM），有必要考虑堆叠层数超过临界厚度后应变积累和应力释放引起的位错。这些结果为制造高性能多垂直叠层硅纳米线、纳米片 L-GAAFET 和 DRAM 器件铺平了道路。
{"title":"Multiple SiGe/Si layers epitaxy and SiGe selective etching for vertically stacked DRAM","authors":"Zhenzhen Kong, Hongxiao Lin, Hailing Wang, Yanpeng Song, Junjie Li, Xiaomeng Liu, Anyan Du, Yuanhao Miao, Yiwen Zhang, Yuhui Ren, Chen Li, Jiahan Yu, Jinbiao Liu, Jingxiong Liu, Qinzhu Zhang, Jianfeng Gao, Huihui Li, Xiangsheng Wang, Junfeng Li, Henry H. Radamson, Chao Zhao, Tianchun Ye, Guilei Wang","doi":"10.1088/1674-4926/44/12/124101","DOIUrl":"https://doi.org/10.1088/1674-4926/44/12/124101","url":null,"abstract":"Fifteen periods of Si/Si<sub>0.7</sub>Ge<sub>0.3</sub> multilayers (MLs) with various SiGe thicknesses are grown on a 200 mm Si substrate using reduced pressure chemical vapor deposition (RPCVD). Several methods were utilized to characterize and analyze the ML structures. The high resolution transmission electron microscopy (HRTEM) results show that the ML structure with 20 nm Si<sub>0.7</sub>Ge<sub>0.3</sub> features the best crystal quality and no defects are observed. Stacked Si<sub>0.7</sub>Ge<sub>0.3</sub> ML structures etched by three different methods were carried out and compared, and the results show that they have different selectivities and morphologies. In this work, the fabrication process influences on Si/SiGe MLs are studied and there are no significant effects on the Si layers, which are the channels in lateral gate all around field effect transistor (L-GAAFET) devices. For vertically-stacked dynamic random access memory (VS-DRAM), it is necessary to consider the dislocation caused by strain accumulation and stress release after the number of stacked layers exceeds the critical thickness. These results pave the way for the manufacture of high-performance multivertical-stacked Si nanowires, nanosheet L-GAAFETs, and DRAM devices.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"4 1","pages":""},"PeriodicalIF":5.1,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139761869","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-01DOI: 10.1088/1674-4926/44/12/122801
Pavel Butenko, Michael Boiko, Mikhail Sharkov, Aleksei Almaev, Aleksnder Kitsay, Vladimir Krymov, Anton Zarichny, Vladimir Nikolaev
A commercial epi-ready () β-Ga2O3 wafer was investigated upon diamond sawing into pieces measuring 2.5 × 3 mm2. The defect structure and crystallinity in the cut samples has been studied by X-ray diffraction and a selective wet etching technique. The density of defects was estimated from the average value of etch pits calculated, including near-edge regions, and was obtained close to 109 cm−2. Blocks with lattice orientation deviated by angles of 1−3 arcmin, as well as non-stoichiometric fractions with a relative strain about (1.0−1.5) × 10−4 in the [] direction, were found. Crystal perfection was shown to decrease significantly towards the cutting lines of the samples. To reduce the number of structural defects and increase the crystal perfection of the samples via increasing defect motion mobility, the thermal annealing was employed. Polygonization and formation of a mosaic structure coupled with dislocation wall appearance upon 3 h of annealing at 1100 °C was observed. The fractions characterized by non-stoichiometry phases and the block deviation disappeared. The annealing for 11 h improved the homogeneity and perfection in the crystals. The average density of the etch pits dropped down significantly to 8 × 106 cm−2.
{"title":"High-temperature annealing of ( ) β-Ga2O3 substrates for reducing structural defects after diamond sawing","authors":"Pavel Butenko, Michael Boiko, Mikhail Sharkov, Aleksei Almaev, Aleksnder Kitsay, Vladimir Krymov, Anton Zarichny, Vladimir Nikolaev","doi":"10.1088/1674-4926/44/12/122801","DOIUrl":"https://doi.org/10.1088/1674-4926/44/12/122801","url":null,"abstract":"A commercial epi-ready (<inline-formula>\u0000<tex-math><?CDATA $ {bar 2}01 $?></tex-math>\u0000<inline-graphic xlink:href=\"jos_44_12_122801_M2.jpg\" xlink:type=\"simple\"></inline-graphic>\u0000</inline-formula>) <italic toggle=\"yes\">β</italic>-Ga<sub>2</sub>O<sub>3</sub> wafer was investigated upon diamond sawing into pieces measuring 2.5 × 3 mm<sup>2</sup>. The defect structure and crystallinity in the cut samples has been studied by X-ray diffraction and a selective wet etching technique. The density of defects was estimated from the average value of etch pits calculated, including near-edge regions, and was obtained close to 10<sup>9</sup> cm<sup>−2</sup>. Blocks with lattice orientation deviated by angles of 1−3 arcmin, as well as non-stoichiometric fractions with a relative strain about (1.0−1.5) × 10<sup>−4</sup> in the [<inline-formula>\u0000<tex-math><?CDATA $ {bar 2}01 $?></tex-math>\u0000<inline-graphic xlink:href=\"jos_44_12_122801_M3.jpg\" xlink:type=\"simple\"></inline-graphic>\u0000</inline-formula>] direction, were found. Crystal perfection was shown to decrease significantly towards the cutting lines of the samples. To reduce the number of structural defects and increase the crystal perfection of the samples via increasing defect motion mobility, the thermal annealing was employed. Polygonization and formation of a mosaic structure coupled with dislocation wall appearance upon 3 h of annealing at 1100 °C was observed. The fractions characterized by non-stoichiometry phases and the block deviation disappeared. The annealing for 11 h improved the homogeneity and perfection in the crystals. The average density of the etch pits dropped down significantly to 8 × 10<sup>6</sup> cm<sup>−2</sup>.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"185 1","pages":""},"PeriodicalIF":5.1,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140613427","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We have successfully demonstrated a 1 Kb spin-orbit torque (SOT) magnetic random-access memory (MRAM) multiplexer (MUX) array with remarkable performance. The 1 Kb MUX array exhibits an in-die function yield of over 99.6%. Additionally, it provides a sufficient readout window, with a TMR/RP_sigma% value of 21.4. Moreover, the SOT magnetic tunnel junctions (MTJs) in the array show write error rates as low as 10−6 without any ballooning effects or back-hopping behaviors, ensuring the write stability and reliability. This array achieves write operations in 20 ns and 1.2 V for an industrial-level temperature range from −40 to 125 °C. Overall, the demonstrated array shows competitive specifications compared to the state-of-the-art works. Our work paves the way for the industrial-scale production of SOT-MRAM, moving this technology beyond R&D and towards widespread adoption.
我们成功地展示了一个 1 Kb 的自旋轨道力矩（SOT）磁性随机存取存储器（MRAM）多路复用器（MUX）阵列，其性能卓越。1 Kb MUX 阵列的片内功能良率超过 99.6%。此外，它还提供了足够的读出窗口，TMR/RP_sigma% 值为 21.4。此外，该阵列中的 SOT 磁隧道结 (MTJ) 显示出低至 10-6 的写入错误率，没有任何气球效应或跳回行为，确保了写入稳定性和可靠性。该阵列可在 -40 至 125 °C 的工业级温度范围内实现 20 ns 和 1.2 V 的写入操作。总体而言，与最先进的作品相比，所展示的阵列在规格上具有竞争力。我们的工作为 SOT-MRAM 的工业规模生产铺平了道路，使这项技术超越了研发阶段，走向广泛应用。
{"title":"Demonstration of a manufacturable SOT-MRAM multiplexer array towards industrial applications","authors":"Chuanpeng Jiang, Jinhao Li, Hongchao Zhang, Shiyang Lu, Pengbin Li, Chao Wang, Zhongkui Zhang, Zhengyi Hou, Xu Liu, Jiagao Feng, He Zhang, Hui Jin, Gefei Wang, Hongxi Liu, Kaihua Cao, Zhaohao Wang, Weisheng Zhao","doi":"10.1088/1674-4926/44/12/122501","DOIUrl":"https://doi.org/10.1088/1674-4926/44/12/122501","url":null,"abstract":"We have successfully demonstrated a 1 Kb spin-orbit torque (SOT) magnetic random-access memory (MRAM) multiplexer (MUX) array with remarkable performance. The 1 Kb MUX array exhibits an in-die function yield of over 99.6%. Additionally, it provides a sufficient readout window, with a TMR/<italic toggle=\"yes\">R</italic>\u0000<sub>P</sub>_sigma% value of 21.4. Moreover, the SOT magnetic tunnel junctions (MTJs) in the array show write error rates as low as 10<sup>−6</sup> without any ballooning effects or back-hopping behaviors, ensuring the write stability and reliability. This array achieves write operations in 20 ns and 1.2 V for an industrial-level temperature range from −40 to 125 °C. Overall, the demonstrated array shows competitive specifications compared to the state-of-the-art works. Our work paves the way for the industrial-scale production of SOT-MRAM, moving this technology beyond R&D and towards widespread adoption.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"7 1","pages":""},"PeriodicalIF":5.1,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139761809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Palladium (Pd)-based sulfides have triggered extensive interest due to their unique properties and potential applications in the fields of electronics and optoelectronics. However, the synthesis of large-scale uniform PdS and PdS2 nanofilms (NFs) remains an enormous challenge. In this work, 2-inch wafer-scale PdS and PdS2 NFs with excellent stability can be controllably prepared via chemical vapor deposition combined with electron beam evaporation technique. The thickness of the pre-deposited Pd film and the sulfurization temperature are critical for the precise synthesis of PdS and PdS2 NFs. A corresponding growth mechanism has been proposed based on our experimental results and Gibbs free energy calculations. The electrical transport properties of PdS and PdS2 NFs were explored by conductive atomic force microscopy. Our findings have achieved the controllable growth of PdS and PdS2 NFs, which may provide a pathway to facilitate PdS and PdS2 based applications for next-generation high performance optoelectronic devices.
{"title":"Controllable growth of wafer-scale PdS and PdS2 nanofilms via chemical vapor deposition combined with an electron beam evaporation technique","authors":"Hui Gao, Hongyi Zhou, Yulong Hao, Guoliang Zhou, Huan Zhou, Fenglin Gao, Jinbiao Xiao, Pinghua Tang, Guolin Hao","doi":"10.1088/1674-4926/44/12/122001","DOIUrl":"https://doi.org/10.1088/1674-4926/44/12/122001","url":null,"abstract":"Palladium (Pd)-based sulfides have triggered extensive interest due to their unique properties and potential applications in the fields of electronics and optoelectronics. However, the synthesis of large-scale uniform PdS and PdS<sub>2</sub> nanofilms (NFs) remains an enormous challenge. In this work, 2-inch wafer-scale PdS and PdS<sub>2</sub> NFs with excellent stability can be controllably prepared via chemical vapor deposition combined with electron beam evaporation technique. The thickness of the pre-deposited Pd film and the sulfurization temperature are critical for the precise synthesis of PdS and PdS<sub>2</sub> NFs. A corresponding growth mechanism has been proposed based on our experimental results and Gibbs free energy calculations. The electrical transport properties of PdS and PdS<sub>2</sub> NFs were explored by conductive atomic force microscopy. Our findings have achieved the controllable growth of PdS and PdS<sub>2</sub> NFs, which may provide a pathway to facilitate PdS and PdS<sub>2</sub> based applications for next-generation high performance optoelectronic devices.","PeriodicalId":17038,"journal":{"name":"Journal of Semiconductors","volume":"7 1","pages":""},"PeriodicalIF":5.1,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139761873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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