Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088541
A. Icaza-Deckelmann, G. Wachutka, J. Krumrey, F. Hirler
The failure mechanism of multiple-cell power DMOS transistors under UIS stress conditions, where the device current is imposed by the external circuit, is investigated by means of electrothermal device simulation. The results suggest that the failure is caused by the concentration of the each cell's current in a bipolar transistor structure. In the simulation, a strong temperature rise precedes this pattern formation, within application-relevant current levels. Our analysis shows that the heat generated by the high current density may lead to an instability, and that subsequently the device current is likely to concentrate in one single cell of the device, producing eventual failure.
{"title":"Failure mechanism of power DMOS transistors under UIS stress conditions","authors":"A. Icaza-Deckelmann, G. Wachutka, J. Krumrey, F. Hirler","doi":"10.1109/ASDAM.2002.1088541","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088541","url":null,"abstract":"The failure mechanism of multiple-cell power DMOS transistors under UIS stress conditions, where the device current is imposed by the external circuit, is investigated by means of electrothermal device simulation. The results suggest that the failure is caused by the concentration of the each cell's current in a bipolar transistor structure. In the simulation, a strong temperature rise precedes this pattern formation, within application-relevant current levels. Our analysis shows that the heat generated by the high current density may lead to an instability, and that subsequently the device current is likely to concentrate in one single cell of the device, producing eventual failure.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115730212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088483
D. Haško, F. Uherek, F. Mika
We report on the design and characterization of a low-noise and low voltage InGaAs/InP avalanche photodiode (APD) grown by metalorganic chemical vapour deposition (MOCVD). The investigated InGaAs/InP APD structure for lightwave transmission systems consists of separate absorption InGaAs, charge InP and InP multiplication layers (SACM). The designed APD without a guard ring exhibits a dark current less than 5 /spl mu/A near the breakdown voltage (V/sub B/ /spl ap/ 48 V). External quantum efficiency >75% (at /spl lambda/ = 1300 nm), avalanche gain up to 5 and capacitance lower than 1.1 pF at the operating voltage were achieved. The measured temperature dependence of current-voltage characteristics, capacitance-voltage and spectral characteristics are presented.
{"title":"InGaAs/InP avalanche photodiodes with a thin multiplication layer","authors":"D. Haško, F. Uherek, F. Mika","doi":"10.1109/ASDAM.2002.1088483","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088483","url":null,"abstract":"We report on the design and characterization of a low-noise and low voltage InGaAs/InP avalanche photodiode (APD) grown by metalorganic chemical vapour deposition (MOCVD). The investigated InGaAs/InP APD structure for lightwave transmission systems consists of separate absorption InGaAs, charge InP and InP multiplication layers (SACM). The designed APD without a guard ring exhibits a dark current less than 5 /spl mu/A near the breakdown voltage (V/sub B/ /spl ap/ 48 V). External quantum efficiency >75% (at /spl lambda/ = 1300 nm), avalanche gain up to 5 and capacitance lower than 1.1 pF at the operating voltage were achieved. The measured temperature dependence of current-voltage characteristics, capacitance-voltage and spectral characteristics are presented.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"21 5 Suppl 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116642763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088525
J. Škriniarová, A. van der Hart, H. Bochem, A. Fox, P. Kordos
Photoassisted electrochemical (PEC) etching of n-doped GaN layer grown on sapphire in the KOH based solution under illumination by a mercury-xenon-arc lamp is demonstrated. Smooth surfaces were obtained for a narrow range of etching conditions. It was found that this range could be extended by using etch conditions which produced "whiskers". Subsequent post treatment in developer AZ 400K and KOH solution were used to remove these whiskers and reduced fibrous texture of the grooves walls. This can provide a smooth sidewall on the PEC etched surface. As a result of optimized PEC process 500 nm wide grooves in GaN were successfully obtained.
{"title":"Photoenhanced wet etching of gallium nitride on submicrometer scale","authors":"J. Škriniarová, A. van der Hart, H. Bochem, A. Fox, P. Kordos","doi":"10.1109/ASDAM.2002.1088525","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088525","url":null,"abstract":"Photoassisted electrochemical (PEC) etching of n-doped GaN layer grown on sapphire in the KOH based solution under illumination by a mercury-xenon-arc lamp is demonstrated. Smooth surfaces were obtained for a narrow range of etching conditions. It was found that this range could be extended by using etch conditions which produced \"whiskers\". Subsequent post treatment in developer AZ 400K and KOH solution were used to remove these whiskers and reduced fibrous texture of the grooves walls. This can provide a smooth sidewall on the PEC etched surface. As a result of optimized PEC process 500 nm wide grooves in GaN were successfully obtained.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125145730","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088509
L. Benbahouche, S. Latrech, C. Gontrand
The great advances in power electronic technology and the rapid development of power semiconductor devices both in power and switching frequency ranges, have led to all increasing interest in the use of insulated gale bipolar transistor (IGBT) device in industrial applications. At the same time, the importance of simulation in the research and development increases. For years, this fact could be observed in microelectronics whereas in power electronics simulation has mostly been restricted. This lack of simulation is due to limitation in two key elements: simulation tools and models for power devices like IGBT. The aim of this paper, is to present a new approach which consists in defining our computer program (numerical model) of the IGBT based on the finite element technique (FEM), to offer an easy to use IGBT and other devices for our program, showing short computing time and reasonable accuracy, to predict and understand the behavior of various topologies of devices, to perform automated layout of the device to overcome some of the difficulties associated with analytical methods and to identify the failure mechanisms, then we propose some remedies. The validity of our computer program (this approach) is confirmed by comparison between simulation and theory results as well as the manufacture's data, and a good agreement is recorded for IGBT devices.
{"title":"New numerical power IGBT model and simulation of its electrical characteristics","authors":"L. Benbahouche, S. Latrech, C. Gontrand","doi":"10.1109/ASDAM.2002.1088509","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088509","url":null,"abstract":"The great advances in power electronic technology and the rapid development of power semiconductor devices both in power and switching frequency ranges, have led to all increasing interest in the use of insulated gale bipolar transistor (IGBT) device in industrial applications. At the same time, the importance of simulation in the research and development increases. For years, this fact could be observed in microelectronics whereas in power electronics simulation has mostly been restricted. This lack of simulation is due to limitation in two key elements: simulation tools and models for power devices like IGBT. The aim of this paper, is to present a new approach which consists in defining our computer program (numerical model) of the IGBT based on the finite element technique (FEM), to offer an easy to use IGBT and other devices for our program, showing short computing time and reasonable accuracy, to predict and understand the behavior of various topologies of devices, to perform automated layout of the device to overcome some of the difficulties associated with analytical methods and to identify the failure mechanisms, then we propose some remedies. The validity of our computer program (this approach) is confirmed by comparison between simulation and theory results as well as the manufacture's data, and a good agreement is recorded for IGBT devices.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125976222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088544
J. Lienemann, A. Greiner, J. Korvink
Self assembly in the fluidic phase is a technique excellently suited for the parallel assembly of millions of micro-parts, as it is necessary for pixel displays. In this work, we investigate the effect of volume shrinking during an inhomogeneous polymerization of the glue and discuss the implications for the design of the assembled micro-parts.
{"title":"Volume shrinking in micro-fluidic self-assembly","authors":"J. Lienemann, A. Greiner, J. Korvink","doi":"10.1109/ASDAM.2002.1088544","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088544","url":null,"abstract":"Self assembly in the fluidic phase is a technique excellently suited for the parallel assembly of millions of micro-parts, as it is necessary for pixel displays. In this work, we investigate the effect of volume shrinking during an inhomogeneous polymerization of the glue and discuss the implications for the design of the assembled micro-parts.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124569469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088521
S. Kubicek, K. De Meyer
In this paper some of the device and process issues of scaling CMOS technology down to 25 nm gate lengths are reviewed. First scaling is discussed front a device perspective and the main device related issues are identified. An overview of the historical trends and predictions by the ITRS roadmap follows. Implications of the scaling predictions for the specific device process modules are reviewed and recent experimental data are presented.
{"title":"CMOS scaling to 25 nm gate lengths","authors":"S. Kubicek, K. De Meyer","doi":"10.1109/ASDAM.2002.1088521","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088521","url":null,"abstract":"In this paper some of the device and process issues of scaling CMOS technology down to 25 nm gate lengths are reviewed. First scaling is discussed front a device perspective and the main device related issues are identified. An overview of the historical trends and predictions by the ITRS roadmap follows. Implications of the scaling predictions for the specific device process modules are reviewed and recent experimental data are presented.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124789084","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088464
E. Burian, T. Lalinsky
We refer of novel simulation technology DEETEN based on spatial domain decomposition, capable of efficient multi-million-point 3D simulations on a conventional PC The technology has been successfully applied to 3D thermal analysis of a GaAs Micromechanical Thermal Converter microsystem.
{"title":"The effect of polyimide fixation on thermal performance of GaAs cantilever based MEMS: a 3D numerical analysis with DEETEN","authors":"E. Burian, T. Lalinsky","doi":"10.1109/ASDAM.2002.1088464","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088464","url":null,"abstract":"We refer of novel simulation technology DEETEN based on spatial domain decomposition, capable of efficient multi-million-point 3D simulations on a conventional PC The technology has been successfully applied to 3D thermal analysis of a GaAs Micromechanical Thermal Converter microsystem.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124176647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088537
T. Bechtold, E. Rudnyi, J. Korvink
In this paper we present an automatic order reduction of a linear thermo-electric model describing a novel type of micropropulsion device. Model order reduction is essential to achieve easily to evaluate, yet accurate macromodel of the device. We present numerical simulation results of the full finite element model and the different reduced order models that describe the transient thermo-electric behaviour of the device. The advantages of an Arnoldi-algorithm-based model order reduction over a commercially available reduced order modeling after Guyan are shown.
{"title":"Automatic order reduction of thermo-electric models for MEMS: Arnoldi versus Guyan","authors":"T. Bechtold, E. Rudnyi, J. Korvink","doi":"10.1109/ASDAM.2002.1088537","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088537","url":null,"abstract":"In this paper we present an automatic order reduction of a linear thermo-electric model describing a novel type of micropropulsion device. Model order reduction is essential to achieve easily to evaluate, yet accurate macromodel of the device. We present numerical simulation results of the full finite element model and the different reduced order models that describe the transient thermo-electric behaviour of the device. The advantages of an Arnoldi-algorithm-based model order reduction over a commercially available reduced order modeling after Guyan are shown.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115827673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088502
R. Kúdela, M. Kučera, D. Gregušová, V. Cambel, J. Novák
In/sub 1-x/Ga/sub x/As/sub 1-y/P/sub y//InP layers and LED structures were prepared for the wavelength 1220 nm by LP MOVPE. Very high phosphine/arsine ratio (>100) was necessary to achieve desirable quaternary composition at the growth temperature of 650/spl deg/C. Very good surface morphology with the height of the growth steps of one monolayer was measured by AFM on the lattice matched layers. Significant shift of the photoluminescence spectra from p-type layers, contrary to n-type or undoped layers, was measured at 5 K. The electroluminescent spectrum from a quaternary LED measured at 300 K with a maximum at 1224.6 nm is shown.
{"title":"MOVPE growth of 1220 nm (In,Ga)(As,P)/InP LED structures","authors":"R. Kúdela, M. Kučera, D. Gregušová, V. Cambel, J. Novák","doi":"10.1109/ASDAM.2002.1088502","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088502","url":null,"abstract":"In/sub 1-x/Ga/sub x/As/sub 1-y/P/sub y//InP layers and LED structures were prepared for the wavelength 1220 nm by LP MOVPE. Very high phosphine/arsine ratio (>100) was necessary to achieve desirable quaternary composition at the growth temperature of 650/spl deg/C. Very good surface morphology with the height of the growth steps of one monolayer was measured by AFM on the lattice matched layers. Significant shift of the photoluminescence spectra from p-type layers, contrary to n-type or undoped layers, was measured at 5 K. The electroluminescent spectrum from a quaternary LED measured at 300 K with a maximum at 1224.6 nm is shown.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"482 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133271656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-16DOI: 10.1109/ASDAM.2002.1088515
M. Kadlecíková, J. Breza, M. Veselý, V. Luptáková, F. Balon, A. Vojacková, J. Král, J. Janı́k, A. Kromka
Diamond layers have been deposited by hot filament CVD on sapphire and glass substrates pre-treated by diamond grain seeding and by AC biasing. The quality of diamond layers has been evaluated by Raman spectroscopy. Diamond layers of different quality have been obtained as confirmed by detecting various Raman bands attributable to different forms of carbon.
{"title":"Stimulation of diamond growth on optically transparent non-conductive substrates","authors":"M. Kadlecíková, J. Breza, M. Veselý, V. Luptáková, F. Balon, A. Vojacková, J. Král, J. Janı́k, A. Kromka","doi":"10.1109/ASDAM.2002.1088515","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088515","url":null,"abstract":"Diamond layers have been deposited by hot filament CVD on sapphire and glass substrates pre-treated by diamond grain seeding and by AC biasing. The quality of diamond layers has been evaluated by Raman spectroscopy. Diamond layers of different quality have been obtained as confirmed by detecting various Raman bands attributable to different forms of carbon.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131662364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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