Micromachines最新文献

The Clausius-Mossotti (CM) factor underpins the theoretical description of dielectrophoresis (DEP) and is widely used in micro- and nano-scale systems for frequency-dependent particle and cell manipulation. It has further been proposed as an "electrophysiology Rosetta Stone" capable of linking DEP spectra to intrinsic cellular electrical properties. In this paper, the mathematical foundations and interpretive limits of this proposal are critically examined. By analyzing contrast factors derived from Laplace's equation across multiple physical domains, it is shown that the CM functional form is a universal consequence of geometry, material contrast, and boundary conditions in linear Laplacian fields, rather than a feature unique to biological systems. Key modelling assumptions relevant to DEP are reassessed. Deviations from spherical symmetry lead naturally to tensorial contrast factors through geometry-dependent depolarisation coefficients. Complex, frequency-dependent CM factors and associated relaxation times are shown to inevitably arise from the coexistence of dissipative and storage mechanisms under time-varying forcing, independent of particle composition. Membrane surface charge influences DEP response through modified interfacial boundary conditions and effective transport parameters, rather than by introducing an independent driving mechanism. These results indicate that DEP spectra primarily reflect boundary-controlled field-particle coupling. From an inverse-problem perspective, this places fundamental constraints on parameter identifiability in DEP-based characterization. The CM factor remains a powerful and general modelling tool for micromachines and microfluidic systems, but its interpretive scope must be understood within the limits imposed by Laplacian field theory.

A selective laser patterning technique applied inside photomasks as a practical method to mitigate critical-dimension non-uniformity caused by overexposure in large-area lithography systems with segmented illumination was investigated. The geometric characteristics of laser-induced voids were analyzed depending on various laser patterning conditions, and the resulting critical-dimension behavior was evaluated across regions with various transmittance levels, including sharply discontinuous transmittance boundaries. The results show that the void size and morphology can be tuned by adjusting the laser pulse energy, although excessive pulse energy leads to mask fracture, from which we derived appropriate processing windows. Furthermore, photomask transmittance was controllable over a wide range (20-92%) by varying laser parameters, void density, pattern arrangement, and the number of patterned layers. This enabled critical-dimension compensation with nanometer- to tens-of-nanometer-level precision. To examine critical-dimension behavior under abrupt transmittance transitions analogous to overexposure zones, 80% and 50% transmittance regions were placed adjacently. Despite the 30% transmittance difference, critical-dimension variation remained smooth, confirming that sharp transmittance changes do not induce abrupt critical-dimension shifts. Overall, our findings experimentally demonstrate that selective and direct laser patterning inside photomasks is a practical and effective critical-dimension compensation approach for large-area lithography employing segmented illumination systems.

High-performance low dropout regulator (LDO) chips are core components that provide clean power for high-precision sensors, radio frequency (RF) circuits, low noise amplifiers and other noise-sensitive circuits. In the reported literature, the designed LDO chip has advantages in certain parameters, but it cannot meet all the requirements of a high power supply rejection ratio (PSRR), low output noise and low standby current at the same time, which makes the high-end applications of LDOs greatly limited. In this paper, an LDO chip with high PSRR, low output noise and low standby current has been designed and fabricated. By increasing the loop gain, introducing an improved feedforward path, and adopting isolated power supply, the PSRR of the LDO at different frequency bands is greatly improved. By optimizing the design of the error amplifier (EA) and adding a low-pass filter to filter out the reference noise, the output voltage noise of the LDO is reduced. Within the depletion process and an optimized reference structure, the standby power consumption of the LDO is reduced without damaging the output voltage accuracy. The chip is taped out with SMIC's 0.18 μm/5 V/BCD process. The measured PSRR of the chip is as high as 95dB at a frequency of 1 kHz, and the high-frequency (1 MHz) PSRR is above 45 dB. The amplitude of integrated output noise is below 5.4 μVrms within the frequency range of 10 Hz to 100 KHz. When the load current is zero, the measured standby current is less than 400 nA. The test results indicate that the chip has excellent performance in terms of PSRR, output noise and standby power consumption.

This study introduces an air gap gate with AlN passivation to enhance the radio frequency (RF) performance of AlGaN/GaN high-electron-mobility transistors (HEMTs) while addressing thermal challenges. The air gap gate improves RF performance by reducing gate capacitance, resulting in a 23.9% increase in cutoff frequency (35.82 GHz) and enhancing saturation drain current and maximum transconductance by 3.7% and 10.27%, respectively, compared to a 0.15 μm planar gate baseline. However, reduced heat dissipation degrades thermal performance, as reflected in higher thermal resistance and temperature gradients. Incorporating high thermal conductivity AlN passivation mitigates these drawbacks, lowering operating temperatures and improving heat distribution, while maintaining a 17.5% cutoff frequency improvement over the baseline. These results demonstrate that the air gap gate with AlN passivation provides an effective strategy for achieving reliable, high-performance AlGaN/GaN HEMTs under high-frequency and high-power operations.

Precise morphology engineering is essential for enhancing the charge-storage capabilities of cobalt molybdate (CoMoO₄). In this study, cobalt molybdate (CoMoO₄, abbreviated as CoMo), cobalt molybdate-cetyltrimethylammonium bromide (CoMo-CTAB), and cobalt molybdate-cetyltrimethylammonium bromide/polyethylene glycol (CoMo-CTAB/PEG) electrodes were synthesized through a cationic-nonionic surfactant-assisted hydrothermal route. he introduction of CTAB promoted the formation of well-defined nanoflake structures, whereas the synergistic CTAB/PEG system produced a highly porous and interconnected nanosheet architecture, enabling enhanced electrolyte diffusion and redox accessibility. As a result, the CoMo-CTAB/PEG electrode delivered a high areal capacitance of 10.321 F cm^-2 at 10 mA cm^-2, markedly outperforming CoMo-CTAB and pristine CoMo electrodes. It also exhibited good rate capability, maintaining 63.64% of its capacitance at 50 mA cm^-2. Long-term cycling tests revealed excellent durability, with over 83% capacitance retention after 12,000 cycles and high coulombic efficiency, indicating highly reversible Faradaic behavior. Moreover, an asymmetric pouch-type supercapacitor device (APSD) assembled using the optimized electrode demonstrated robust cycling stability. These findings underscore surfactant-directed morphology modulation as an effective and scalable strategy for developing high-performance CoMoO₄-based supercapacitor electrodes.

This work examines resistance drift in FPGA I/O paths subjected to combined electrical and thermal stress, using a Xilinx Spartan-6 device as a representative platform. A multiplexed measurement approach was employed, in which multiple I/O pins were externally shorted and sequentially activated, enabling precise tracking of voltage, current, and effective series resistance over time, under controlled bias conditions. Two accelerated stress modes were investigated: high-temperature dwell in the range of 80-120 °C and thermal cycling between 80 and 140 °C. Both stress modes exhibited similar sub-linear (power-law) time dependence on resistance change, indicating cumulative degradation behavior. However, Arrhenius analysis revealed a strong contrast in effective activation energy: approximately 0.62 eV for high-temperature dwell and approximately 1.3 eV for thermal cycling. This divergence indicates that distinct physical mechanisms dominate under each stress regime. The lower activation energy is consistent with electrically and thermally driven on-die degradation within the FPGA I/O macro, including bias-related aging of output drivers and pad-level structures. In contrast, the higher activation energy observed under thermal cycling is characteristic of diffusion- and creep-dominated thermo-mechanical damage in package-level interconnects, such as solder joints. These findings demonstrate that resistance-based monitoring of FPGA I/O paths can discriminate between device-dominated and package-dominated aging mechanisms, providing a practical foundation for reliability assessment and self-monitoring methodologies in complex electronic systems.

Blink monitoring has demonstrated significant application value in fields such as safety assessments, medical monitoring, and intelligent technologies. Traditional eye monitoring methods are limited by restricted adaptability, insufficient comfort, or potential risks. MEMS-based ultrasonic technology, as a non-contact approach, has garnered attention due to its strong environmental adaptability, privacy, and security. However, existing designs require high-sensitivity processing circuits and are incompatible with standard fabrication processes. This work proposes a dual-electrode piezoelectric micro-mechanical ultrasonic transducer (PMUT) design based on aluminum nitride (AlN) piezoelectric thin films, integrated into a glasses device to enable real-time blink activity monitoring. The design successfully identifies blink states through time-of-flight (TOF) pulse-echo technology and dynamic unsupervised learning methods. Fabricated using cost-effective standard multi-user MEMS processes, this device offers distinct merits in terms of wearability comfort, information security, biosafety, and reliability.

Optical image stabilization (OIS) is crucial for improving airborne opto-electronic imaging performance under dynamic conditions. This study presents a two-dimensional piezoelectric-driven OIS platform capable of compensating linear image shift errors. A motion platform integrating a bridge amplification mechanism and right-angle guiding beams was developed, and its theoretical model was validated through finite element analysis (FEA). To enhance the platform's repeatability, the hysteresis of the piezoelectric actuator was described using the Bouc-Wen model, and was optimized using a Hybrid Genetic Algorithm and Particle Swarm Optimization (HGAPSO). Experimental results demonstrated that the platform achieves a workspace of 53.92 μm × 53.76 μm, a motion resolution of 30 nm, a maximum coupling error of 2.28%, and a first-order resonant frequency of 356.69 Hz. A composite controller incorporating HGAPSO attained submicron tracking accuracy, with errors of 0.43 μm and 0.47 μm along the X and Y axes, respectively. Strong agreement among theoretical analysis, FEA, and experimental results confirms the platform's precision and effectiveness meeting the requirements of the OIS. This work provides valuable guidance for the development of high-frequency OIS systems in highly dynamic operational environments.

The structural and electrochemical properties of gold nanoparticles biosynthesized from Rhus coriaria L. (Rc@AuNPs) were comprehensively investigated and characterized. R. coriaria (sumac) served as a natural gold reducing and capping agent due to its rich polyphenolic and phytochemical composition, enabling the sustainable, low-cost, and environmentally friendly synthesis of Rc@AuNPs. The electrochemical behavior of the hybrid material was evaluated using cyclic voltammetry (CV), galvanostatic charge-discharge (GCD), and electrochemical impedance spectroscopy (EIS). Rc@AuNPs exhibited specific capacitances of 129.48 F/g, 156.32 F/g, and 280.37 F/g in H₂SO₄, Na₂SO₄, and KOH electrolytes, respectively, indicating strong potential for supercapacitor and energy-storage applications. GCD analysis further showed C_sp values of 107.69 F/g (H₂SO₄), 133.23 F/g (Na₂SO₄), and 348.34 F/g (KOH), confirming the highest charge-storage performance in basic media. EIS measurements supported these results, yielding equivalent series resistance (ESR) values of 67.96 Ω in H₂SO₄, 64.42 Ω in Na₂SO₄, and a notably lower 24.43 Ω in KOH, consistent with its higher ionic conductivity and more efficient charge transfer. Overall, the superior C_sp and low ESR observed in KOH demonstrate the excellent capacitive behavior of Rc@AuNPs. These biosynthesized gold nanoparticles represent a promising and sustainable electrode material for high-performance energy-storage technologies.

This study presents a unified parametric optimization framework for the thermal design of microchannel spreaders used in high-power processor cooling. The fin geometry is expressed in a shape-agnostic parametric form defined by fin thickness, top and bottom gap widths, and channel height, without prescribing a fixed cross-section. This approach accommodates practical fin profiles ranging from rectangular to tapered and V-shaped, allowing continuous geometric optimization within manufacturability and hydraulic limits. A coupled analytical-numerical model integrates conduction through the spreader base, interfacial resistance across the thermal interface material (TIM), and convection within the coolant channels while enforcing a pressure-drop constraint. The optimization uses a deterministic continuation method with smooth sigmoid mappings and penalty functions to maintain constraint satisfaction and stable convergence across the design space. The total thermal resistance (Rtot) is minimized over spreader conductivities ks=400-2200 W m^-1 K^-1 (copper to CVD diamond), inlet fluid velocities Uin=0.5-5.5 m s^-1, maximum pressure drops of 10-50 kPa, and fluid pass counts Np∈{1,2,3}. The resulting maps of optimized fin dimensions as functions of ks provide continuous design charts that clarify how material conductivity, flow rate, and pass configuration collectively determine the geometry, minimizing total thermal resistance, thereby reducing chip temperature rise for a given heat load.