Microelectronic Engineering最新文献

The separation band of perception, storage, and computation modules in vision systems based on traditional von Neumann architectures leads to latency and power consumption problems in data transmission, which severely limits the computational power. In recent years, in-sensor computing has gained significance in enhancing the computational performance of machine vision systems. It integrates sensing, storage and computation and is an important way to break out of the Von Neumann architecture. This study introduces an optoelectronic memristor-based image recognition algorithm to improve recognition efficiency by performing image feature extraction in a hardware array. The experimental results show that the network achieves the best accuracy of 93.26% after 30 epochs, and the loss of accuracy after weight quantization is about 1%.

This investigation identifies the critical solder joint in a typical Insulated Gate Bipolar Transistor (IGBT) module and provided new knowledge on how operating thermal loads degrade IGBT-attach, Diode-attach, and Substrate solder joints in the device. SolidWorks software is used to create three realistic 3-D Finite Element (FE) models of the typical IGBT module used in this investigation. In-service operating power and IEC 60068–2-14 thermal cycles are implemented in ANSYS mechanical package to simulate the response of the three solder joints in the FE models to the load cycles. The solder in the joints is lead-free alloy of 96.5% tin, 3% silver, and 0.5% copper (SAC305) composition. The SAC305 material properties are modelled as time and temperature dependent with Anand's visco-plastic model employed as the constitutive model. Results show that the key degradation mechanism of solder joints in IGBT module are stress, plastic strain, and strain energy magnitudes. Accumulated plastic strain in the joints is found the predominant damage factor. Critical solder joint in the module depends on the load cycle the device experiences. IGBT-attach solder joint is critical in active power load cycle. Substrate solder joint degraded most in passive thermal cum combined passive thermal and active power load cycles.

In this paper, we introduce two innovative two-stage low noise amplifiers (LNAs), each with distinct noise-matching networks. The first LNA features a low pass filter (LPF) for noise-matching in both stages, while the second uses a high pass filter (HPF) in a similar capacity. Our research focuses on evaluating the performance differences that arise from using varied matching networks within specific frequency ranges. Highlighting the critical role of appropriate network selection for optimizing gain and noise performance, our approach includes the development of two Monolithic Microwave Integrated Circuits (MMICs) using cutting-edge 0.25$\mu$m Gallium Nitride (GaN) technology. The C-band LNA, targeting a frequency range of 4–6 GHz, achieves an impressive average noise fig. (NF) of 1.5 dB and a gain of 17 dB. For the X-band range of 8–10 GHz, the LNA records a commendable average NF of 1.7 dB and a gain of 16 dB, demonstrating the effectiveness of our novel design strategies.

The development of flexible electronics, better heat dissipation capabilities, increased LED light extraction efficiency, and the implementation of inverted barrier N-polar high electron mobility transistor (HEMT) for power electronics are all made possible by adopting laser lift-off (LLO), a technology that enables the movement of discrete III-N elements onto any substrates which are otherwise not attainable. In this paper, we focus on evaluating the LLO mechanism, its application for III-N epilayers and devices, and assessing their structural and electronic characteristics to give an overview of the advancement in LLO technology for III-N microelectronics.

Developing flexible, stretchable, and self-healing wearable electronic devices with skin-like capabilities is highly desirable for healthcare and human-machine interaction. Hydrogels as a promising sensing material with crosslinked polymer networks have received widespread attention for decades. However, sensors based on hydrogels suffer from low sensitivity and stability due to their poor electrical conductivity or the movement of nanofillers in hydrogel networks. Herein, a stable, sensitive, and self-healing strain sensor is fabricated by the Ti₃C₂T_x MXene nanosheets/polyvinyl alcohol (PVA) hydrogel (T-hydrogel). The introduction of MXene increases the number of H-bonds in the PVA hydrogel network and enhances the conductivity, resulting in high sensitivity, stability, and self-healing character. The self-healing T-hydrogel-based strain sensor has a performance close to that of the original sensor. In addition, the device is capable of detecting bodily motions, indicating the potential application in the field of human health monitoring and human-computer interaction.

Transparent conductive films (TCFs) that converge high transmittance and high conductive properties are essential for many optoelectronic devices, and efforts have been made to acquire films with high transmittance as well as low resistance of the thin layer by low-cost means. Here, we introduce a novel and simple strategy for the controlled in-situ templated synthesis of a transparent conductive metal mesh by utilizing the good reducibility to silver ions of the patterned tannic acid (TA)-based photoresists. To achieve this, mesh patterns with tunable line width were first printed using the TA-based negative photoresists by laser direct writing equipment. Within the patterned domains, the phenolic hydroxyl groups could interact with metal ions and act as reducing agents, thus accelerating the in-situ growth of silver nanoparticles to fabricate silver grids. By changing the line width of the designed patterns and the PH of the plating solution, the metal grids with a high transmission (T) of 91.5% and a thin-layer resistance (R_s) as low as 4.15 Ω sq.⁻¹ are ultimately achieved after annealing treatment. Our description demonstrates a simple and effective approach that is potentially scalable to other materials as well.

Current research focuses on developing inexpensive, adaptable, portable, wearable electronic devices. Organic transistor-based devices play a crucial contribution in these developments. These devices have a low-temperature fabrication process, making it possible to use an extensive range of flexible substrates like cloth, paper, foil, fiber, and plastic. The article discusses a variety of materials used for different layers of the Organic Thin Film Transistor (OTFT). Also highlighting the structural variation, with their performance metrics, which include current, threshold voltage ($V_T$), mobility ($\mu$), subthreshold slope (SS), and current ratio. Additionally, it presents an insight into the operating principle of OTFT to comprehend the conduction process better. A study is carried out for dielectric materials, including organic, inorganic, Self-assembled monolayer (SAM), hybrid, and nanocomposite, along with their benefits and drawbacks. The paper further discusses some crucial uses of organic transistors, such as low-cost Radio frequency identification tag (RFID), organic memory having the quality of three memory types, organic inverters, Deoxyribonucleic Acid (DNA) sensors, Active matrix displays, Gas sensors, Pressure sensors and Chemical sensors adopted two kinds of chemical detection methods from human body and environment. Finally, the article discusses the issues and future prospects of OTFT.

Memory resistor, or memristor, has been realized as a discrete electronic device and has a perspective application in the field of cryptography. The physical implementation of the memristor in chaotic circuits has been scarcely explored. In this paper, a memristor is fabricated by spin-coating a cobalt ferrite precursor on a processed silicon and is then electro-sputtered with silver to act as the anode with the base silicon as the cathode. This fabrication process has a scalability potential in conjunction with integrated circuit fabrication techniques and complementary metal oxide semiconductor (CMOS) technologies. The fabricated cobalt ferrite memristor has shown a ratio between the on and off resistance of >1000 and has been implemented in a chaotic Chua's circuit, making it one of few physical implementations of a physical memristor in a physical circuit. The analysis and characterization of this circuit using bifurcation diagrams and Lyapunov exponent prove the chaotic behavior of a real Chua's circuit. This chaotic behavior can be useful in chaotic cryptography as nonperiodic oscillations can be leveraged to make sensitive information more difficult to interpret by bad actors.

Through‑silicon via (TSV) is one of the most important features in 3D integrated circuit (IC) and 2.5D packaging. Both are within the advanced packaging topic for the digital and analog ICs aligned with More than Moore's paradigm. This article revisits the proposal and progress of carbon nanotubes (CNTs) TSV technology that potentially offers an improvement over the conventional Cu TSV. Today, CNTs TSV has never materialized in commercial products of 3D IC and 2.5D packaging. Compilation on notable numerical modeling works and matching them with related issues in fabrication suggest CNTs TSV technology is still in its infant stage. Although the simulation occasionally shows the advantages of CNTs TSV over Cu TSV in both digital and analog circuits, these results are prone to overestimation. One of the culprits is the number of CNT strands in the bundle which at best can be grown in the fab only $\sim 1\%$ of the theoretically compact bundle used in the RLC and RLGC models. The direction where CNTs TSV is targeting in 3D IC and 2.5D packaging is not clear by several researchers. As the requirements for high-speed digital and high-frequency analog are different, they are important to be sorted out as an essence of this review to project the path of this CNTs TSV technology.

A micromachined Joule-Thomson cryocooler has been designed as a cryostage for ice lithography, which allows high-pressure nitrogen throttling to liquefy and fast cool samples with low vibration. The sample can be cooled down to 99.5 K in 30 min and then heated up to room temperature in 10 min. Compared with previous cooling systems based on liquid nitrogen, the Joule-Thomson cryostage has resulted in a significant 90% reduction in cooling time and a decrease in operating temperature by 30 K. Besides, the nitrogen mass-flow rate beneath the sample remains <20 mg/s to minimize vibration. The measured peak-to-peak amplitude at the minimum temperature is about 5.6 nm. As the first cooler integration within an ice lithography system, this Joule-Thomson cryostage not only enables the exploration of a wider range of ice resists, but also can be applied in kinds of microscopes for helping characterize materials at cryogenic temperatures.