Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558870
Tai-hua Chen, Lawrence T. Clark, K. Holbert
This paper presents bulk CMOS memory circuits capable of both ultra-low voltage (subthreshold, i.e., VDD less than the transistor threshold voltage Vth) low power operation and high temperature operation at nominal VDD. One of the memory designs is radiation hardened by design (RHBD) using interleaved DICE storage cells, enclosed transistor geometries, and P-type guard rings. The other is not hardened against radiation. Experimental results are presented showing that the room temperature minimum VDD of the hardened device remains essentially unchanged from the pre-irradiation VDDMIN = 210 mV value after Co-60 irradiation to 4 Mrad(Si). The standby power supply current ISB of the device increases less than 2x from this level of irradiation. The RHBD memory design has been tested to be operational at temperatures of 225degC. The combined effects of high temperature and irradiation are also investigated for both designs.
{"title":"Memory design for high temperature radiation environments","authors":"Tai-hua Chen, Lawrence T. Clark, K. Holbert","doi":"10.1109/RELPHY.2008.4558870","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558870","url":null,"abstract":"This paper presents bulk CMOS memory circuits capable of both ultra-low voltage (subthreshold, i.e., VDD less than the transistor threshold voltage Vth) low power operation and high temperature operation at nominal VDD. One of the memory designs is radiation hardened by design (RHBD) using interleaved DICE storage cells, enclosed transistor geometries, and P-type guard rings. The other is not hardened against radiation. Experimental results are presented showing that the room temperature minimum VDD of the hardened device remains essentially unchanged from the pre-irradiation VDDMIN = 210 mV value after Co-60 irradiation to 4 Mrad(Si). The standby power supply current ISB of the device increases less than 2x from this level of irradiation. The RHBD memory design has been tested to be operational at temperatures of 225degC. The combined effects of high temperature and irradiation are also investigated for both designs.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129423411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558988
Yi-Lung Cheng, S.Y. Lee, C. Chiu, K. Wu
The short length on the electromigration lifetime is a useful effect to increase current limits in advanced circuits. A way to increase current limit is to consider the Blech effect. The electromigration threshold due to Blech effect in copper interconnect for 65 nm and 45 nm technology is reported in this study. The critical product (jL)c was determined by varying the metal length and stress current density. The higher (jL)c value is obtained for lower stress current, shorter metal lead and 65 nm technology with higher hardness ILD. Finally, this critical product (jL)c as the accelerated EM length factor was used to predict the lifetime. It is shown that the lifetimes of short leads with less than 5 mum have at least 9.52 and 1.45 times higher than that of 250 mum metal lead for 65 nm and 45 nm technology, respectively.
{"title":"Back stress model on electromigration lifetime prediction in short length copper interconnects","authors":"Yi-Lung Cheng, S.Y. Lee, C. Chiu, K. Wu","doi":"10.1109/RELPHY.2008.4558988","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558988","url":null,"abstract":"The short length on the electromigration lifetime is a useful effect to increase current limits in advanced circuits. A way to increase current limit is to consider the Blech effect. The electromigration threshold due to Blech effect in copper interconnect for 65 nm and 45 nm technology is reported in this study. The critical product (jL)c was determined by varying the metal length and stress current density. The higher (jL)c value is obtained for lower stress current, shorter metal lead and 65 nm technology with higher hardness ILD. Finally, this critical product (jL)c as the accelerated EM length factor was used to predict the lifetime. It is shown that the lifetimes of short leads with less than 5 mum have at least 9.52 and 1.45 times higher than that of 250 mum metal lead for 65 nm and 45 nm technology, respectively.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124883355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558888
P. Liao, C. Chen, J. Young, Y. Tsai, C.J. Wang, K. Wu
For the first time, a new drain-bias TBD lifetime model is proposed to precisely predict at various Vd, Vg and channel length for ultra thin oxide. The TBD lifetime with drain-bias can be decoupled to small voltage drop at drain-side increased TBD lifetime and hot carrier effect (HCI) degraded the TBD lifetime. The mechanism of oxide breakdown with drain-bias is also well understood as oxide traps distributed from the source side to the center of channel induce the oxide breakdown.
{"title":"A new on-state drain-bias TDDB lifetime model and HCI effect on drain-bias TDDB of ultra thin oxide","authors":"P. Liao, C. Chen, J. Young, Y. Tsai, C.J. Wang, K. Wu","doi":"10.1109/RELPHY.2008.4558888","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558888","url":null,"abstract":"For the first time, a new drain-bias TBD lifetime model is proposed to precisely predict at various Vd, Vg and channel length for ultra thin oxide. The TBD lifetime with drain-bias can be decoupled to small voltage drop at drain-side increased TBD lifetime and hot carrier effect (HCI) degraded the TBD lifetime. The mechanism of oxide breakdown with drain-bias is also well understood as oxide traps distributed from the source side to the center of channel induce the oxide breakdown.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122421037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558938
A. Tazzoli, V. Peretti, E. Autizi, G. Meneghesso
The influence of the suspension shape on the electrical parameters and on the reliability of micro-machined ohmic series and shunt RF switches has been studied in this work. We have investigated how different spring constants influence the electrical parameters of RF-MEMS switches, in terms of the pull-in voltage, the pull-out voltage, and the evolution of scattering parameters during the DC sweep. The robustness to cycling stress has also been studied, considering different movable structures and bias voltages. We have also analyzed the behavior of RF-MEMS switches submitted to long continuous actuation, finding that meander based devices could suffer from extremely long release times, after an actuation period of some hours. However, straight beam based switches have not exhibited this problem. This unwanted behavior has been analyzed in terms of actuation time and RF-power level. The presence of bounces in the release phase has also been investigated on various types of switches with different topologies and suspended membrane thickness.
{"title":"Suspensions shape impact on the reliability of ohmic RF-MEMS redundancy switches","authors":"A. Tazzoli, V. Peretti, E. Autizi, G. Meneghesso","doi":"10.1109/RELPHY.2008.4558938","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558938","url":null,"abstract":"The influence of the suspension shape on the electrical parameters and on the reliability of micro-machined ohmic series and shunt RF switches has been studied in this work. We have investigated how different spring constants influence the electrical parameters of RF-MEMS switches, in terms of the pull-in voltage, the pull-out voltage, and the evolution of scattering parameters during the DC sweep. The robustness to cycling stress has also been studied, considering different movable structures and bias voltages. We have also analyzed the behavior of RF-MEMS switches submitted to long continuous actuation, finding that meander based devices could suffer from extremely long release times, after an actuation period of some hours. However, straight beam based switches have not exhibited this problem. This unwanted behavior has been analyzed in terms of actuation time and RF-power level. The presence of bounces in the release phase has also been investigated on various types of switches with different topologies and suspended membrane thickness.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116547697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558999
N. Banno, T. Sakamoto, S. Fujieda, M. Aono
We examined the ON-state reliability of a solid electrolyte resistive switch,named ldquoNanoBridgerdquo, for programmable logic application. We found a trade-off between turn-off current and ON-state reliability and optimized the ON conductance. Through this optimization, we obtained high durability against DC current of ~0.2 mA at 105degC for 10 years and low turn-off current less than 5 mA. NanoBridge can thus meet the requirements for programmable logic applications.
{"title":"On-state reliability of solid-electrolyte switch","authors":"N. Banno, T. Sakamoto, S. Fujieda, M. Aono","doi":"10.1109/RELPHY.2008.4558999","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558999","url":null,"abstract":"We examined the ON-state reliability of a solid electrolyte resistive switch,named ldquoNanoBridgerdquo, for programmable logic application. We found a trade-off between turn-off current and ON-state reliability and optimized the ON conductance. Through this optimization, we obtained high durability against DC current of ~0.2 mA at 105degC for 10 years and low turn-off current less than 5 mA. NanoBridge can thus meet the requirements for programmable logic applications.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125880533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558893
D. Johnsson, W. Mamanee, S. Bychikhin, D. Pogany, E. Gornik, M. Stecher
Bipolar ESD protection devices subjected to low current long pulse stress can sustain a relatively long time during thermal second breakdown without any damage. The effect is related to a particular current filamentary behavior, which is observed optically by TIM and explained by device simulation. It is also shown that the second breakdown is initiated at the edges of the device when a moving current-tube arrives at the device edge. Thus circular devices, having no edges, exhibit lower risk of second breakdown.
{"title":"Second breakdown behavior in bipolar ESD protection devices during low current long duration stress and its relation to moving current-tubes","authors":"D. Johnsson, W. Mamanee, S. Bychikhin, D. Pogany, E. Gornik, M. Stecher","doi":"10.1109/RELPHY.2008.4558893","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558893","url":null,"abstract":"Bipolar ESD protection devices subjected to low current long pulse stress can sustain a relatively long time during thermal second breakdown without any damage. The effect is related to a particular current filamentary behavior, which is observed optically by TIM and explained by device simulation. It is also shown that the second breakdown is initiated at the edges of the device when a moving current-tube arrives at the device edge. Thus circular devices, having no edges, exhibit lower risk of second breakdown.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127073527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558898
Sheng-Huei Dai, C. Lin, Y. King
Transient voltage suppressor (TVS) with v-groove structure is an off-chip device designed for protecting integrated circuits against electrostatic discharge (ESD) and electrical overstress (EOS). Compared with planar diodes, v-groove diodes provide much lower breakdown voltage under the same doping conditions. By selective etching using TMAH, the new TVS can be realized with well controlled v-groove tip angle and simple fabrication process. This new structure can be a low-cost, low breakdown voltage, and low capacitance solution for next generation TVS devices.
{"title":"Low voltage Transient Voltage Suppressor with v-groove structure","authors":"Sheng-Huei Dai, C. Lin, Y. King","doi":"10.1109/RELPHY.2008.4558898","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558898","url":null,"abstract":"Transient voltage suppressor (TVS) with v-groove structure is an off-chip device designed for protecting integrated circuits against electrostatic discharge (ESD) and electrical overstress (EOS). Compared with planar diodes, v-groove diodes provide much lower breakdown voltage under the same doping conditions. By selective etching using TMAH, the new TVS can be realized with well controlled v-groove tip angle and simple fabrication process. This new structure can be a low-cost, low breakdown voltage, and low capacitance solution for next generation TVS devices.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"115 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133768968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558887
G. Ribes, D. Roy, M. Rafik, J. Roux, C. Parthasarathy
Most of the oxide breakdown studies are based on the results of measurements in which the oxide is uniformly stressed thus avoiding the HCI (hot carrier injection) regime. As devices typically undergo hot carrier degradation during their operation, ignoring HCI degradation may result in overestimation of the oxide lifetime. In this paper, a deeper understanding of the relation between HCI and oxide breakdown is obtained based on MVHR (multivibrational hydrogen rRelease) mechanism. Subsequently we model the time to breakdown at different Vg, Vd conditions enabling oxide lifetime assessment in such stress conditions.
{"title":"New insight into the relation between Hot Carrier degradation and oxide breakdown through MVHR","authors":"G. Ribes, D. Roy, M. Rafik, J. Roux, C. Parthasarathy","doi":"10.1109/RELPHY.2008.4558887","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558887","url":null,"abstract":"Most of the oxide breakdown studies are based on the results of measurements in which the oxide is uniformly stressed thus avoiding the HCI (hot carrier injection) regime. As devices typically undergo hot carrier degradation during their operation, ignoring HCI degradation may result in overestimation of the oxide lifetime. In this paper, a deeper understanding of the relation between HCI and oxide breakdown is obtained based on MVHR (multivibrational hydrogen rRelease) mechanism. Subsequently we model the time to breakdown at different Vg, Vd conditions enabling oxide lifetime assessment in such stress conditions.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134300826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558948
S. Kudo, Y. Hirose, N. Hashikawa, T. Yamaguchi, K. Kashihara, K. Maekawa, K. Asai, N. Murata, K. Asayama, E. Murakami
We performed detailed analysis of the abnormal growth of Ni silicide that causes leakage-current failure in CMOS devices. We investigated the three-dimensional shape and the crystal microstructure of the abnormal growth by using advanced transmission electron microscope (TEM) techniques: electron tomography and spatially-resolved electron energy-loss spectroscopy (EELS). Furthermore, we revealed that the abnormal growth is related to crystal microstructure and crystal defects. This detailed information is important in the mechanism elucidation of abnormal growth of Ni silicide. To develop a highly reliable Ni salicide process, it is essential to understand the failure mechanism of abnormal growths of Ni silicide, especially for 45 nm node devices and beyond. To conclude, we discuss the solutions for the development of a successful Ni salicide process.
{"title":"Analysis of Ni silicide abnormal growth mechanism using advanced TEM techniques","authors":"S. Kudo, Y. Hirose, N. Hashikawa, T. Yamaguchi, K. Kashihara, K. Maekawa, K. Asai, N. Murata, K. Asayama, E. Murakami","doi":"10.1109/RELPHY.2008.4558948","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558948","url":null,"abstract":"We performed detailed analysis of the abnormal growth of Ni silicide that causes leakage-current failure in CMOS devices. We investigated the three-dimensional shape and the crystal microstructure of the abnormal growth by using advanced transmission electron microscope (TEM) techniques: electron tomography and spatially-resolved electron energy-loss spectroscopy (EELS). Furthermore, we revealed that the abnormal growth is related to crystal microstructure and crystal defects. This detailed information is important in the mechanism elucidation of abnormal growth of Ni silicide. To develop a highly reliable Ni salicide process, it is essential to understand the failure mechanism of abnormal growths of Ni silicide, especially for 45 nm node devices and beyond. To conclude, we discuss the solutions for the development of a successful Ni salicide process.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132742293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-07-09DOI: 10.1109/RELPHY.2008.4558933
Ludger Borucki, G. Schindlbeck
Single event upsets from terrestrial cosmic rays (i.e. high-energy neutrons) are more important than alpha particle induced soft errors in modern DRAM devices. A high intensity broad spectrum neutron source from the Los Alamos Neutron Science Center (LANSCE) was used to characterize the nature of these upsets in DRAM technologies ranging from 180 nm down to 70 nm from several vendors at the DIMM component level using a portable memory tester. Another set of accelerated neutron beam tests were made with DRAM DIMMs mounted on motherboards. Soft errors were characterized using these two methods to determine the influence of neutron angle, frequency, data patterns and process technology. The purpose of this study is to analyze the effects of these differences on DRAM soft errors.
{"title":"Comparison of accelerated DRAM soft error rates measured at component and system level","authors":"Ludger Borucki, G. Schindlbeck","doi":"10.1109/RELPHY.2008.4558933","DOIUrl":"https://doi.org/10.1109/RELPHY.2008.4558933","url":null,"abstract":"Single event upsets from terrestrial cosmic rays (i.e. high-energy neutrons) are more important than alpha particle induced soft errors in modern DRAM devices. A high intensity broad spectrum neutron source from the Los Alamos Neutron Science Center (LANSCE) was used to characterize the nature of these upsets in DRAM technologies ranging from 180 nm down to 70 nm from several vendors at the DIMM component level using a portable memory tester. Another set of accelerated neutron beam tests were made with DRAM DIMMs mounted on motherboards. Soft errors were characterized using these two methods to determine the influence of neutron angle, frequency, data patterns and process technology. The purpose of this study is to analyze the effects of these differences on DRAM soft errors.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133279586","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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