Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460320
I. Honma
A design of novel nanoelectrode materials based on nanoparticles, nanocarbons, graphenes, ionic liquids, nanosheets have been investigated for the high power & high energy density lithium ion batteries. The high performance batteries can be applied to electric vehicles, solar cell back-ups as well as renewable electrical grid systems.
{"title":"Applications of nanoelectrodes for high power and high energy density lithium ion batteries","authors":"I. Honma","doi":"10.1109/INEC.2014.7460320","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460320","url":null,"abstract":"A design of novel nanoelectrode materials based on nanoparticles, nanocarbons, graphenes, ionic liquids, nanosheets have been investigated for the high power & high energy density lithium ion batteries. The high performance batteries can be applied to electric vehicles, solar cell back-ups as well as renewable electrical grid systems.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"72 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126613066","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460446
Masaki Sato, Xiang Yin, S. Kasai
Surface dependence of the nonlinear voltage transfer characteristic in the GaAs-based three-branch nanowire junction (TBJ) is investigated both theoretically and experimentally. A simple model considering the surface-potential-dependent carrier density in the channel reveals a clear relationship between the surface potential and the curvature of the bell-shaped transfer curve. Based on this model, we analyze the behavior of the TBJ with a local conductance modulation by focused light irradiation.
{"title":"Surface dependence of nonlinear characteristic in GaAs-based three-branch nanowire junctions","authors":"Masaki Sato, Xiang Yin, S. Kasai","doi":"10.1109/INEC.2014.7460446","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460446","url":null,"abstract":"Surface dependence of the nonlinear voltage transfer characteristic in the GaAs-based three-branch nanowire junction (TBJ) is investigated both theoretically and experimentally. A simple model considering the surface-potential-dependent carrier density in the channel reveals a clear relationship between the surface potential and the curvature of the bell-shaped transfer curve. Based on this model, we analyze the behavior of the TBJ with a local conductance modulation by focused light irradiation.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126034809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460424
S. Hashimoto, Hiroki Kosugiyama, K. Takei, Jing Sun, Yuji Kawamura, Yasuhiro Shikahama, K. Ohmori, Takanobu Watanabe
We demonstrate that the image force effects in low-dimensional Si are highly controllable to achieve the best possible performance of the gate-all-around (GAA) Schottky barrier tunneling FET (SB-TFET). Our finite element electrostatic calculation shows that the image potential lowers near the metal source/drain, whereas it rises in the proximity of the gate insulator. Moreover, the drain induced barrier lowering (DIBL) of GAA-SB-TFET is suppressed by the image forces in a thin Si nanowire of about 4.0nm diameter.
{"title":"Impact of image force effect on gate-all-around Schottky barrier tunnel FET","authors":"S. Hashimoto, Hiroki Kosugiyama, K. Takei, Jing Sun, Yuji Kawamura, Yasuhiro Shikahama, K. Ohmori, Takanobu Watanabe","doi":"10.1109/INEC.2014.7460424","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460424","url":null,"abstract":"We demonstrate that the image force effects in low-dimensional Si are highly controllable to achieve the best possible performance of the gate-all-around (GAA) Schottky barrier tunneling FET (SB-TFET). Our finite element electrostatic calculation shows that the image potential lowers near the metal source/drain, whereas it rises in the proximity of the gate insulator. Moreover, the drain induced barrier lowering (DIBL) of GAA-SB-TFET is suppressed by the image forces in a thin Si nanowire of about 4.0nm diameter.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129733355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460435
O. Voskoboynikov
A general theoretical description of the physical response of dispersive ensembles of semiconductor nano-sized objects of complex geometries, material compositions, and spatial distributions has been developed recently. We present a brief review on some recent results of our simulation of the absorption cross section of dispersive ensembles of ZnTe/CdSe core/shell quantum dots, optical characteristics of ensembles of triple concentric GaAs/AlGaAs nano-rings, and diamagnetic response of ensembles of wobbled InAs/GaAs quantum rings. Simulated by us the actual responses are in a good agreement with experimental data.
{"title":"Recent development in simulation and multivariate statistical analysis of physical characteristics of dispersive ensembles of semiconductor nano-sized objects: A brief review","authors":"O. Voskoboynikov","doi":"10.1109/INEC.2014.7460435","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460435","url":null,"abstract":"A general theoretical description of the physical response of dispersive ensembles of semiconductor nano-sized objects of complex geometries, material compositions, and spatial distributions has been developed recently. We present a brief review on some recent results of our simulation of the absorption cross section of dispersive ensembles of ZnTe/CdSe core/shell quantum dots, optical characteristics of ensembles of triple concentric GaAs/AlGaAs nano-rings, and diamagnetic response of ensembles of wobbled InAs/GaAs quantum rings. Simulated by us the actual responses are in a good agreement with experimental data.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124427341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460444
Md Nur Kutubul Alam, M. Islam, Md Raifqul Islam
In this study the ballistic performance of III-V on insulator (XOI) and “junction less XOI” (JLXOI) nFET are investigated and compared by NEGF formalism, taking In0.3Ga0.7Sb as channel material. At 15nm gate length and 0.5nm EOT of gate dielectric the JLXOI shows significant improvement in threshold voltage (Vt) and ION with a fine tuned IOFF. Also the subthreshold slope (SS) reduced from 82.35mV/dec to 68.088mV/dec along with imporoved DIBL performance and simplified fabrication process.
{"title":"Short channel InGaSb-on-insulator FET: With and without junctions","authors":"Md Nur Kutubul Alam, M. Islam, Md Raifqul Islam","doi":"10.1109/INEC.2014.7460444","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460444","url":null,"abstract":"In this study the ballistic performance of III-V on insulator (XOI) and “junction less XOI” (JLXOI) nFET are investigated and compared by NEGF formalism, taking In0.3Ga0.7Sb as channel material. At 15nm gate length and 0.5nm EOT of gate dielectric the JLXOI shows significant improvement in threshold voltage (Vt) and ION with a fine tuned IOFF. Also the subthreshold slope (SS) reduced from 82.35mV/dec to 68.088mV/dec along with imporoved DIBL performance and simplified fabrication process.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123579471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460421
S. Lam, M. Chan
Copper metal gate has been introduced in logic CMOS processes starting from the 45-nm technology node. With the skin depth of about 270 nm at 60 GHz for copper, the DC end-to-end resistance of the copper gate electrode is found to be Rdc ≈ 9 Ω for a 45-nm MOSFET with W/L = 30 and it is a good estimation of the actual effective resistance Rac with less than 1% error. Rac of copper-gate electrode with rectangular cross-sectional designs is investigated with skin effect consideration. Design guidelines are suggested for device optimization of nanoscale metal-gate MOSFETs for millimeter-wave integrated circuits.
{"title":"Metal-gate resistance with skin effect consideration in nanoscale MOSFETs for millimeter-wave ICs","authors":"S. Lam, M. Chan","doi":"10.1109/INEC.2014.7460421","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460421","url":null,"abstract":"Copper metal gate has been introduced in logic CMOS processes starting from the 45-nm technology node. With the skin depth of about 270 nm at 60 GHz for copper, the DC end-to-end resistance of the copper gate electrode is found to be Rdc ≈ 9 Ω for a 45-nm MOSFET with W/L = 30 and it is a good estimation of the actual effective resistance Rac with less than 1% error. Rac of copper-gate electrode with rectangular cross-sectional designs is investigated with skin effect consideration. Design guidelines are suggested for device optimization of nanoscale metal-gate MOSFETs for millimeter-wave integrated circuits.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114845556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460447
Anand Kumar, M. Parihar, A. Kranti
In this work, we investigate the behavior of an Ultra Low Power (ULP) composite transistor in conventional inversion mode (INV) and junctionless (JL) topologies. JL ULP transistor shows enhanced on-to-off current ratio and lower leakage current at elevated temperatures. JL ULP inverter designed with composite transistor shows enhanced noise margin. The work demonstrates new opportunities for realizing future ULP circuits with junctionless transistor.
{"title":"Junctionless composite transistor for Ultra Low Power applications","authors":"Anand Kumar, M. Parihar, A. Kranti","doi":"10.1109/INEC.2014.7460447","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460447","url":null,"abstract":"In this work, we investigate the behavior of an Ultra Low Power (ULP) composite transistor in conventional inversion mode (INV) and junctionless (JL) topologies. JL ULP transistor shows enhanced on-to-off current ratio and lower leakage current at elevated temperatures. JL ULP inverter designed with composite transistor shows enhanced noise margin. The work demonstrates new opportunities for realizing future ULP circuits with junctionless transistor.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116654332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460450
O. Mirmotahari, Y. Berg
The Ultra Low-Voltage (ULV) NAND and NOR gates are presented in this paper. These gates are based on the ULV precharge inverter presented in [11]. We intend to verify the gates' logical expression of NAND and NOR. The inbound precharge logical behaviours of the gate have been previously discussed, and therefore we aim to compare these new NAND and NOR designs to traditional Domino and CMOS logic styles. This paper focuses on the aspect of delay. All results are obtained by simulation in Cadence for a 90 nm TSMC fabrication process.
{"title":"Ultra Low-Voltage static precharge NAND/NOR gates","authors":"O. Mirmotahari, Y. Berg","doi":"10.1109/INEC.2014.7460450","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460450","url":null,"abstract":"The Ultra Low-Voltage (ULV) NAND and NOR gates are presented in this paper. These gates are based on the ULV precharge inverter presented in [11]. We intend to verify the gates' logical expression of NAND and NOR. The inbound precharge logical behaviours of the gate have been previously discussed, and therefore we aim to compare these new NAND and NOR designs to traditional Domino and CMOS logic styles. This paper focuses on the aspect of delay. All results are obtained by simulation in Cadence for a 90 nm TSMC fabrication process.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130672091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460425
S. Aspera, H. Kasai, Y. Tamai, N. Awaya
Computational materials design® (CMD®) has been proven to be a very powerful tool for developing novel materials through obtaining relevant understanding of the basic principles underlying a system. Among others, realization of the switching mechanism in resistance random access memory (RRAM) devices has been an interesting field. Here, we propose a mechanism of resistive switching in RRAM based on the change in the electronic properties of the transition metal oxide (TMO) layer through the occurrence of rowed oxygen vacancies.
{"title":"Computational materials design®: Realization of the switching mechanism in RRAM","authors":"S. Aspera, H. Kasai, Y. Tamai, N. Awaya","doi":"10.1109/INEC.2014.7460425","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460425","url":null,"abstract":"Computational materials design® (CMD®) has been proven to be a very powerful tool for developing novel materials through obtaining relevant understanding of the basic principles underlying a system. Among others, realization of the switching mechanism in resistance random access memory (RRAM) devices has been an interesting field. Here, we propose a mechanism of resistive switching in RRAM based on the change in the electronic properties of the transition metal oxide (TMO) layer through the occurrence of rowed oxygen vacancies.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115230432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-07-28DOI: 10.1109/INEC.2014.7460434
B. Magyari-Kope, Liang Zhao, K. Kamiya, M. Yang, K. Shiraishi, Y. Nishi
To explain the observed device characteristics of binary metal oxide based resistive random access memory (RRAM) modules, filamentary models have been proposed. Ab initio methods were applied to study conductive filamentary structures characteristic to the “ON” state and the atomistic description of the rupturing/dissolution process into the “OFF” state. We review the implications on the electronic structure and energetics of conductive filament channels formation and discuss the interplay between the ionic and electronic transport mechanisms.
{"title":"Review on simulation of filamentary switching in binary metal oxide based RRAM devices","authors":"B. Magyari-Kope, Liang Zhao, K. Kamiya, M. Yang, K. Shiraishi, Y. Nishi","doi":"10.1109/INEC.2014.7460434","DOIUrl":"https://doi.org/10.1109/INEC.2014.7460434","url":null,"abstract":"To explain the observed device characteristics of binary metal oxide based resistive random access memory (RRAM) modules, filamentary models have been proposed. Ab initio methods were applied to study conductive filamentary structures characteristic to the “ON” state and the atomistic description of the rupturing/dissolution process into the “OFF” state. We review the implications on the electronic structure and energetics of conductive filament channels formation and discuss the interplay between the ionic and electronic transport mechanisms.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"306S 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128220626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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