Pub Date : 2026-01-07DOI: 10.1038/s41928-025-01504-0
Mohammad Samizadeh Nikoo, Mohamed Eleraky, Basem Abdelaziz Abdelmagid, Dongwoon Lee, Farzan Jazaeri, Adam Wang, Boce Lin, Hua Wang
Modern communication and sensing technologies rely on complementary metal–oxide–semiconductor devices based on silicon. However, continuing to improve the capabilities of such systems through the miniaturization of transistors is increasingly challenging due to short channel effects and contact resistances. Here we report switches that are based on a zero-change silicon-on-insulator process and operate through the electrical control of displacement fields and tunnelling currents in the interface between polycrystalline and bulk silicon. The switches offer a cut-off frequency of 0.75 THz and a power handling that is ten times higher than conventional transistor-based switches that use the same silicon-on-insulator process. The technology achieves sub-30-ps hysteresis-free switching, and we illustrate its capabilities in millimetre-wave transmitters with data rates exceeding 10 Gbps. Terahertz switches that are based on a zero-change silicon-on-insulator process—and operate through the electrical control of displacement fields and tunnelling currents in the interface between polycrystalline and bulk silicon—can achieve sub-30-ps switching.
{"title":"High-power millimetre-wave switches on silicon using displacement fields and tunnelling currents","authors":"Mohammad Samizadeh Nikoo, Mohamed Eleraky, Basem Abdelaziz Abdelmagid, Dongwoon Lee, Farzan Jazaeri, Adam Wang, Boce Lin, Hua Wang","doi":"10.1038/s41928-025-01504-0","DOIUrl":"10.1038/s41928-025-01504-0","url":null,"abstract":"Modern communication and sensing technologies rely on complementary metal–oxide–semiconductor devices based on silicon. However, continuing to improve the capabilities of such systems through the miniaturization of transistors is increasingly challenging due to short channel effects and contact resistances. Here we report switches that are based on a zero-change silicon-on-insulator process and operate through the electrical control of displacement fields and tunnelling currents in the interface between polycrystalline and bulk silicon. The switches offer a cut-off frequency of 0.75 THz and a power handling that is ten times higher than conventional transistor-based switches that use the same silicon-on-insulator process. The technology achieves sub-30-ps hysteresis-free switching, and we illustrate its capabilities in millimetre-wave transmitters with data rates exceeding 10 Gbps. Terahertz switches that are based on a zero-change silicon-on-insulator process—and operate through the electrical control of displacement fields and tunnelling currents in the interface between polycrystalline and bulk silicon—can achieve sub-30-ps switching.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 1","pages":"84-92"},"PeriodicalIF":40.9,"publicationDate":"2026-01-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145908043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-06DOI: 10.1038/s41928-025-01512-0
Owen Medeiros, Matteo Castellani, Valentin Karam, Reed Foster, Alejandro Simon, Francesca Incalza, Brenden Butters, Marco Colangelo, Karl K. Berggren
Scalable superconducting memory is required for the development of low-energy superconducting computers and fault-tolerant quantum computers. Conventional superconducting logic-based memory cells possess a large footprint that limits scaling; nanowire-based superconducting memory cells, although more compact, have high error rates, which hinders integration into large arrays. Here we report a 4 × 4 superconducting nanowire memory array that is designed for scalable row–column operations and has a functional density of 2.6 Mbit cm−2. Each memory cell is based on a nanowire loop consisting of two temperature-dependent superconducting switches and a variable kinetic inductor. The arrays operate at 1.3 K, where we implement and characterize multiflux quanta state storage and destructive read-out. By optimizing the write- and read-pulse sequences, we minimize bit errors and maximize operating margins. We achieve a minimum bit error rate of 10−5. We also use circuit-level simulations to understand the memory cell’s dynamics, performance limits and stability under varying pulse amplitudes. Arrays of nanowire loops consisting of two temperature-dependent superconducting switches and a variable kinetic inductor can be used to create a robust and scalable superconducting memory.
低能超导计算机和容错量子计算机的发展需要可扩展超导存储器。传统的超导逻辑存储单元占地面积大，限制了扩展；基于纳米线的超导存储单元虽然更紧凑，但错误率高，这阻碍了集成到大型阵列中。在这里，我们报告了一个4 × 4超导纳米线存储器阵列，设计用于可扩展的行列操作，其功能密度为2.6 Mbit cm - 2。每个存储单元都是基于由两个温度相关的超导开关和一个可变动力学电感组成的纳米线环路。阵列工作在1.3 K，在那里我们实现和表征多通量量子态存储和破坏性读出。通过优化写和读脉冲序列，我们最大限度地减少了比特错误和最大限度地提高了操作边际。我们实现了最小误码率为10−5。我们还使用电路级模拟来了解存储单元在不同脉冲幅度下的动态，性能限制和稳定性。由两个温度相关的超导开关和一个可变动力学电感组成的纳米线环阵列可用于创建鲁棒和可扩展的超导存储器。
{"title":"A scalable superconducting nanowire memory array with row–column addressing","authors":"Owen Medeiros, Matteo Castellani, Valentin Karam, Reed Foster, Alejandro Simon, Francesca Incalza, Brenden Butters, Marco Colangelo, Karl K. Berggren","doi":"10.1038/s41928-025-01512-0","DOIUrl":"10.1038/s41928-025-01512-0","url":null,"abstract":"Scalable superconducting memory is required for the development of low-energy superconducting computers and fault-tolerant quantum computers. Conventional superconducting logic-based memory cells possess a large footprint that limits scaling; nanowire-based superconducting memory cells, although more compact, have high error rates, which hinders integration into large arrays. Here we report a 4 × 4 superconducting nanowire memory array that is designed for scalable row–column operations and has a functional density of 2.6 Mbit cm−2. Each memory cell is based on a nanowire loop consisting of two temperature-dependent superconducting switches and a variable kinetic inductor. The arrays operate at 1.3 K, where we implement and characterize multiflux quanta state storage and destructive read-out. By optimizing the write- and read-pulse sequences, we minimize bit errors and maximize operating margins. We achieve a minimum bit error rate of 10−5. We also use circuit-level simulations to understand the memory cell’s dynamics, performance limits and stability under varying pulse amplitudes. Arrays of nanowire loops consisting of two temperature-dependent superconducting switches and a variable kinetic inductor can be used to create a robust and scalable superconducting memory.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 1","pages":"69-77"},"PeriodicalIF":40.9,"publicationDate":"2026-01-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145902856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-05DOI: 10.1038/s41928-025-01516-w
Zhipeng Li, Zhu Liu, Zhen Wang, Yikuan Deng, Shuihua Yang, Jianfeng Chen, Qihang Zeng, Yuzhe Zhong, Haitao Yang, Ze Xiong, Xi Tian, Gaosheng Li, Yang Chen, Hui Jing, John S. Ho, Cheng-Wei Qiu
Body sensor networks wirelessly interconnect multiple on-body sensors using metamaterials that are capable of supporting microwave near-field or surface-wave propagations. However, the design of such networks is typically restricted to one-dimensional unit-cell structures. Topological metamaterials are often used in photonics applications such as lasers and photon sources, but their integration with biological systems remain limited due to low flexibility, high bending loss and high energy dissipation in biological environments. Here we report flexible topological metamaterial clothing that can provide robust biosensing networks on the human body. The approach is based on two-dimensional topological modules fabricated from thin metallic conductive textiles. The resulting topological edge states improve on-body signal transmission by over three orders of magnitude (more than 30 dB) compared with conventional radiative networks, and can maintain performance under various bending angles. The modular design allows reconfiguration by varying the combination of topological phase modules. We show that the topological clothing with interconnected biosensors, and enhanced with machine learning algorithms, can monitor vital signs during exercise with an over two orders of magnitude improvement in signal-to-noise ratio and a threefold increase in accuracy compared with a system without topological clothing. Topological metamaterial clothing based on metallic conductive textiles can be used to create robust biosensing networks on the human body that can monitor vital signs during exercise.
{"title":"Body sensor networks based on flexible topological clothing","authors":"Zhipeng Li, Zhu Liu, Zhen Wang, Yikuan Deng, Shuihua Yang, Jianfeng Chen, Qihang Zeng, Yuzhe Zhong, Haitao Yang, Ze Xiong, Xi Tian, Gaosheng Li, Yang Chen, Hui Jing, John S. Ho, Cheng-Wei Qiu","doi":"10.1038/s41928-025-01516-w","DOIUrl":"10.1038/s41928-025-01516-w","url":null,"abstract":"Body sensor networks wirelessly interconnect multiple on-body sensors using metamaterials that are capable of supporting microwave near-field or surface-wave propagations. However, the design of such networks is typically restricted to one-dimensional unit-cell structures. Topological metamaterials are often used in photonics applications such as lasers and photon sources, but their integration with biological systems remain limited due to low flexibility, high bending loss and high energy dissipation in biological environments. Here we report flexible topological metamaterial clothing that can provide robust biosensing networks on the human body. The approach is based on two-dimensional topological modules fabricated from thin metallic conductive textiles. The resulting topological edge states improve on-body signal transmission by over three orders of magnitude (more than 30 dB) compared with conventional radiative networks, and can maintain performance under various bending angles. The modular design allows reconfiguration by varying the combination of topological phase modules. We show that the topological clothing with interconnected biosensors, and enhanced with machine learning algorithms, can monitor vital signs during exercise with an over two orders of magnitude improvement in signal-to-noise ratio and a threefold increase in accuracy compared with a system without topological clothing. Topological metamaterial clothing based on metallic conductive textiles can be used to create robust biosensing networks on the human body that can monitor vital signs during exercise.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 1","pages":"59-68"},"PeriodicalIF":40.9,"publicationDate":"2026-01-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145902857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-02DOI: 10.1038/s41928-025-01503-1
Yun Xia, Ting Zhu, Kai Chen, Bo Li, Yaqiang Wang, Bing Chen, Yizhuang Li, Qianduo Zhuang, Kai Wu, Jinyu Zhang, Gang Liu, Jun Sun
Metal-film-based conductors are an important element of flexible electronic devices. However, they typically suffer from fatigue damage and electrical degradation under cyclic deformation, which can limit practical use. Here we report fatigue-resistant metal films with a coherent gradient nanolayered architecture. The architecture consists of alternating stacked layers of silver and aluminium, with silver layers that become progressively thinner and finer grained. Initial crack nucleation is delayed by a combination of heterodeformation-induced strengthening, controlled grain coarsening in the silver layer and mitigation of interface stress concentrations. The moderate interface adhesion between silver and aluminium, and the multiaxial stress state induced by the gradient structure, also promote interface delamination and crack deflection, which suppresses fatigue-crack propagation. Our coherent gradient nanolayered silver/aluminium films exhibit a conductivity of over 107 S m−1 and relatively little conductivity change in both high-cycle, low-stress regimes (107 cycles at 0.7% strain) and low-cycle, high-stress regimes (105 cycles at 5% strain). Conductive films with a coherent gradient nanolayered architecture that consists of alternating stacked silver and aluminium layers can suppress crack nucleation and propagation, leading to increased resistance to mechanical cyclic fatigue.
金属薄膜导体是柔性电子器件的重要组成部分。然而，在循环变形下，它们通常会遭受疲劳损伤和电退化，这限制了它们的实际使用。在这里，我们报告了具有相干梯度纳米层结构的抗疲劳金属薄膜。该建筑由交替堆叠的银层和铝层组成，银层逐渐变得更薄、更细。异质变形诱导的强化、银层中有控制的晶粒粗化和界面应力集中的减缓共同延缓了初始裂纹形核的形成。银与铝界面的适度粘附以及梯度结构引起的多轴应力状态也促进了界面分层和裂纹偏转，从而抑制了疲劳裂纹的扩展。我们的相关梯度纳米层银/铝薄膜的电导率超过107 S m−1，在高周期、低应力状态（0.7%应变下107次循环）和低周期、高应力状态（5%应变下105次循环）下的电导率变化都相对较小。
{"title":"Fatigue-resistant metal-film-based flexible conductors with a coherent gradient nanolayered architecture","authors":"Yun Xia, Ting Zhu, Kai Chen, Bo Li, Yaqiang Wang, Bing Chen, Yizhuang Li, Qianduo Zhuang, Kai Wu, Jinyu Zhang, Gang Liu, Jun Sun","doi":"10.1038/s41928-025-01503-1","DOIUrl":"10.1038/s41928-025-01503-1","url":null,"abstract":"Metal-film-based conductors are an important element of flexible electronic devices. However, they typically suffer from fatigue damage and electrical degradation under cyclic deformation, which can limit practical use. Here we report fatigue-resistant metal films with a coherent gradient nanolayered architecture. The architecture consists of alternating stacked layers of silver and aluminium, with silver layers that become progressively thinner and finer grained. Initial crack nucleation is delayed by a combination of heterodeformation-induced strengthening, controlled grain coarsening in the silver layer and mitigation of interface stress concentrations. The moderate interface adhesion between silver and aluminium, and the multiaxial stress state induced by the gradient structure, also promote interface delamination and crack deflection, which suppresses fatigue-crack propagation. Our coherent gradient nanolayered silver/aluminium films exhibit a conductivity of over 107 S m−1 and relatively little conductivity change in both high-cycle, low-stress regimes (107 cycles at 0.7% strain) and low-cycle, high-stress regimes (105 cycles at 5% strain). Conductive films with a coherent gradient nanolayered architecture that consists of alternating stacked silver and aluminium layers can suppress crack nucleation and propagation, leading to increased resistance to mechanical cyclic fatigue.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 1","pages":"33-44"},"PeriodicalIF":40.9,"publicationDate":"2026-01-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145894961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-02DOI: 10.1038/s41928-025-01505-z
Bozhi Yin, Hayk Gevorgyan, Deniz Onural, Bohan Zhang, Anatoly Khilo, Miloš A. Popović, Vladimir M. Stojanović
The development of quantum and superconducting computer applications requires high-bandwidth and energy-efficient readout interfaces that can connect superconducting integrated circuits with a room-temperature environment. However, electrical and optical interconnect approaches involve extra amplification stages due to the low outputs of the superconducting circuits, which make them complicated, difficult to scale and a source of heat leakage. Here we describe a single-chip electronic–photonic transmitter that is driven directly by superconducting electronics and is fabricated using a commercial complementary metal–oxide–semiconductor foundry process. A laser-forwarded coherent-link architecture enables the transmitter to be directly driven at 4 K by a superconducting integrated circuit with only millivolt-level voltage swing and at a bit error rate of under 1 × 10−6. The energy efficiency of the link, at a temperature of 4 K and a laser power split ratio of 10/90, is 673 fJ per bit. An electronic–photonic transmitter chip can enable signal readout of superconducting electronics for interfacing with room-temperature environments.
{"title":"A fully packaged cryogenic optical transmitter directly interfaced with a superconducting chip","authors":"Bozhi Yin, Hayk Gevorgyan, Deniz Onural, Bohan Zhang, Anatoly Khilo, Miloš A. Popović, Vladimir M. Stojanović","doi":"10.1038/s41928-025-01505-z","DOIUrl":"10.1038/s41928-025-01505-z","url":null,"abstract":"The development of quantum and superconducting computer applications requires high-bandwidth and energy-efficient readout interfaces that can connect superconducting integrated circuits with a room-temperature environment. However, electrical and optical interconnect approaches involve extra amplification stages due to the low outputs of the superconducting circuits, which make them complicated, difficult to scale and a source of heat leakage. Here we describe a single-chip electronic–photonic transmitter that is driven directly by superconducting electronics and is fabricated using a commercial complementary metal–oxide–semiconductor foundry process. A laser-forwarded coherent-link architecture enables the transmitter to be directly driven at 4 K by a superconducting integrated circuit with only millivolt-level voltage swing and at a bit error rate of under 1 × 10−6. The energy efficiency of the link, at a temperature of 4 K and a laser power split ratio of 10/90, is 673 fJ per bit. An electronic–photonic transmitter chip can enable signal readout of superconducting electronics for interfacing with room-temperature environments.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 1","pages":"78-83"},"PeriodicalIF":40.9,"publicationDate":"2026-01-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145894962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-12-23DOI: 10.1038/s41928-025-01550-8
Technology breakthroughs at the 2025 IEEE International Electron Devices Meeting, which celebrates 100 years of field-effect transistors.
2025年IEEE国际电子器件会议上的技术突破，庆祝场效应晶体管100周年。
{"title":"A device of the past and the future","authors":"","doi":"10.1038/s41928-025-01550-8","DOIUrl":"10.1038/s41928-025-01550-8","url":null,"abstract":"Technology breakthroughs at the 2025 IEEE International Electron Devices Meeting, which celebrates 100 years of field-effect transistors.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 12","pages":"1119-1119"},"PeriodicalIF":40.9,"publicationDate":"2025-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.nature.comhttps://www.nature.com/articles/s41928-025-01550-8.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145808698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-12-22DOI: 10.1038/s41928-025-01543-7
Zhengli Dou, Chuxin Lei, Kai Wu, Guihua Yu
Increasing power densities in microprocessors and artificial intelligence hardware are pushing the thermal limits of electronic systems, and thermal interface materials—thin layers that conduct heat between dissimilar surfaces—are central to addressing this challenge. Classical models suggest that efficient heat transfer is possible with such materials, but real-world performance is always limited by nanoscale roughness, imperfect contacts and degradation under thermal cycling. Here we explore the development of thermal interface materials. We examine the physical origin of interfacial thermal resistance and consider its impact on device scaling, efficiency and reliability. We then discuss material and design strategies that can balance thermal conductivity with mechanical compliance, bond line thickness and electrical insulation. Finally, we highlight the need to treat thermal interface materials, not as passive fillings, but as integral system components that are co-designed alongside device architectures, and propose an integrated engineering framework for the future development of thermal interface materials. This Perspective examines the development of thermal interface materials, exploring material and design strategies that balance thermal conductivity, mechanical compliance, thickness and electrical insulation, and proposes an integrated engineering framework for the future development of the materials.
{"title":"The development of thermal interface materials","authors":"Zhengli Dou, Chuxin Lei, Kai Wu, Guihua Yu","doi":"10.1038/s41928-025-01543-7","DOIUrl":"10.1038/s41928-025-01543-7","url":null,"abstract":"Increasing power densities in microprocessors and artificial intelligence hardware are pushing the thermal limits of electronic systems, and thermal interface materials—thin layers that conduct heat between dissimilar surfaces—are central to addressing this challenge. Classical models suggest that efficient heat transfer is possible with such materials, but real-world performance is always limited by nanoscale roughness, imperfect contacts and degradation under thermal cycling. Here we explore the development of thermal interface materials. We examine the physical origin of interfacial thermal resistance and consider its impact on device scaling, efficiency and reliability. We then discuss material and design strategies that can balance thermal conductivity with mechanical compliance, bond line thickness and electrical insulation. Finally, we highlight the need to treat thermal interface materials, not as passive fillings, but as integral system components that are co-designed alongside device architectures, and propose an integrated engineering framework for the future development of thermal interface materials. This Perspective examines the development of thermal interface materials, exploring material and design strategies that balance thermal conductivity, mechanical compliance, thickness and electrical insulation, and proposes an integrated engineering framework for the future development of the materials.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 12","pages":"1146-1155"},"PeriodicalIF":40.9,"publicationDate":"2025-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145808778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-12-19DOI: 10.1038/s41928-025-01537-5
Abhairaj Singh, Manuel Le Gallo, Athanasios Vasilopoulos, Jose Luquin, Pritish Narayanan, Geoffrey W. Burr, Abu Sebastian
Analogue in-memory computing (AIMC) is an emerging computational approach that executes operations directly within memory arrays, reducing the need for data transfer between memory and processing units. AIMC-based accelerators are, in particular, being explored for deep neural network (DNN) inference, with the key element of such accelerators being the AIMC tile, which can be implemented using various conventional volatile charge-based and emerging non-volatile resistive memory (memristive) technologies. Here we examine the design of non-volatile memristive AIMC tiles for DNN accelerators. We explore the different components of a memristive AIMC tile and the range of mapping techniques for encoding signed multibit weights and inputs. We provide an analysis of the efficiency and accuracy of output encoding schemes, including various analogue-to-digital converter approaches. We also provide a comparative analysis of the different memory technologies being explored and projections for how technology scaling may impact key design components. This Perspective examines the design of non-volatile memristive analogue in-memory computing tiles for deep neural network accelerators, considering the challenges and opportunities associated with designing the different components and providing projections for how technology scaling may impact key design elements.
{"title":"The design of analogue in-memory computing tiles","authors":"Abhairaj Singh, Manuel Le Gallo, Athanasios Vasilopoulos, Jose Luquin, Pritish Narayanan, Geoffrey W. Burr, Abu Sebastian","doi":"10.1038/s41928-025-01537-5","DOIUrl":"10.1038/s41928-025-01537-5","url":null,"abstract":"Analogue in-memory computing (AIMC) is an emerging computational approach that executes operations directly within memory arrays, reducing the need for data transfer between memory and processing units. AIMC-based accelerators are, in particular, being explored for deep neural network (DNN) inference, with the key element of such accelerators being the AIMC tile, which can be implemented using various conventional volatile charge-based and emerging non-volatile resistive memory (memristive) technologies. Here we examine the design of non-volatile memristive AIMC tiles for DNN accelerators. We explore the different components of a memristive AIMC tile and the range of mapping techniques for encoding signed multibit weights and inputs. We provide an analysis of the efficiency and accuracy of output encoding schemes, including various analogue-to-digital converter approaches. We also provide a comparative analysis of the different memory technologies being explored and projections for how technology scaling may impact key design components. This Perspective examines the design of non-volatile memristive analogue in-memory computing tiles for deep neural network accelerators, considering the challenges and opportunities associated with designing the different components and providing projections for how technology scaling may impact key design elements.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 12","pages":"1156-1169"},"PeriodicalIF":40.9,"publicationDate":"2025-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145808777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-12-18DOI: 10.1038/s41928-025-01513-z
Claudio Pacchierotti
An 18-gram haptic feedback ring can deliver powerful force sensations while detecting multi-directional touch inputs, potentially transforming the way we can interact with digital environments.
{"title":"Haptic feedback that rings true","authors":"Claudio Pacchierotti","doi":"10.1038/s41928-025-01513-z","DOIUrl":"10.1038/s41928-025-01513-z","url":null,"abstract":"An 18-gram haptic feedback ring can deliver powerful force sensations while detecting multi-directional touch inputs, potentially transforming the way we can interact with digital environments.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 12","pages":"1142-1143"},"PeriodicalIF":40.9,"publicationDate":"2025-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145771117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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