Pub Date : 2026-01-15DOI: 10.1038/s41928-025-01544-6
Pek Jun Tiw, Rui Yuan, Teng Zhang, Lianfeng Yu, Yuchao Yang
Neuromorphic systems are crucial for the development of intelligent human–machine interfaces. Memristive hardware can emulate the neuron dynamics of biological systems, but typically uses rate coding, whereas single-spike coding (in which information is expressed by the firing time of a sole spike per neuron and the relative firing times between neurons) is faster and more energy efficient. Here we report a robust memristive hardware system that uses single-spike coding. For input encoding and neural processing, we use uniform vanadium oxide memristors to create a single-spiking circuit with under 1% coding variability. For synaptic computations, we develop a conductance consolidation strategy and mapping scheme to limit conductance drift due to relaxation in a hafnium oxide/tantalum oxide memristor chip, achieving relaxed conductance states with standard deviations within 1.2 μS. We also develop an incremental step and width pulse programming strategy to prevent resource wastage. The combined end-to-end hardware single-spike-coded system exhibits an accuracy degradation under 1.5% relative to a software baseline. We show that this approach can be used for real-time vehicle control from surface electromyography. Simulations show that our system consumes around 38 times lower energy with around 6.4 times lower latency than a conventional rate coding system.
{"title":"An end-to-end memristive hardware system based on single-spike coding for human–machine interfaces","authors":"Pek Jun Tiw, Rui Yuan, Teng Zhang, Lianfeng Yu, Yuchao Yang","doi":"10.1038/s41928-025-01544-6","DOIUrl":"https://doi.org/10.1038/s41928-025-01544-6","url":null,"abstract":"Neuromorphic systems are crucial for the development of intelligent human–machine interfaces. Memristive hardware can emulate the neuron dynamics of biological systems, but typically uses rate coding, whereas single-spike coding (in which information is expressed by the firing time of a sole spike per neuron and the relative firing times between neurons) is faster and more energy efficient. Here we report a robust memristive hardware system that uses single-spike coding. For input encoding and neural processing, we use uniform vanadium oxide memristors to create a single-spiking circuit with under 1% coding variability. For synaptic computations, we develop a conductance consolidation strategy and mapping scheme to limit conductance drift due to relaxation in a hafnium oxide/tantalum oxide memristor chip, achieving relaxed conductance states with standard deviations within 1.2 μS. We also develop an incremental step and width pulse programming strategy to prevent resource wastage. The combined end-to-end hardware single-spike-coded system exhibits an accuracy degradation under 1.5% relative to a software baseline. We show that this approach can be used for real-time vehicle control from surface electromyography. Simulations show that our system consumes around 38 times lower energy with around 6.4 times lower latency than a conventional rate coding system.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"45 1","pages":""},"PeriodicalIF":34.3,"publicationDate":"2026-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145968803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-15DOI: 10.1038/s41928-025-01554-4
Bingjie Dang, Teng Zhang, Fanqi Meng, Keqin Liu, Liutao Yu, Qinghua Zhang, Si Wu, Lin Gu, Ru Huang, Yuchao Yang
Neuromorphic systems based on spike-timing-dependent plasticity offer energy-efficient learning but face limitations in terms of adapting to high-frequency inputs, restricting their effectiveness in processing complex temporal information. Synaptic fatigue dynamics, analogous to biological short-term plasticity, can increase the effectiveness, but this feature is difficult to efficiently incorporate in hardware. Here we report a hybrid architecture in which arrays of memristors with distinct dynamics are paired to create synaptic elements with short-term fatigue and long-term memory. The elements consist of an interfacial dynamic memristor with high uniformity and intrinsic fatigue behaviour coupled to a hafnia-based one-transistor–one-non-volatile memristor. The design enables a hardware-efficient implementation of fatigue spike-timing-dependent plasticity, enhancing the temporal learning capabilities of spiking neural networks. We show that the resulting neural network can be used for unsupervised online learning with high adaptability to both rate- and timing-coded spikes, high noise resilience and superior performance over conventional spike-timing-dependent plasticity approaches.
{"title":"Spiking neural networks with fatigue spike-timing-dependent plasticity learning using hybrid memristor arrays","authors":"Bingjie Dang, Teng Zhang, Fanqi Meng, Keqin Liu, Liutao Yu, Qinghua Zhang, Si Wu, Lin Gu, Ru Huang, Yuchao Yang","doi":"10.1038/s41928-025-01554-4","DOIUrl":"https://doi.org/10.1038/s41928-025-01554-4","url":null,"abstract":"Neuromorphic systems based on spike-timing-dependent plasticity offer energy-efficient learning but face limitations in terms of adapting to high-frequency inputs, restricting their effectiveness in processing complex temporal information. Synaptic fatigue dynamics, analogous to biological short-term plasticity, can increase the effectiveness, but this feature is difficult to efficiently incorporate in hardware. Here we report a hybrid architecture in which arrays of memristors with distinct dynamics are paired to create synaptic elements with short-term fatigue and long-term memory. The elements consist of an interfacial dynamic memristor with high uniformity and intrinsic fatigue behaviour coupled to a hafnia-based one-transistor–one-non-volatile memristor. The design enables a hardware-efficient implementation of fatigue spike-timing-dependent plasticity, enhancing the temporal learning capabilities of spiking neural networks. We show that the resulting neural network can be used for unsupervised online learning with high adaptability to both rate- and timing-coded spikes, high noise resilience and superior performance over conventional spike-timing-dependent plasticity approaches.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"65 1","pages":""},"PeriodicalIF":34.3,"publicationDate":"2026-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145968802","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Creating multiple polarization states in a single ferroelectric device is of use in neuromorphic computing to enhance computational resolution. However, the number of stable polarization states in such systems is typically limited to 32 at room temperature. Here we report the manipulation of thousands of non-volatile polarization states at room temperature in a sliding ferroelectric transistor that is composed of an aligned graphene monolayer atop hexagonal boron nitride. Solely regulated by source–drain pulses, more than 36 quasi-continuous polarization states can be generated at one doping level. Superimposing a gate voltage during the source–drain pulses can reversibly regulate the graphene Fermi energy between 84 doping levels, promoting the number of physically distinct polarization states to 3,024 (36 states × 84 doping levels). These polarization states can sustain for over 105 s and could potentially persist for 10 years. The abundant polarization states probably stem from the motion of polar domain walls and the moiré potential localizing the injected carriers. The simulation of during-training quantization in a deep residual network using the 3,024 polarization states shows a floating-point-comparable recognition accuracy (around 93.53%) for fashion images.
{"title":"Manipulating thousands of non-volatile polarization states within one sliding ferroelectric transistor at room temperature","authors":"Xiaofan Wang, Xiaokai Chen, Yuyang Long, Jinguo Liu, Fanrong Lin, Jun Yin, Yanpeng Liu, Wanlin Guo","doi":"10.1038/s41928-025-01551-7","DOIUrl":"https://doi.org/10.1038/s41928-025-01551-7","url":null,"abstract":"Creating multiple polarization states in a single ferroelectric device is of use in neuromorphic computing to enhance computational resolution. However, the number of stable polarization states in such systems is typically limited to 32 at room temperature. Here we report the manipulation of thousands of non-volatile polarization states at room temperature in a sliding ferroelectric transistor that is composed of an aligned graphene monolayer atop hexagonal boron nitride. Solely regulated by source–drain pulses, more than 36 quasi-continuous polarization states can be generated at one doping level. Superimposing a gate voltage during the source–drain pulses can reversibly regulate the graphene Fermi energy between 84 doping levels, promoting the number of physically distinct polarization states to 3,024 (36 states × 84 doping levels). These polarization states can sustain for over 105 s and could potentially persist for 10 years. The abundant polarization states probably stem from the motion of polar domain walls and the moiré potential localizing the injected carriers. The simulation of during-training quantization in a deep residual network using the 3,024 polarization states shows a floating-point-comparable recognition accuracy (around 93.53%) for fashion images.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"56 1","pages":""},"PeriodicalIF":34.3,"publicationDate":"2026-01-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145968811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-14DOI: 10.1038/s41928-025-01535-7
A heat-shrinking method for fabricating conformal electronics is realized by patterning semi-liquid metal circuits onto thermoplastic substrates that are then heated to induce shrinkage around a three-dimensional target object. The method can be applied to diverse targets of different shapes and sizes, with the shape-adaptive electronics showing good electrical stability.
{"title":"Heat-shrinking method for the fabrication of conformal electronics","authors":"","doi":"10.1038/s41928-025-01535-7","DOIUrl":"10.1038/s41928-025-01535-7","url":null,"abstract":"A heat-shrinking method for fabricating conformal electronics is realized by patterning semi-liquid metal circuits onto thermoplastic substrates that are then heated to induce shrinkage around a three-dimensional target object. The method can be applied to diverse targets of different shapes and sizes, with the shape-adaptive electronics showing good electrical stability.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 1","pages":"21-22"},"PeriodicalIF":40.9,"publicationDate":"2026-01-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146083450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-14DOI: 10.1038/s41928-025-01536-6
Ilia Valov, Xin Zheng
Transmission of information via photons could lead to compact three-dimensional neuromorphic computing hardware.
通过光子传输信息可能导致紧凑的三维神经形态计算硬件。
{"title":"A photonically linked memristive neural network","authors":"Ilia Valov, Xin Zheng","doi":"10.1038/s41928-025-01536-6","DOIUrl":"10.1038/s41928-025-01536-6","url":null,"abstract":"Transmission of information via photons could lead to compact three-dimensional neuromorphic computing hardware.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 1","pages":"19-20"},"PeriodicalIF":40.9,"publicationDate":"2026-01-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146083422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In-memory computing combines memory and computing together in a single processing unit, eliminating the energy and latency overheads associated with data transfer between memory and computing units, which occurs in conventional systems. When implemented with crossbar arrays of memory devices, the approach can be used to accelerate low-level, data-intensive algebraic operations such as matrix–vector and inverse matrix–vector multiplication. However, although matrix–vector multiplication has recently been demonstrated, inverse matrix–vector multiplication faces additional challenges because of increased circuit implementation complexity. Here we report a fully integrated analogue closed-loop in-memory computing accelerator for inverse matrix–vector multiplication. The chip is based on static random-access memory and is fabricated in 90-nm complementary metal–oxide–semiconductor technology. It features two 64 × 64 memory arrays, enclosed in an analogue feedback loop by on-chip operational amplifiers, digital-to-analogue and analogue-to-digital converters. We experimentally show that the chip can be used to find solutions to systems of differential equations by recursive block inversion. It can also be used for sounding rocket trajectory tracking by Kalman filter and acceleration of inverse kinematics in robotic arms. The accuracy of the results closely matches fully digital systems working at the equivalent integrated circuit precision, providing advantages in terms of latency, energy and area consumption.
{"title":"A fully integrated analogue closed-loop in-memory computing accelerator based on static random-access memory","authors":"Piergiulio Mannocci, Carlo Zucchelli, Irene Andreoli, Andrea Pezzoli, Enrico Melacarne, Giacomo Pedretti, Flavio Sancandi, Corrado Villa, Zhong Sun, Umberto Spagnolini, Daniele Ielmini","doi":"10.1038/s41928-025-01549-1","DOIUrl":"https://doi.org/10.1038/s41928-025-01549-1","url":null,"abstract":"In-memory computing combines memory and computing together in a single processing unit, eliminating the energy and latency overheads associated with data transfer between memory and computing units, which occurs in conventional systems. When implemented with crossbar arrays of memory devices, the approach can be used to accelerate low-level, data-intensive algebraic operations such as matrix–vector and inverse matrix–vector multiplication. However, although matrix–vector multiplication has recently been demonstrated, inverse matrix–vector multiplication faces additional challenges because of increased circuit implementation complexity. Here we report a fully integrated analogue closed-loop in-memory computing accelerator for inverse matrix–vector multiplication. The chip is based on static random-access memory and is fabricated in 90-nm complementary metal–oxide–semiconductor technology. It features two 64 × 64 memory arrays, enclosed in an analogue feedback loop by on-chip operational amplifiers, digital-to-analogue and analogue-to-digital converters. We experimentally show that the chip can be used to find solutions to systems of differential equations by recursive block inversion. It can also be used for sounding rocket trajectory tracking by Kalman filter and acceleration of inverse kinematics in robotic arms. The accuracy of the results closely matches fully digital systems working at the equivalent integrated circuit precision, providing advantages in terms of latency, energy and area consumption.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"20 1","pages":""},"PeriodicalIF":34.3,"publicationDate":"2026-01-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145968804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-13DOI: 10.1038/s41928-025-01548-2
A. Hugot, Q. A. Greffe, G. Julie, E. Eyraud, F. Balestro, J. J. Viennot
Electronic devices that use acoustic vibrations are of use in classical and quantum technologies. Such devices rely on transducers to exchange signals between electrical and acoustic networks. The transducers are typically based on piezoelectricity. However, conventional piezoelectric transducers are limited to either small efficiencies or narrow bandwidths, and usually operate at a fixed frequency. Here we report piezoelectric microwave–acoustic transduction operating close to the maximal efficiency–bandwidth product of lithium niobate. We use superconducting quantum interference device arrays to transform the large complex impedance of wideband interdigital transducers into 50 Ω. We demonstrate an efficiency–bandwidth product of around 440 MHz, with a maximum efficiency of 62% at 5.7 GHz. We use the flux dependence of superconducting quantum interference devices to create transducers with in situ tunability across nearly an octave at around 5.5 GHz. Our transducers can be connected to other superconducting quantum devices and could be of use in applications such as microwave-to-optics conversion, quantum-limited phonon detection, acoustic spectroscopy and fast acoustic coherent control in the 4–8-GHz band.
{"title":"Approaching optimal microwave–acoustic transduction on lithium niobate using superconducting quantum interference device arrays","authors":"A. Hugot, Q. A. Greffe, G. Julie, E. Eyraud, F. Balestro, J. J. Viennot","doi":"10.1038/s41928-025-01548-2","DOIUrl":"https://doi.org/10.1038/s41928-025-01548-2","url":null,"abstract":"Electronic devices that use acoustic vibrations are of use in classical and quantum technologies. Such devices rely on transducers to exchange signals between electrical and acoustic networks. The transducers are typically based on piezoelectricity. However, conventional piezoelectric transducers are limited to either small efficiencies or narrow bandwidths, and usually operate at a fixed frequency. Here we report piezoelectric microwave–acoustic transduction operating close to the maximal efficiency–bandwidth product of lithium niobate. We use superconducting quantum interference device arrays to transform the large complex impedance of wideband interdigital transducers into 50 Ω. We demonstrate an efficiency–bandwidth product of around 440 MHz, with a maximum efficiency of 62% at 5.7 GHz. We use the flux dependence of superconducting quantum interference devices to create transducers with in situ tunability across nearly an octave at around 5.5 GHz. Our transducers can be connected to other superconducting quantum devices and could be of use in applications such as microwave-to-optics conversion, quantum-limited phonon detection, acoustic spectroscopy and fast acoustic coherent control in the 4–8-GHz band.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"33 1","pages":""},"PeriodicalIF":34.3,"publicationDate":"2026-01-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145956342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Conformal electronics are of use in the development of wearable and biointegrated devices. However, existing methods of creating such electronics can lead to a lack of mechanical robustness, are limited in their range of materials or require specialized equipment and complex procedures. Here we report a heat-shrinking method for fabricating conformal electronics in which semi-liquid metal circuits are patterned onto thermoplastic substrates and then heated to induce shrinkage around a target object. We develop a semi-liquid metal that can withstand shrinkage deformation and maintain long-term electrical stability. We also develop simulation tools to consider the effect of the thermoplastic film’s deformation on the final circuit pattern, which allows precise circuit designs to be created on the initially planar film. The resulting shape-adaptive electronics exhibit high durability, with minimal conductivity change after 5,000 bending and twisting cycles. We illustrate the potential of the method by creating circuits for de-icing model aircraft, robot tactile sensors, fruit temperature and humidity sensors, fingertip pulse sensors, and smart bandages. A heat-shrinking method—in which semi-liquid metal-based circuits are printed on thermoplastic films that subsequently shrink and wrap around a target object when mildly heated—can be used to create conformal electronics on various substrates, including plants and skin.
{"title":"Shape-adaptive electronics based on liquid metal circuits printed on thermoplastic films","authors":"Chengjie Jiang, Wenqiang Li, Qiushuo Wu, Zhi Wang, Kaiyan Wang, Bingyi Pan, Hui Zong, Xiaoqing Li, Jiaping Liu, Bo Yuan, Tianyu Li, Xi Tian, Xian Huang, Hongzhang Wang, Rui Guo","doi":"10.1038/s41928-025-01528-6","DOIUrl":"10.1038/s41928-025-01528-6","url":null,"abstract":"Conformal electronics are of use in the development of wearable and biointegrated devices. However, existing methods of creating such electronics can lead to a lack of mechanical robustness, are limited in their range of materials or require specialized equipment and complex procedures. Here we report a heat-shrinking method for fabricating conformal electronics in which semi-liquid metal circuits are patterned onto thermoplastic substrates and then heated to induce shrinkage around a target object. We develop a semi-liquid metal that can withstand shrinkage deformation and maintain long-term electrical stability. We also develop simulation tools to consider the effect of the thermoplastic film’s deformation on the final circuit pattern, which allows precise circuit designs to be created on the initially planar film. The resulting shape-adaptive electronics exhibit high durability, with minimal conductivity change after 5,000 bending and twisting cycles. We illustrate the potential of the method by creating circuits for de-icing model aircraft, robot tactile sensors, fruit temperature and humidity sensors, fingertip pulse sensors, and smart bandages. A heat-shrinking method—in which semi-liquid metal-based circuits are printed on thermoplastic films that subsequently shrink and wrap around a target object when mildly heated—can be used to create conformal electronics on various substrates, including plants and skin.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 1","pages":"45-58"},"PeriodicalIF":40.9,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145956357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-09DOI: 10.1038/s41928-025-01534-8
Lei Cai, Yaoyu Tao, Teng Zhang, Chang Liu, Pek Jun Tiw, Lianfeng Yu, Zelun Pan, Longhao Yan, Haoyang Luo, Yihang Zhu, Bowen Wang, Bonan Yan, Xiyuan Tang, Ru Huang, Yuchao Yang
The Fourier transform is a powerful tool to analyse the frequency characteristics of signals. Discrete Fourier transform hardware typically implements Cooley–Tukey-based algorithms for reduced operational complexity. However, such schemes bring a sequential window schedule and separate real and imaginary computations, and their hardware implementations struggle to support runtime arbitrary radix and non-uniform discrete Fourier transform. Here we report a first-principles hetero-integrated Fourier transform system based on volatile and non-volatile memristors. Uniform vanadium oxide volatile memristor arrays provide oscillatory waves for arbitrary radix, and together with compact shaping and phase alignment circuits, runtime-calibratable frequency spectra can be generated, recording a maximum frequency of up to 1.74 MHz and a resolution down to 50 Hz. Non-volatile multilevel tantalum oxide/hafnium oxide memristor arrays are incorporated with bipolar differential conductance mapping for parallel signed discrete Fourier transform in-memory computing. Our hetero-integrated Fourier transform system can support arbitrary radix values up to 2,048, uniform or non-uniform 1D/2D discrete Fourier transform with cross-window parallelism, as well as unified real and imaginary computations, with a discrete Fourier transform accuracy up to 99.2% and O(N) operational complexity. The system can reach a throughput of 504.3 GS s−1, outperforming existing hardware by up to 96.98 times and reduce memory cost. Using volatile vanadium oxide and non-volatile tantalum oxide/hafnium oxide memristor arrays, a first-principles Fourier transform system can be created that can outperform conventional Fourier transform hardware in terms of throughput and reduce memory cost.
{"title":"A first-principles hetero-integrated Fourier transform system based on memristors","authors":"Lei Cai, Yaoyu Tao, Teng Zhang, Chang Liu, Pek Jun Tiw, Lianfeng Yu, Zelun Pan, Longhao Yan, Haoyang Luo, Yihang Zhu, Bowen Wang, Bonan Yan, Xiyuan Tang, Ru Huang, Yuchao Yang","doi":"10.1038/s41928-025-01534-8","DOIUrl":"10.1038/s41928-025-01534-8","url":null,"abstract":"The Fourier transform is a powerful tool to analyse the frequency characteristics of signals. Discrete Fourier transform hardware typically implements Cooley–Tukey-based algorithms for reduced operational complexity. However, such schemes bring a sequential window schedule and separate real and imaginary computations, and their hardware implementations struggle to support runtime arbitrary radix and non-uniform discrete Fourier transform. Here we report a first-principles hetero-integrated Fourier transform system based on volatile and non-volatile memristors. Uniform vanadium oxide volatile memristor arrays provide oscillatory waves for arbitrary radix, and together with compact shaping and phase alignment circuits, runtime-calibratable frequency spectra can be generated, recording a maximum frequency of up to 1.74 MHz and a resolution down to 50 Hz. Non-volatile multilevel tantalum oxide/hafnium oxide memristor arrays are incorporated with bipolar differential conductance mapping for parallel signed discrete Fourier transform in-memory computing. Our hetero-integrated Fourier transform system can support arbitrary radix values up to 2,048, uniform or non-uniform 1D/2D discrete Fourier transform with cross-window parallelism, as well as unified real and imaginary computations, with a discrete Fourier transform accuracy up to 99.2% and O(N) operational complexity. The system can reach a throughput of 504.3 GS s−1, outperforming existing hardware by up to 96.98 times and reduce memory cost. Using volatile vanadium oxide and non-volatile tantalum oxide/hafnium oxide memristor arrays, a first-principles Fourier transform system can be created that can outperform conventional Fourier transform hardware in terms of throughput and reduce memory cost.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"9 1","pages":"103-115"},"PeriodicalIF":40.9,"publicationDate":"2026-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145938240","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：