Pub Date : 2025-10-28DOI: 10.1038/s41928-025-01480-5
Conventional analogue compute-in-memory suffers from limited accuracy and reliability. Now, a spintronic digital compute-in-memory macro integrates in-bitcell multiplication and digitization, and flexible-precision accumulation, to deliver software-equivalent artificial intelligence accuracy. The macro achieves computation latencies of 7.4–29.6 ns and energy efficiencies of 7.02–112.3 tera-operations per second per watt.
传统的内存模拟计算精度和可靠性有限。现在，一个自旋电子数字内存计算宏集成了位元倍增和数字化，以及灵活的精度积累，以提供相当于软件的人工智能精度。该宏实现了7.4-29.6 ns的计算延迟和7.02-112.3 tb / s / w的能量效率。
{"title":"Spintronic digital compute-in-memory macro for efficient artificial intelligence","authors":"","doi":"10.1038/s41928-025-01480-5","DOIUrl":"10.1038/s41928-025-01480-5","url":null,"abstract":"Conventional analogue compute-in-memory suffers from limited accuracy and reliability. Now, a spintronic digital compute-in-memory macro integrates in-bitcell multiplication and digitization, and flexible-precision accumulation, to deliver software-equivalent artificial intelligence accuracy. The macro achieves computation latencies of 7.4–29.6 ns and energy efficiencies of 7.02–112.3 tera-operations per second per watt.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 11","pages":"1012-1013"},"PeriodicalIF":40.9,"publicationDate":"2025-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145381812","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-27DOI: 10.1038/s41928-025-01487-y
Sinan Yilmaz, Jaebin Choi, Ilke Uguz, Jongwoon Kim, Alejandro Akrouh, Adriaan J. Taal, Victoria Andino-Pavlovsky, Heyu Yin, Jason D. Fabbri, Laurent Moreaux, Michael Roukes, Kenneth L. Shepard
Optical imaging offers a number of advantages over electrophysiology including cell-type specificity. However, its application has been limited to the investigation of shallow brain regions (less than 2 mm) because of the light scattering property of brain tissue. Passive optical conduits, such as graded-index lenses and waveguides, have permitted access to deeper locales but with restricted resolution and field of view, while creating massive lesions along the inserted path. Here we report an implantable complementary metal–oxide–semiconductor fluorescence imager with single-neuron resolution. The imager has a 512-pixel silicon image sensor post-processed into a 4.1-mm-long, 120-μm-wide shank with a collinear fibre for illumination. It can record transient fluorescent signals in deep brain regions at 400 frames per second. We show that the system can offer single-neuron resolution in functional imaging of GCaMP6s-expressing neurons at a frame rate of 400 frames per second. A complementary metal–oxide–semiconductor (CMOS) imager that has a 512-pixel silicon image sensor post-processed into a 4.1-mm-long, 120-μm-wide shank with a collinear fibre for illumination can be used to record transient fluorescent signals in deep brain regions at 400 frames per second.
{"title":"An implantable CMOS deep-brain fluorescence imager with single-neuron resolution","authors":"Sinan Yilmaz, Jaebin Choi, Ilke Uguz, Jongwoon Kim, Alejandro Akrouh, Adriaan J. Taal, Victoria Andino-Pavlovsky, Heyu Yin, Jason D. Fabbri, Laurent Moreaux, Michael Roukes, Kenneth L. Shepard","doi":"10.1038/s41928-025-01487-y","DOIUrl":"10.1038/s41928-025-01487-y","url":null,"abstract":"Optical imaging offers a number of advantages over electrophysiology including cell-type specificity. However, its application has been limited to the investigation of shallow brain regions (less than 2 mm) because of the light scattering property of brain tissue. Passive optical conduits, such as graded-index lenses and waveguides, have permitted access to deeper locales but with restricted resolution and field of view, while creating massive lesions along the inserted path. Here we report an implantable complementary metal–oxide–semiconductor fluorescence imager with single-neuron resolution. The imager has a 512-pixel silicon image sensor post-processed into a 4.1-mm-long, 120-μm-wide shank with a collinear fibre for illumination. It can record transient fluorescent signals in deep brain regions at 400 frames per second. We show that the system can offer single-neuron resolution in functional imaging of GCaMP6s-expressing neurons at a frame rate of 400 frames per second. A complementary metal–oxide–semiconductor (CMOS) imager that has a 512-pixel silicon image sensor post-processed into a 4.1-mm-long, 120-μm-wide shank with a collinear fibre for illumination can be used to record transient fluorescent signals in deep brain regions at 400 frames per second.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 12","pages":"1247-1258"},"PeriodicalIF":40.9,"publicationDate":"2025-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145381817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Two-dimensional (2D) semiconductors are promising building blocks for advanced electronic devices. However, the fabrication of high-quality 2D semiconductor wafers with engineered layers remains a challenge. Here we describe a direct wafer bonding and debonding method that can be applied to semiconductor monolayers that have been grown epitaxially on high-adhesion substrates such as sapphire. The process operates in both vacuum and a glovebox environment and requires no intermediate-layer assistance. It produces stacked 2D semiconductors with clean interfaces and wafer-scale uniformity and allows precise control of layer numbers and the interlayer twist angle. We use the approach to create different homostructures and heterostructures with 2D monolayers, including molybdenum disulfide (MoS2) and molybdenum diselenide (MoSe2). We also show that the approach can directly bond monolayer MoS2 onto high-κ dielectric substrates (HfO2 and Al2O3) while preserving its intrinsic electronic properties. A bonding and debonding strategy is used to stack epitaxially grown semiconductor monolayers into various structures with precise control of the layer number and interlayer twist angle.
{"title":"Direct bonding and debonding of two-dimensional semiconductors","authors":"Jieying Liu, Jiaojiao Zhao, Tong Li, Depeng Ji, Liyan Dai, Lu Li, Zheng Wei, JiaWei Li, Qinqin Wang, Hua Yu, Lanying Zhou, Yutong Chen, Fanfan Wu, Mingtong Zhu, Huacong Sun, Yun Li, Songge Zhang, Jinpeng Tian, Xingchao Zhang, Nianpeng Lu, Xuedong Bai, Zexian Cao, Shenghuang Lin, Shuopei Wang, Dongxia Shi, Na Li, Luojun Du, Wei Yang, LeDe Xian, Guangyu Zhang","doi":"10.1038/s41928-025-01474-3","DOIUrl":"10.1038/s41928-025-01474-3","url":null,"abstract":"Two-dimensional (2D) semiconductors are promising building blocks for advanced electronic devices. However, the fabrication of high-quality 2D semiconductor wafers with engineered layers remains a challenge. Here we describe a direct wafer bonding and debonding method that can be applied to semiconductor monolayers that have been grown epitaxially on high-adhesion substrates such as sapphire. The process operates in both vacuum and a glovebox environment and requires no intermediate-layer assistance. It produces stacked 2D semiconductors with clean interfaces and wafer-scale uniformity and allows precise control of layer numbers and the interlayer twist angle. We use the approach to create different homostructures and heterostructures with 2D monolayers, including molybdenum disulfide (MoS2) and molybdenum diselenide (MoSe2). We also show that the approach can directly bond monolayer MoS2 onto high-κ dielectric substrates (HfO2 and Al2O3) while preserving its intrinsic electronic properties. A bonding and debonding strategy is used to stack epitaxially grown semiconductor monolayers into various structures with precise control of the layer number and interlayer twist angle.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 11","pages":"1038-1045"},"PeriodicalIF":40.9,"publicationDate":"2025-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145381815","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-27DOI: 10.1038/s41928-025-01476-1
Ablimit Aili, Jihwan Choi, Yew Soon Ong, Yonggang Wen
The increasing occupation of space orbits by fleets of satellites has led to increasing generation of data in space. At the same time, the expansion of technologies such as artificial intelligence (AI) has led to an increasing number of energy-intensive data centres, which have large carbon footprints, back on Earth. The former calls for space-based computing solutions, whereas the latter calls for carbon-neutral computing solutions. Here we explore the potential of developing carbon-neutral data centres in space. Such an approach would be enabled by the sustainability features of space: abundant solar energy that can be captured with high-efficiency solar cells and a giant cold heat sink (deep space itself) that can spontaneously take in large amounts of waste heat released from computing. We outline a framework for orbital edge data centres, which would be equipped with data sensors and AI accelerators, for carbon-neutral data processing at source in space. We then outline a framework for orbital cloud data centres in the form of a constellation of computational satellites equipped with servers and broadband connectivity, for both in-space and ground-outsourced computing applications. We also provide a method to evaluate the lifecycle carbon usage effectiveness of these cloud data centres. This Perspective explores the potential of developing carbon-neutral data centres in space, providing frameworks for orbital edge data centres, which would be equipped with data sensors and AI accelerators, and orbital cloud data centres, which would be based on constellations of computational satellites equipped with servers and broadband connectivity.
{"title":"The development of carbon-neutral data centres in space","authors":"Ablimit Aili, Jihwan Choi, Yew Soon Ong, Yonggang Wen","doi":"10.1038/s41928-025-01476-1","DOIUrl":"10.1038/s41928-025-01476-1","url":null,"abstract":"The increasing occupation of space orbits by fleets of satellites has led to increasing generation of data in space. At the same time, the expansion of technologies such as artificial intelligence (AI) has led to an increasing number of energy-intensive data centres, which have large carbon footprints, back on Earth. The former calls for space-based computing solutions, whereas the latter calls for carbon-neutral computing solutions. Here we explore the potential of developing carbon-neutral data centres in space. Such an approach would be enabled by the sustainability features of space: abundant solar energy that can be captured with high-efficiency solar cells and a giant cold heat sink (deep space itself) that can spontaneously take in large amounts of waste heat released from computing. We outline a framework for orbital edge data centres, which would be equipped with data sensors and AI accelerators, for carbon-neutral data processing at source in space. We then outline a framework for orbital cloud data centres in the form of a constellation of computational satellites equipped with servers and broadband connectivity, for both in-space and ground-outsourced computing applications. We also provide a method to evaluate the lifecycle carbon usage effectiveness of these cloud data centres. This Perspective explores the potential of developing carbon-neutral data centres in space, providing frameworks for orbital edge data centres, which would be equipped with data sensors and AI accelerators, and orbital cloud data centres, which would be based on constellations of computational satellites equipped with servers and broadband connectivity.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 11","pages":"1016-1026"},"PeriodicalIF":40.9,"publicationDate":"2025-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145381814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-27DOI: 10.1038/s41928-025-01498-9
Transistors are central to modern technology, a role that has been made possible by continuous advances in silicon devices. But how exactly further advances will be achieved is less clear.
晶体管是现代技术的核心，硅器件的不断进步使其成为可能。但究竟如何取得进一步进展尚不清楚。
{"title":"100 years of field-effect transistors","authors":"","doi":"10.1038/s41928-025-01498-9","DOIUrl":"10.1038/s41928-025-01498-9","url":null,"abstract":"Transistors are central to modern technology, a role that has been made possible by continuous advances in silicon devices. But how exactly further advances will be achieved is less clear.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 10","pages":"871-871"},"PeriodicalIF":40.9,"publicationDate":"2025-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.nature.comhttps://www.nature.com/articles/s41928-025-01498-9.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145371976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-27DOI: 10.1038/s41928-025-01488-x
Ruoyu Zhao, Tong Wang, Taehwan Moon, Yichun Xu, Jian Zhao, Piyush Sud, Seung Ju Kim, Han-Ting Liao, Ye Zhuo, Rivu Midya, Shiva Asapu, Dawei Gao, Zixuan Rong, Qinru Qiu, Cynthia Bowers, Krishnamurthy Mahalingam, S. Ganguli, A. K. Roy, Qing Wu, Jin-Woo Han, R. Stanley Williams, Yong Chen, J. Joshua Yang
Neuromorphic computing could be used to create artificial intelligence with high compactness and efficiency. However, complementary metal–oxide–semiconductor (CMOS) circuits are inherently different to biological neurons, and intricate CMOS circuits are needed to realize neuromorphic behaviours. Diffusive memristors are based on ion dynamics and have similarities with biological neurons. They could, thus, be used to create energy- and area-efficient neuromorphic systems. Here we describe a spiking artificial neuron comprising one diffusive memristor, one transistor and one resistor (1M1T1R), which occupies the footprint of a single transistor when vertically integrated. Our neuron exhibits six key neuronal characteristics: leaky integration, threshold firing, cascaded connection, intrinsic plasticity, refractory period and stochasticity. The energy consumption of our 1M1T1R neuron reaches the picojoule per spike level and could reach attojoule per spike levels with further scaling. We simulate a recurrent spiking neural network based on our artificial neuron model and show the impact of the key neuronal characteristics on system performance. An artificial neuron that is based on one diffusive memristor, one transistor and one resistor can exhibit six key biological neuronal characteristics—leaky integration, threshold firing, cascaded connection, intrinsic plasticity, refractory period and stochasticity—with the footprint of a single transistor when vertically integrated.
{"title":"A spiking artificial neuron based on one diffusive memristor, one transistor and one resistor","authors":"Ruoyu Zhao, Tong Wang, Taehwan Moon, Yichun Xu, Jian Zhao, Piyush Sud, Seung Ju Kim, Han-Ting Liao, Ye Zhuo, Rivu Midya, Shiva Asapu, Dawei Gao, Zixuan Rong, Qinru Qiu, Cynthia Bowers, Krishnamurthy Mahalingam, S. Ganguli, A. K. Roy, Qing Wu, Jin-Woo Han, R. Stanley Williams, Yong Chen, J. Joshua Yang","doi":"10.1038/s41928-025-01488-x","DOIUrl":"10.1038/s41928-025-01488-x","url":null,"abstract":"Neuromorphic computing could be used to create artificial intelligence with high compactness and efficiency. However, complementary metal–oxide–semiconductor (CMOS) circuits are inherently different to biological neurons, and intricate CMOS circuits are needed to realize neuromorphic behaviours. Diffusive memristors are based on ion dynamics and have similarities with biological neurons. They could, thus, be used to create energy- and area-efficient neuromorphic systems. Here we describe a spiking artificial neuron comprising one diffusive memristor, one transistor and one resistor (1M1T1R), which occupies the footprint of a single transistor when vertically integrated. Our neuron exhibits six key neuronal characteristics: leaky integration, threshold firing, cascaded connection, intrinsic plasticity, refractory period and stochasticity. The energy consumption of our 1M1T1R neuron reaches the picojoule per spike level and could reach attojoule per spike levels with further scaling. We simulate a recurrent spiking neural network based on our artificial neuron model and show the impact of the key neuronal characteristics on system performance. An artificial neuron that is based on one diffusive memristor, one transistor and one resistor can exhibit six key biological neuronal characteristics—leaky integration, threshold firing, cascaded connection, intrinsic plasticity, refractory period and stochasticity—with the footprint of a single transistor when vertically integrated.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 12","pages":"1211-1221"},"PeriodicalIF":40.9,"publicationDate":"2025-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145381962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-27DOI: 10.1038/s41928-025-01497-w
Characterizing the performance and assessing the technological potential of devices based on emerging semiconductors such as perovskites is challenging. Third-party certification processes, as well as more standardized approaches to device testing, could help.
{"title":"Emerging characterization challenges","authors":"","doi":"10.1038/s41928-025-01497-w","DOIUrl":"10.1038/s41928-025-01497-w","url":null,"abstract":"Characterizing the performance and assessing the technological potential of devices based on emerging semiconductors such as perovskites is challenging. Third-party certification processes, as well as more standardized approaches to device testing, could help.","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 10","pages":"872-872"},"PeriodicalIF":40.9,"publicationDate":"2025-10-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.nature.comhttps://www.nature.com/articles/s41928-025-01497-w.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145371973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-10-20DOI: 10.1038/s41928-025-01492-1
Yan Huang
{"title":"Implantable fibres made of rolled-up electronics","authors":"Yan Huang","doi":"10.1038/s41928-025-01492-1","DOIUrl":"10.1038/s41928-025-01492-1","url":null,"abstract":"","PeriodicalId":19064,"journal":{"name":"Nature Electronics","volume":"8 10","pages":"877-877"},"PeriodicalIF":40.9,"publicationDate":"2025-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145371974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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