Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516047
S. Hasegawa, A. Yamano, N. S. Ahn, N. Cha, T. Kanki, H. Tanaka, H. Asahi
We have investigated the selective area growth of InP on nano-patterned Si substrates with SiO2 mask by molecular beam epitaxy. By optimizing the growth conditions, the growth of one separate InP single crystallite for each Si opening has been accomplished. It is found that when single crystallites coalesced into larger grains beyond Si openings, lattice strains were introduced in the grains because of the difference in thermal expansion coefficient between Si and InP. This clearly shows that the growth of one InP single crystallite for each Si opening is indispensable for growing stress- and defect-free InP regions on SiO2 towards the application to next generation MOSFETs as the channel materials.
{"title":"Selective area growth of InP on nano-patterned SiO2/Si(100) substrates by molecular beam epitaxy","authors":"S. Hasegawa, A. Yamano, N. S. Ahn, N. Cha, T. Kanki, H. Tanaka, H. Asahi","doi":"10.1109/ICIPRM.2010.5516047","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516047","url":null,"abstract":"We have investigated the selective area growth of InP on nano-patterned Si substrates with SiO2 mask by molecular beam epitaxy. By optimizing the growth conditions, the growth of one separate InP single crystallite for each Si opening has been accomplished. It is found that when single crystallites coalesced into larger grains beyond Si openings, lattice strains were introduced in the grains because of the difference in thermal expansion coefficient between Si and InP. This clearly shows that the growth of one InP single crystallite for each Si opening is indispensable for growing stress- and defect-free InP regions on SiO2 towards the application to next generation MOSFETs as the channel materials.","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115369740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516377
A. Tchegho, B. Muenstermann, C. Gutsche, A. Poloczek, K. Blekker, Werner Prost, F. Tegude
InP-based double-barrier resonant tunnelling diodes have been optimized for high speed digital circuits. We present the scalability of high current density (JP ≈ 150 kA/cm2;) resonant tunnelling diodes in the sub-micrometer electrode area range. A small signal equivalent circuit has been developed and its parameters are precisely deduced from DC and RF measurements. Based on this model the scalability has been investigated with emphasis on a low but also scalable series resistance in order to keep the peak voltage constant. A comparison of dry and wet etching methods in the device fabrication will be presented. A multiple mesa concept has been adopted to provide reliable scalability at low emitter area (AE < 1 µm2).
{"title":"Scalable high-current density RTDs with low series resistance","authors":"A. Tchegho, B. Muenstermann, C. Gutsche, A. Poloczek, K. Blekker, Werner Prost, F. Tegude","doi":"10.1109/ICIPRM.2010.5516377","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516377","url":null,"abstract":"InP-based double-barrier resonant tunnelling diodes have been optimized for high speed digital circuits. We present the scalability of high current density (JP ≈ 150 kA/cm2;) resonant tunnelling diodes in the sub-micrometer electrode area range. A small signal equivalent circuit has been developed and its parameters are precisely deduced from DC and RF measurements. Based on this model the scalability has been investigated with emphasis on a low but also scalable series resistance in order to keep the peak voltage constant. A comparison of dry and wet etching methods in the device fabrication will be presented. A multiple mesa concept has been adopted to provide reliable scalability at low emitter area (AE < 1 µm2).","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"198 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115728506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516039
Yukihiro Seki, Yanzhe Wang, Q. Thieu, S. Kuboya, S. Sanorpim, K. Onabe
Dilute-nitride alloy InPN films have been grown by metalorganic vapor phase epitaxy (MOVPE), and the N incorporation behavior is investigated by varying the major growth parameters. The grown-surface morphologies show that the 2-dimensional (2D) growth with atomically flat surfaces is obtained at 460–500°C with relatively high P supplies. The XRD analyses show that the N incorporation increases for lower growth temperatures and higher N/P ratios, and the N concentration up to 0.18% has been attained. The 150–170 nm-thick InPN films are coherently grown on InP(001) without lattice relaxation.
{"title":"MOVPE growth of InPN films on InP(001) substrates","authors":"Yukihiro Seki, Yanzhe Wang, Q. Thieu, S. Kuboya, S. Sanorpim, K. Onabe","doi":"10.1109/ICIPRM.2010.5516039","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516039","url":null,"abstract":"Dilute-nitride alloy InPN films have been grown by metalorganic vapor phase epitaxy (MOVPE), and the N incorporation behavior is investigated by varying the major growth parameters. The grown-surface morphologies show that the 2-dimensional (2D) growth with atomically flat surfaces is obtained at 460–500°C with relatively high P supplies. The XRD analyses show that the N incorporation increases for lower growth temperatures and higher N/P ratios, and the N concentration up to 0.18% has been attained. The 150–170 nm-thick InPN films are coherently grown on InP(001) without lattice relaxation.","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"260 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115889070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516285
B. Kunert, K. Volz, W. Stolz
The novel direct band gap, dilute nitride Ga(NAsP)-material system allows for the first time the monolithic integration of a III/V laser material lattice matched to Si substrate. This lattice-matched approach offers the possibility for a high-quality, low defect density integration of a III/V-laser material potentially leading to long-term stable laser devices on Si-substrate. The present paper introduces this novel integration approach and discuss the monolithically growth in line with optical properties of first laser devices grown on exactly oriented (001) Si substrates.
{"title":"Advances in the growth of lattice-matched III-V compounds on Si for optoelectronics","authors":"B. Kunert, K. Volz, W. Stolz","doi":"10.1109/ICIPRM.2010.5516285","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516285","url":null,"abstract":"The novel direct band gap, dilute nitride Ga(NAsP)-material system allows for the first time the monolithic integration of a III/V laser material lattice matched to Si substrate. This lattice-matched approach offers the possibility for a high-quality, low defect density integration of a III/V-laser material potentially leading to long-term stable laser devices on Si-substrate. The present paper introduces this novel integration approach and discuss the monolithically growth in line with optical properties of first laser devices grown on exactly oriented (001) Si substrates.","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"221 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122863616","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516172
S. A. Sayid, I. Marko, S. Sweeney, P. Poole
Semiconductor lasers with quantum dot (QD) based active regions have generated a huge amount of interest for applications including communications networks due to their anticipated superior physical properties due to three dimensional carrier confinement. For example, the threshold current of ideal quantum dots is predicted to be temperature insensitive [1]. We have investigated the operating characteristics of 1.55 µm InAs/InP (100) quantum dot lasers focusing on their carrier recombination characteristics using a combination of low temperature and high pressure measurements. By measuring the intrinsic spontaneous emission from a window fabricated in the n-contact of the devices we have measured the radiative component of the threshold current density, Jrad. We find that Jrad is itself relatively temperature insensitive (Fig. 1). However, the total threshold current density, Jth, increases significantly with temperature leading to a characteristic temperature T0~72K around 220K-290K. From this data it is clear that the devices are dominated by a non-radiative recombination process which accounts for up to 94% of the threshold current at room temperature (Fig. 1).
{"title":"Temperature sensitivity of 1.55μm (100) InAs/InP-based quantum dot lasers","authors":"S. A. Sayid, I. Marko, S. Sweeney, P. Poole","doi":"10.1109/ICIPRM.2010.5516172","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516172","url":null,"abstract":"Semiconductor lasers with quantum dot (QD) based active regions have generated a huge amount of interest for applications including communications networks due to their anticipated superior physical properties due to three dimensional carrier confinement. For example, the threshold current of ideal quantum dots is predicted to be temperature insensitive [1]. We have investigated the operating characteristics of 1.55 µm InAs/InP (100) quantum dot lasers focusing on their carrier recombination characteristics using a combination of low temperature and high pressure measurements. By measuring the intrinsic spontaneous emission from a window fabricated in the n-contact of the devices we have measured the radiative component of the threshold current density, Jrad. We find that Jrad is itself relatively temperature insensitive (Fig. 1). However, the total threshold current density, Jth, increases significantly with temperature leading to a characteristic temperature T0~72K around 220K-290K. From this data it is clear that the devices are dominated by a non-radiative recombination process which accounts for up to 94% of the threshold current at room temperature (Fig. 1).","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125314146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516389
J. Mateos, H. Marinchio, C. Palermo, L. Varani, T. González
In this work, by means of Monte Carlo simulations we analyze the dependence of the DC drain current value in a 80nm-gate InAlAs/InGaAs HEMTs on the frequency of a sinusoidal signal superimposed to the DC gate bias. Interestingly, a resonant peak appears in the drain current response, which lies in the THz frequency range, in good agreement with recent experiments made on similar devices. Moreover, the frequency of the resonant peak is dependent on the length of the source-gate region, but independent of the length of the drain-gate region, thus indicating that the source-gate region acts as the plasma wave cavity leading to the resonant detection of THz radiation in HEMTs.
{"title":"Plasma-resonant THz detection with HEMTs","authors":"J. Mateos, H. Marinchio, C. Palermo, L. Varani, T. González","doi":"10.1109/ICIPRM.2010.5516389","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516389","url":null,"abstract":"In this work, by means of Monte Carlo simulations we analyze the dependence of the DC drain current value in a 80nm-gate InAlAs/InGaAs HEMTs on the frequency of a sinusoidal signal superimposed to the DC gate bias. Interestingly, a resonant peak appears in the drain current response, which lies in the THz frequency range, in good agreement with recent experiments made on similar devices. Moreover, the frequency of the resonant peak is dependent on the length of the source-gate region, but independent of the length of the drain-gate region, thus indicating that the source-gate region acts as the plasma wave cavity leading to the resonant detection of THz radiation in HEMTs.","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131306160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516213
T. Yoshimatsu, Y. Muramoto, S. Kodama, T. Furuta, N. Shigekawa, H. Yokoyama, T. Ishibashi
A novel maximized-induced-current-photodiode (MIC-PD) structure with a composite field depletion layer achieves high responsivity of 0.8 A/W and a wide 3-dB bandwidth of 30 GHz at a low reverse bias voltage of 2 V for optical input power of +7 dBm.
{"title":"Composite-field MIC-PDs for low-bias-voltage operation","authors":"T. Yoshimatsu, Y. Muramoto, S. Kodama, T. Furuta, N. Shigekawa, H. Yokoyama, T. Ishibashi","doi":"10.1109/ICIPRM.2010.5516213","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516213","url":null,"abstract":"A novel maximized-induced-current-photodiode (MIC-PD) structure with a composite field depletion layer achieves high responsivity of 0.8 A/W and a wide 3-dB bandwidth of 30 GHz at a low reverse bias voltage of 2 V for optical input power of +7 dBm.","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132752008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516402
Che-Kai Lin, Chao-Wei Lin, Yi-chun Wu, H. Chiu
In this work, we have fabricated the first transparent gate using sputtered ITO/Au/ITO composite films InAlAs/InGaAs metamorphic HEMT (CTG-MHEMT) on GaAs substrate. The CTG-MHEMT has been demonstrated to increase front side optical coupling efficiency as an optoelectronic mixer. By optimizing the bias condition, the optoelectronic mixing efficiency can be enhanced. The photodetection mechanism of CTG-MHEMT is clarified by investigating the internal photovoltaic gain (Gpv) and photoconductance gain (Gpc). For comparison of the optical characteristics, the transparent gate MHEMT (TG-MHEMT) has been fabricated. The CTG-MHEMT as an optoelectronic mixer is a promising candidate that can simplify the base station architecture in fiber-optic microwave transmission systems.
{"title":"An optoelectronic mixer based on composite transparent gate InAlAs/InGaAs metamorphic HEMT","authors":"Che-Kai Lin, Chao-Wei Lin, Yi-chun Wu, H. Chiu","doi":"10.1109/ICIPRM.2010.5516402","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516402","url":null,"abstract":"In this work, we have fabricated the first transparent gate using sputtered ITO/Au/ITO composite films InAlAs/InGaAs metamorphic HEMT (CTG-MHEMT) on GaAs substrate. The CTG-MHEMT has been demonstrated to increase front side optical coupling efficiency as an optoelectronic mixer. By optimizing the bias condition, the optoelectronic mixing efficiency can be enhanced. The photodetection mechanism of CTG-MHEMT is clarified by investigating the internal photovoltaic gain (Gpv) and photoconductance gain (Gpc). For comparison of the optical characteristics, the transparent gate MHEMT (TG-MHEMT) has been fabricated. The CTG-MHEMT as an optoelectronic mixer is a promising candidate that can simplify the base station architecture in fiber-optic microwave transmission systems.","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133461148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516261
M. Yokoyama, T. Yasuda, H. Takagi, Y. Urabe, H. Ishii, N. Miyata, H. Yamada, N. Fukuhara, M. Hata, M. Sugiyama, Y. Nakano, M. Takenaka, S. Takagi
We have developed III-V-OI MISFETs on Si with buried SiO2 and Al2O3 layers fabricated by low damage and low temperature direct wafer bonding processes. The III-V-OI MISFETs with both buried SiO2 and Al2O3 layers have demonstrated the high electron mobility of 1200 cm2/Vs. In addition, we found that the buried Al2O3 layers can improve the interface condition between III-V and the buried oxide layers, leading to the higher electron mobility of III-V-OI MISFETs even in the high electric field than that of Si MOSFETs. These high performance transistors will open up the way to the future high performance logic LSI systems.
通过低损伤和低温直接晶圆键合工艺，我们开发了埋置SiO2和Al2O3层的Si - v - oi型misfet。埋埋SiO2和Al2O3层的III-V-OI型misfet显示出1200 cm2/Vs的高电子迁移率。此外，我们发现埋置Al2O3层可以改善III-V和埋置氧化层之间的界面条件，导致III-V- oi misfet在高电场下的电子迁移率高于Si mosfet。这些高性能晶体管将为未来的高性能逻辑大规模集成电路系统开辟道路。
{"title":"III-V-semiconductor-on-insulator MISFETs on Si with buried SiO2 and Al2O3 layers by direct wafer bonding","authors":"M. Yokoyama, T. Yasuda, H. Takagi, Y. Urabe, H. Ishii, N. Miyata, H. Yamada, N. Fukuhara, M. Hata, M. Sugiyama, Y. Nakano, M. Takenaka, S. Takagi","doi":"10.1109/ICIPRM.2010.5516261","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516261","url":null,"abstract":"We have developed III-V-OI MISFETs on Si with buried SiO<inf>2</inf> and Al<inf>2</inf>O<inf>3</inf> layers fabricated by low damage and low temperature direct wafer bonding processes. The III-V-OI MISFETs with both buried SiO<inf>2</inf> and Al<inf>2</inf>O<inf>3</inf> layers have demonstrated the high electron mobility of 1200 cm<sup>2</sup>/Vs. In addition, we found that the buried Al<inf>2</inf>O<inf>3</inf> layers can improve the interface condition between III-V and the buried oxide layers, leading to the higher electron mobility of III-V-OI MISFETs even in the high electric field than that of Si MOSFETs. These high performance transistors will open up the way to the future high performance logic LSI systems.","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133672181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-07-23DOI: 10.1109/ICIPRM.2010.5516241
S. Raman, Tsu-Hsi Chang, C. L. Dohrman, M. Rosker
The COmpound Semiconductor Materials On Silicon (COSMOS) program of the U.S. Defense Advanced Research Projects Agency (DARPA) focuses on developing transistor-scale heterogeneous integration processes to intimately combine advanced compound semiconductor (CS) devices with high-density silicon circuits. The technical approaches being explored in this program include high-density micro assembly, monolithic epitaxial growth, and epitaxial layer printing processes. In Phase I of the program, performers successfully demonstrated world-record differential amplifiers through heterogeneous integration of InP HBTs with commercially fabricated CMOS circuits. In the current Phase II, complex wideband, large dynamic range, high-speed digital-to-analog convertors (DACs) are under development based on the above heterogeneous integration approaches. These DAC designs will utilize InP HBTs in the critical high-speed, high-voltage swing circuit blocks and will employ sophisticated in situ digital correction techniques enabled by CMOS transistors. This paper will also discuss the Phase III program plan as well as future directions for heterogeneous integration technology that will benefit mixed signal circuit applications.
{"title":"The DARPA COSMOS program: The convergence of InP and Silicon CMOS technologies for high-performance mixed-signal","authors":"S. Raman, Tsu-Hsi Chang, C. L. Dohrman, M. Rosker","doi":"10.1109/ICIPRM.2010.5516241","DOIUrl":"https://doi.org/10.1109/ICIPRM.2010.5516241","url":null,"abstract":"The COmpound Semiconductor Materials On Silicon (COSMOS) program of the U.S. Defense Advanced Research Projects Agency (DARPA) focuses on developing transistor-scale heterogeneous integration processes to intimately combine advanced compound semiconductor (CS) devices with high-density silicon circuits. The technical approaches being explored in this program include high-density micro assembly, monolithic epitaxial growth, and epitaxial layer printing processes. In Phase I of the program, performers successfully demonstrated world-record differential amplifiers through heterogeneous integration of InP HBTs with commercially fabricated CMOS circuits. In the current Phase II, complex wideband, large dynamic range, high-speed digital-to-analog convertors (DACs) are under development based on the above heterogeneous integration approaches. These DAC designs will utilize InP HBTs in the critical high-speed, high-voltage swing circuit blocks and will employ sophisticated in situ digital correction techniques enabled by CMOS transistors. This paper will also discuss the Phase III program plan as well as future directions for heterogeneous integration technology that will benefit mixed signal circuit applications.","PeriodicalId":197102,"journal":{"name":"2010 22nd International Conference on Indium Phosphide and Related Materials (IPRM)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133655623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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