Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189158
Y. Pai, H. Lin, M. Peckerar
Ion-implantation decreases the dark saturation current by virtue of increase in barrier height for thermionic emission at the metal semiconductor contact and decrease in the thermal generation of minority carriers in the implanted layer. The current transport is analyzed by considering the transmission velocity at the contact and the drift and diffusion of minority carriers in the implanted layer. The computed result shows quantitatively how ion-implantation can suppress the thermionic emission and minimize the dark saturation current. Ion-implantation also makes the structure insensitive to surface conditions of the semiconductor.
{"title":"Current transport in ion-implanted MIS solar cells","authors":"Y. Pai, H. Lin, M. Peckerar","doi":"10.1109/IEDM.1977.189158","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189158","url":null,"abstract":"Ion-implantation decreases the dark saturation current by virtue of increase in barrier height for thermionic emission at the metal semiconductor contact and decrease in the thermal generation of minority carriers in the implanted layer. The current transport is analyzed by considering the transmission velocity at the contact and the drift and diffusion of minority carriers in the implanted layer. The computed result shows quantitatively how ion-implantation can suppress the thermionic emission and minimize the dark saturation current. Ion-implantation also makes the structure insensitive to surface conditions of the semiconductor.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126713146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189319
E. Barrowcliff, L. Bubulac, D. Cheung, W. Tennant, A. M. Andrews
The metal-insulator-semiconductor FET (MISFET) principle was demonstrated for the first time in a new material, GaSb. P-channel insulated-gate gallium antimonide field-effect transistors (GaSb MISFETS) were fabricated and characterized in a wide range of operating temperatures. Such devices are important as basic building blocks for self-scanned 1.8µm imagers for night vision applications. The GaSb MISFETS are planar, closed-geometry devices. The GaSb substrates are oriented and Te-doped to ND ≈ 2×1017cm-3. The source and drain were formed by either Be-implantation or Zn-diffusion. Aluminum is used for both gate electrode and source and drain contacts. Low temperature pyrolytic silicon dioxide was used as gate insulator. The GaSb MISFETS are enhancement devices which follow the ideal MOSFET current-voltage characteristics (i.e., ID α (VG-VTH)2). The threshold voltages vary linearly from ∼ 0 volts to -14 volts as temperature decreases from 300K to 12K. Surface hole mobility of 188 cm2/V-sec was obtained at 300K.
{"title":"GaSb metal-insulator-semiconductor field-effect-transistors","authors":"E. Barrowcliff, L. Bubulac, D. Cheung, W. Tennant, A. M. Andrews","doi":"10.1109/IEDM.1977.189319","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189319","url":null,"abstract":"The metal-insulator-semiconductor FET (MISFET) principle was demonstrated for the first time in a new material, GaSb. P-channel insulated-gate gallium antimonide field-effect transistors (GaSb MISFETS) were fabricated and characterized in a wide range of operating temperatures. Such devices are important as basic building blocks for self-scanned 1.8µm imagers for night vision applications. The GaSb MISFETS are planar, closed-geometry devices. The GaSb substrates are oriented and Te-doped to ND ≈ 2×1017cm-3. The source and drain were formed by either Be-implantation or Zn-diffusion. Aluminum is used for both gate electrode and source and drain contacts. Low temperature pyrolytic silicon dioxide was used as gate insulator. The GaSb MISFETS are enhancement devices which follow the ideal MOSFET current-voltage characteristics (i.e., ID α (VG-VTH)2). The threshold voltages vary linearly from ∼ 0 volts to -14 volts as temperature decreases from 300K to 12K. Surface hole mobility of 188 cm2/V-sec was obtained at 300K.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126521421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189139
Y. Tarui
This report will review recent advancements in LSI and VLSI research in Japan, especially concerning the basic technology useful for microfabrica-tion. The first computer controlled vector scan electron beam exposure system in Japan was reported in 1967. Recently the variable-area rectangular technique has been experimentally pursued. Another group is working on probe forming by quadrupole lenses. In the processing field, a high frequency plasma system, a plasma transport system, and a high pressure oxidation system are under development. Various self-aligning devices, like Diffusion Self-Alignment, Multiple Wall Self-Alignment, and those which work near punch-through regions are described.
{"title":"LSI and VLSI research in Japan","authors":"Y. Tarui","doi":"10.1109/IEDM.1977.189139","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189139","url":null,"abstract":"This report will review recent advancements in LSI and VLSI research in Japan, especially concerning the basic technology useful for microfabrica-tion. The first computer controlled vector scan electron beam exposure system in Japan was reported in 1967. Recently the variable-area rectangular technique has been experimentally pursued. Another group is working on probe forming by quadrupole lenses. In the processing field, a high frequency plasma system, a plasma transport system, and a high pressure oxidation system are under development. Various self-aligning devices, like Diffusion Self-Alignment, Multiple Wall Self-Alignment, and those which work near punch-through regions are described.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125210404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189258
J. H. Scholtz, J. Vaszari
This paper describes a 200 watt CW Ka-band coupled-cavity traveling-wave tube developed for a communication ground terminal application. This tube, designated the 914H, was developed by Hughes Aircraft EDD under a program funded by the United States Army Satellite Command. Art Wachtenheim is the sponsor of the program. The 914H operates over a band of from 30 to 31 GHz with less than 1 dB of gain variation over the entire 1 GHz hot band. A very high basic efficiency of 18% at center band has been achieved. Tube features include air cooling, PPM focusing, mod anode electron gun, depressed collector, and poker chip windows. A unique mechanical configuration in which the magnetic focusing structure is added externally to the vacuum envelope was used to fabricate the RF circuit. Cavity design and circuit configuration were developed by exploiting a number of computer design programs. The circuit configuration is a two-section design.
{"title":"An air cooled 200 watt CW TWT at 30.5 GHz with high interaction efficiency","authors":"J. H. Scholtz, J. Vaszari","doi":"10.1109/IEDM.1977.189258","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189258","url":null,"abstract":"This paper describes a 200 watt CW Ka-band coupled-cavity traveling-wave tube developed for a communication ground terminal application. This tube, designated the 914H, was developed by Hughes Aircraft EDD under a program funded by the United States Army Satellite Command. Art Wachtenheim is the sponsor of the program. The 914H operates over a band of from 30 to 31 GHz with less than 1 dB of gain variation over the entire 1 GHz hot band. A very high basic efficiency of 18% at center band has been achieved. Tube features include air cooling, PPM focusing, mod anode electron gun, depressed collector, and poker chip windows. A unique mechanical configuration in which the magnetic focusing structure is added externally to the vacuum envelope was used to fabricate the RF circuit. Cavity design and circuit configuration were developed by exploiting a number of computer design programs. The circuit configuration is a two-section design.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"256 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122502657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189223
R. C. Sun, J. Clemens
An experimental study has been performed with respect to the characterization of dynamic charge storage in MOS RAM circuits. Results of this investigation indicate that the deleterious effects of metallically decorated crystal defects can be successfully minimized by the design of proper impurity gettering cycles. Furthermore, it has been shown that the resulting p-n junction and MOS reverse-bias leakage currents of optimally processed structures are solely dominated at elevated temperature (T≥40°C) by the inherent diffusion currents (Ea≈1.1 eV). This type of leakage current is not only a function of the Si substrate parameters, but is also area and geometry dependent; and the implications of this upon RAM design, layout, and testing are discussed.
{"title":"Characterization of reverse-bias leakage currents and their effect on the holding time characteristics of MOS dynamic RAM circuits","authors":"R. C. Sun, J. Clemens","doi":"10.1109/IEDM.1977.189223","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189223","url":null,"abstract":"An experimental study has been performed with respect to the characterization of dynamic charge storage in MOS RAM circuits. Results of this investigation indicate that the deleterious effects of metallically decorated crystal defects can be successfully minimized by the design of proper impurity gettering cycles. Furthermore, it has been shown that the resulting p-n junction and MOS reverse-bias leakage currents of optimally processed structures are solely dominated at elevated temperature (T≥40°C) by the inherent diffusion currents (Ea≈1.1 eV). This type of leakage current is not only a function of the Si substrate parameters, but is also area and geometry dependent; and the implications of this upon RAM design, layout, and testing are discussed.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122104643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189269
H. Shibata, H. Iwasaki, T. Oku, Y. Tarui
The fabrication procedure and device characteristics of the new structure of the MOS FET, Multiple Walls Self-Aligned MOS FET (MSA MOS), are described. These techniques provided a novel production method for the advanced self-aligned MOST, which are especially suitable for super short channel MOS FET. Two closely spaced photoresist walls, which are photolithographically formed on a silicon wafer, protect the narrow region between the walls against the obliquely incident ion beams. By applying this shadowing effect to ion beam etching and the ion implantation process, the positions of the source, drain, gate and their electrodes can at last be delineated by only a single photomask or one step electron beam exposure. This process will reduce the dimensions of MOS FET, resulting in further integration in MOS LSI. By using the MSA process procedure, poly silicon gate MOS FETs with a gate length of 1µm to 3µm are fabricated and tested. These transistors show good performance.
{"title":"A new fabrication method of short channel MOS FET-multiple walls self-aligned MOS FET","authors":"H. Shibata, H. Iwasaki, T. Oku, Y. Tarui","doi":"10.1109/IEDM.1977.189269","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189269","url":null,"abstract":"The fabrication procedure and device characteristics of the new structure of the MOS FET, Multiple Walls Self-Aligned MOS FET (MSA MOS), are described. These techniques provided a novel production method for the advanced self-aligned MOST, which are especially suitable for super short channel MOS FET. Two closely spaced photoresist walls, which are photolithographically formed on a silicon wafer, protect the narrow region between the walls against the obliquely incident ion beams. By applying this shadowing effect to ion beam etching and the ion implantation process, the positions of the source, drain, gate and their electrodes can at last be delineated by only a single photomask or one step electron beam exposure. This process will reduce the dimensions of MOS FET, resulting in further integration in MOS LSI. By using the MSA process procedure, poly silicon gate MOS FETs with a gate length of 1µm to 3µm are fabricated and tested. These transistors show good performance.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"376 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124697118","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189210
D. Carlson
Amorphous silicon (a-Si) solar cells have been fabricated in SiH4glow discharges containing various impurity gases such as N2, H2O, CH4, etc. The effect of these impurity gases on the photovoltaic properties are discussed. Experimental data are also presented for the variation of photovoltaic properties with deposition temperature, annealing temperature in air, and temperature during operation.
{"title":"The effects of impurities and temperature on amorphous silicon solar cells","authors":"D. Carlson","doi":"10.1109/IEDM.1977.189210","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189210","url":null,"abstract":"Amorphous silicon (a-Si) solar cells have been fabricated in SiH4glow discharges containing various impurity gases such as N2, H2O, CH4, etc. The effect of these impurity gases on the photovoltaic properties are discussed. Experimental data are also presented for the variation of photovoltaic properties with deposition temperature, annealing temperature in air, and temperature during operation.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121135561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189318
M. Moulin, P. Felix, B. Munier, J. Reboul, N.T. Linhn
Metal-insulator-semiconductor (MIS) capacitors (Al/Al2O3/p-PbTe and Al/MgO/p-PbTe) on PbTe single crystals have been investigated for 5 micron infrared detection. The PbTe comes from Czochraslki single crystals, annealed to lower the carrier concentration. The insulator layers are e-beam deposited Al2O3and MgO. The C(V) curves of these MIS were checked at 77 K. The p-type semiconductor is depleted at zero bias and the flat-band voltage is from 4 to 10 volts for 1500 A° of insulator. The curves indicate a PbTe carrier concentration near 1016cm-3, in agreement with junction characteristic measurements on the same wafers. Transient capacitance measurements on these MIS capacitors give a transient or storage time of 1 to 5 ms, with a 77 K background. Measurements of conductance and variation of conductance with frequency give a lifetime in PbTe of 0,8 to 2 ns. We conclude that such MIS capacitors can be used for IR detection in PbTe with charge-injection readout.
{"title":"MIS capacitors on PbTe for 5 micron infrared detection","authors":"M. Moulin, P. Felix, B. Munier, J. Reboul, N.T. Linhn","doi":"10.1109/IEDM.1977.189318","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189318","url":null,"abstract":"Metal-insulator-semiconductor (MIS) capacitors (Al/Al2O3/p-PbTe and Al/MgO/p-PbTe) on PbTe single crystals have been investigated for 5 micron infrared detection. The PbTe comes from Czochraslki single crystals, annealed to lower the carrier concentration. The insulator layers are e-beam deposited Al2O3and MgO. The C(V) curves of these MIS were checked at 77 K. The p-type semiconductor is depleted at zero bias and the flat-band voltage is from 4 to 10 volts for 1500 A° of insulator. The curves indicate a PbTe carrier concentration near 1016cm-3, in agreement with junction characteristic measurements on the same wafers. Transient capacitance measurements on these MIS capacitors give a transient or storage time of 1 to 5 ms, with a 77 K background. Measurements of conductance and variation of conductance with frequency give a lifetime in PbTe of 0,8 to 2 ns. We conclude that such MIS capacitors can be used for IR detection in PbTe with charge-injection readout.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128388674","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189238
W. Anheier, W. Engl, R. Sittig
A one dimensional transient analysis for the distribution of carriers and potential within a power thyristor was carried out. The simulation is based on geometrical, technological and physical data obtained from an actual device structure. The 11-A thyristor CS 106 has an area of .02 cm2and a thickness of 265 microns. The simulation includes all known physical mechanisms which are important for power devices, e.g. SRH- and Auger recombination avalanche multiplication, and mobility saturation effects. The results of this numerical approach show different internal mechanisms, which are identified with the different time delays of the turn-on wave forms.
{"title":"Numerical analysis of gate triggered SCR turn-on transients","authors":"W. Anheier, W. Engl, R. Sittig","doi":"10.1109/IEDM.1977.189238","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189238","url":null,"abstract":"A one dimensional transient analysis for the distribution of carriers and potential within a power thyristor was carried out. The simulation is based on geometrical, technological and physical data obtained from an actual device structure. The 11-A thyristor CS 106 has an area of .02 cm2and a thickness of 265 microns. The simulation includes all known physical mechanisms which are important for power devices, e.g. SRH- and Auger recombination avalanche multiplication, and mobility saturation effects. The results of this numerical approach show different internal mechanisms, which are identified with the different time delays of the turn-on wave forms.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130909916","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1977.189247
H. Morkoç, S. Bandy, R. Sankaran, G. Antypas
DC, small signal microwave, and large signal switching performance of normally-ON heterojunction Al.5Ga.5As gate, GaAs FETs (N-ON HJFET) with submicron gate dimensions are reported. Ge-doped p-type Al.5Ga.5As and p+-type GaAs layers are grown by liquid phase epitaxy (LPE) on an n-type active channel layer grown by vapor phase epitaxy (VPE). The submicron gate structure is obtained by selectively etching first the GaAs layer and later the Al.5Ga.5As layer. The resulting GaAs overhang is used to self align the source and the drain with respect to the gate. Devices with about 0.6 micron gate length exhibit a maximum available power gain (MAG) of about 9.5 dB at 8 GHz. Large signal pulse measurements indicate an intrinsic propagation delay of 20 psec.
{"title":"An Al.5Ga.5As gate heterojunction microwave FET","authors":"H. Morkoç, S. Bandy, R. Sankaran, G. Antypas","doi":"10.1109/IEDM.1977.189247","DOIUrl":"https://doi.org/10.1109/IEDM.1977.189247","url":null,"abstract":"DC, small signal microwave, and large signal switching performance of normally-ON heterojunction Al.5Ga.5As gate, GaAs FETs (N-ON HJFET) with submicron gate dimensions are reported. Ge-doped p-type Al.5Ga.5As and p+-type GaAs layers are grown by liquid phase epitaxy (LPE) on an n-type active channel layer grown by vapor phase epitaxy (VPE). The submicron gate structure is obtained by selectively etching first the GaAs layer and later the Al.5Ga.5As layer. The resulting GaAs overhang is used to self align the source and the drain with respect to the gate. Devices with about 0.6 micron gate length exhibit a maximum available power gain (MAG) of about 9.5 dB at 8 GHz. Large signal pulse measurements indicate an intrinsic propagation delay of 20 psec.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"2013 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130164504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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