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2018 13th European Microwave Integrated Circuits Conference (EuMIC)最新文献

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A Source and Drain Transient Currents Technique for Trap Characterisation in AIGaN/GaN HEMTs AIGaN/GaN hemt的源极和漏极瞬态电流表征技术
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539935
S. Duffy, B. Benbakhti, W. Zhang, K. Kalna, K. Ahmeda, M. Boucherta, N. Bourzgui, H. Maher, A. Soltani
The source/drain and gate induced charge trapping within an AIGaN/GaN high electron mobility transistor is studied, under normal device operation, by excluding self-heating effects, for the first time. Through direct measurement of current transients of both source and drain terminals, a characterisation technique has been developed to: (i) analyse the transient current degradations from μS to seconds, and (ii) evaluate the drain and gate induced charge trapping mechanisms. Two degradation mechanisms of current are observed: bulk trapping at a short time <1ms); and surface trapping and redistribution (>lms). The bulk charge trapping is found to occur during both ON and OFF states of the device when Vns>0V; where its trapping time constant is independent of bias conditions. In addition, the time constant of the slower current degradation is found to be mainly dependent on surface trapping and redistribution, not by the second heat transient.
本文首次在排除自热效应的情况下,研究了AIGaN/GaN高电子迁移率晶体管的源极/漏极和栅极感应电荷捕获。通过直接测量源极和漏极的瞬态电流,开发了一种表征技术:(i)分析瞬态电流从μS到秒的衰减,(ii)评估漏极和栅极诱导电荷捕获机制。观察到电流的两种降解机制:短时间内的大块捕获(lms)。当Vns>0V时,在器件的ON和OFF状态均发生大量电荷捕获;其中其俘获时间常数与偏置条件无关。此外,发现较慢的电流降解的时间常数主要依赖于表面捕获和重新分配,而不是由第二次热瞬态。
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引用次数: 2
Characterization of Bond Wire Interconnects in QFN Packages QFN封装中键合线互连的表征
Pub Date : 2018-09-01 DOI: 10.23919/eumc.2018.8541807
Q. Xiao
This paper discusses models and measurements of bond wire interconnects in Quad-Flat No-lead (QFN) packages. A bond wire interconnect between a 3 mm, 14-lead QFN lead frame and a GaAs chip is used as an example to demonstrate the modelling and measurement process. Measurement results are compared with extracted models and electromagnetic (EM) simulations to verify model and simulation accuracy. Based on the extracted simplified model, theoretical bandwidth limitations of bond wire interconnects are discussed.
本文讨论了四平无引线封装中键合线互连的模型和测量方法。以3mm 14引线QFN引线框架与GaAs芯片之间的键合线互连为例,演示了建模和测量过程。测量结果与提取的模型和电磁仿真进行了比较,验证了模型和仿真的准确性。基于提取的简化模型,讨论了键合线互连的理论带宽限制。
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引用次数: 0
Broadband GaN-Based Power Amplifier MMIC and Module for V-Band Measurement Applications 用于v波段测量应用的宽带gan功率放大器MMIC和模块
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539940
D. Schwantuschke, P. Brückner, R. Amirpour, A. Tessmann, M. Kuri, M. Riessle, H. Massler, R. Quay
This work presents a balanced GaN-based power amplifier targeting the entire V-band frequency range. The fabricated chip was packaged in a split block WR-15 waveguide environment to make it applicable for high-power measurement applications. The designed GaN MMIC provides a high small-signal gain of more than 20 dB within a frequency range of 49 GHz up to 83 GHz. On-wafer large-signal measurements of the MMIC at 75 GHz demonstrate a linear gain of 26.3 dB, along with a saturated output power of 29.3 dBm (850 mW) and a maximum power added efficiency of 13.5 % For the assembled module, an average saturated output power of 28.1 dBm (645 mW) within a variance of ±0.4 dB has been measured for the entire V-band (50–75 GHz).
本文提出了一种针对整个v波段频率范围的平衡型氮化镓功率放大器。该芯片封装在WR-15分块波导环境中,使其适用于高功率测量应用。设计的GaN MMIC在49 GHz至83 GHz的频率范围内提供超过20 dB的高小信号增益。MMIC在75 GHz的片上大信号测量显示线性增益为26.3 dB,饱和输出功率为29.3 dBm (850 mW),最大功率增加效率为13.5%。对于组装模块,在整个v波段(50-75 GHz)测量到的平均饱和输出功率为28.1 dBm (645 mW),误差为±0.4 dB。
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引用次数: 4
A W-Band Frequency Tripler with Integrated Waveguide Filter Matching 一种集成波导滤波器匹配的w波段三倍频器
Pub Date : 2018-09-01 DOI: 10.23919/eumc.2018.8541657
Cheng Guo, J. Powell, X. Shang, M. Lancaster, Jun Xu, C. Viegas
A W-band Schottky diode based frequency tripler which uses waveguide resonator filters for low loss impedance matching is presented in this paper. Impedance matching of the diodes is achieved by scaling the external quality factors and adjusting the resonant frequencies of the filter cavities. This removes most of the matching structures from the high loss microstrip circuit to the lower loss waveguide resonators. Here the output frequency of the tripler is set to be 90 GHz with a 10% bandwidth. The simulation shows a conversion loss of 13-13.8 dB in the pass-band with an input power of 13–20 dBm. The measured conversion loss over the pass-band is 13.6 −15.8 dB for 17 dBm input power and better than 14 dB at 90 GHz for 13–20 dBm input power.
本文提出了一种基于肖特基二极管的w波段三倍频器,该三倍频器采用波导谐振器滤波器进行低损耗阻抗匹配。二极管的阻抗匹配是通过缩放外部质量因子和调整滤波器腔的谐振频率来实现的。这将大部分匹配结构从高损耗微带电路转移到低损耗波导谐振器。这里,三倍器的输出频率设置为90 GHz,带宽为10%。仿真结果表明,当输入功率为13 ~ 20 dBm时,通带的转换损耗为13 ~ 13.8 dB。当输入功率为17dbm时,通频带转换损耗为13.6 ~ 15.8 dB;当输入功率为13 ~ 20dbm时,通频带转换损耗优于14db。
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引用次数: 0
Three-Path SiGe BiCMOS LNA on Thinned Silicon Substrate for IoT Applications 物联网应用的薄硅衬底上的三路SiGe BiCMOS LNA
Pub Date : 2018-09-01 DOI: 10.23919/eumc.2018.8541760
Sefa Özbek, M. Grözing, G. Alavi, J. Burghartz, M. Berroth
This paper reports on a design methodology and measurement results of a fully integrated low noise amplifier (LNA) on a thinned substrate for Internet of Things (IoT) applications. Several key RF performance parameters of the LNA with different substrate thickness are evaluated through full-wave electromagnetic (EM) simulations. The proposed LNA operating at 5.5 GHz is fabricated in a cost-effective 0.25 μm SiGe BiCMOS technology (IHP process SGB25V; ft = 75 GHz). The Si chip is thinned to ~38 μm in order to be embedded seamlessly into a flexible foil system. The small-signal gain of the LNA, measured on the chuck is 14.32 dB before thinning. The measured center frequency on the thin silicon (thickness of 38 μm) is shifted about 700 MHz towards higher frequencies compared to the thick silicon due to the image mirror currents within the conducting material at the backside of the chip. The measured noise figure (NF) with the thick and thin substrate on the conducting material is around 3.36 dB at 5.5 GHz and 3.74 dB at 6.3 GHz., respectively.
本文报道了用于物联网(IoT)应用的薄基板上的全集成低噪声放大器(LNA)的设计方法和测量结果。通过全波仿真,评估了不同衬底厚度下LNA的几个关键射频性能参数。所提出的工作频率为5.5 GHz的LNA采用具有成本效益的0.25 μm SiGe BiCMOS技术(IHP工艺SGB25V;ft = 75 GHz)。为了无缝嵌入到柔性箔系统中,硅芯片被薄至~38 μm。在卡盘上测量的LNA的小信号增益在变薄之前为14.32 dB。由于芯片背面导电材料内部的镜像电流,薄硅(厚度为38 μm)上的中心频率比厚硅上的中心频率向更高的频率偏移了约700 MHz。测量的噪声系数(NF)在5.5 GHz时约为3.36 dB,在6.3 GHz时约为3.74 dB。,分别。
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引用次数: 0
Madrid 2018
Pub Date : 2018-09-01 DOI: 10.23919/eumic.2018.8539860
G. Castillo
Las profesoras de la Universidad Complutense de Madrid, Eva Aladro y Paula Requeijo, han coordinado una obra ineludible, actual y sumamente interesante, sobre la comunicación y el marketing político en España, a partir del fin del bipartidismo tradicional. En ella, profesores e investigadores de la Universidad Complutense de Madrid y la Universidad de Sevilla analizan la comunicación de los grandes partidos nacionales en el nuevo escenario: desde el papel protagonista que ha cobrado el infoentretenimiento, hasta la centralita de las redes sociales, pasando por los debates electorales televisados o la representación de la mujer política.
马德里康普卢腾斯大学(computense university of Madrid)的教授伊娃·阿德罗(Eva Aladro)和Paula Requeijo协调了一项不可避免的、当前的、非常有趣的工作,内容是关于西班牙传统两党主义结束后的沟通和政治营销。,马德里康普鲁坦斯大学教师和研究人员分析和塞维利亚大学提交来文时大国家党在新的场景:从主角作用已infoentretenimiento、直到交换机的选举辩论的社交网络,通过电视台或妇女政治代表权。
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引用次数: 0
Frequency Domain-Based Method for a Two-Port Nonlinear Quasi-Static Model Extraction from Large-Signal Waveforms 基于频域的大信号波形双端口非线性准静态模型提取方法
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539894
Sergio Pérez-Parras, T. Martín-Guerrero, J. D. Baños-Polglase, C. Camacho-Peñalosa
A method for separating the conduction and displacement current components out of quasi-static nonlinear current sources controlled by two variables is described herein. The method is based on a frequency domain formulation and has been tested by analysing a simple nonlinear current model. A distinctive characteristic of the method is that it does not require any integration of incremental capacitances.
本文描述了一种从两个变量控制的准静态非线性电流源中分离传导和位移电流分量的方法。该方法基于频域公式,并通过分析一个简单的非线性电流模型进行了验证。该方法的一个显著特点是它不需要对增量电容进行任何积分。
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引用次数: 5
Sparse Model Selection of Digital Predistorters Using Subspace Pursuit 基于子空间追踪的数字预失真器稀疏模型选择
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539910
Juan A. Becerra, Daniel Herrera, M. J. Madero-Ayora, C. Crespo-Cadenas
This communication presents a new technique for the digital predistortion of power amplifiers (PAs) based on sparse behavioral models. The subspace pursuit algorithm formulation is adapted to work in the nonlinear series framework. Experiments driven on a test bench based on a GaN PA driven by a 15-MHz filter bank multicarrier (FBM C) signal were conducted in order to validate the algorithm. Experimental results in a digital predistortion scenario and the comparison with the orthogonal matching pursuit highlight the enhancement of this pruning method.
本文提出了一种基于稀疏行为模型的功率放大器数字预失真新技术。该子空间追踪算法公式适用于非线性序列框架。为了验证该算法的有效性,在15 mhz滤波器组多载波(FBM C)信号驱动的GaN - PA测试台上进行了实验。在数字预失真场景下的实验结果以及与正交匹配追踪的比较表明了该剪枝方法的增强效果。
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引用次数: 4
A Broadband 4–18 GHz Active Quadrature Hybrid 宽带4 - 18ghz有源正交混合电路
Pub Date : 2018-09-01 DOI: 10.23919/eumic.2018.8539897
P. Sangaré, C. Loyez, K. Carpentier, Markus Mayer, Dirk Hartung, François Parickmiler, N. Rolland
This paper presents an innovative topology of a broadband active quadrature hybrid. This novel architecture consists of a traveling wave amplifier with a unique coupling mechanism, providing amplitude flatness and low phase imbalance over the 4–18 GHz frequency band. Experimental results validate the performance of such a hybrid over more than 2 frequency octaves.
本文提出了一种创新的宽带有源正交混合拓扑结构。这种新颖的结构由一个具有独特耦合机制的行波放大器组成,在4-18 GHz频段内提供幅度平坦和低相位不平衡。实验结果验证了该混合电路在2倍频以上的性能。
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引用次数: 0
Compensation of Performance Degradation due to Thermal Effects in GaN LNA Using Dynamic Bias 利用动态偏置补偿GaN LNA中热效应导致的性能退化
Pub Date : 2018-09-01 DOI: 10.23919/eumc.2018.8541789
J. Bremer, L. Hanning, N. Rorsman, M. Thorsell
This paper investigates the possibilities of using a dynamic bias control scheme for a low noise amplifier to compensate for performance degradation due to thermal effects. The study was performed by characterization of bias voltage and temperature dependence between −25°C to 75°C of a GaN MMIC LNA. The performance, in terms of gain, linearity and noise, degraded, at elevated chip temperatures. Nonlinear behavioral models were developed and used to predict performance for different bias and temperature conditions. Bias conditions to achieve constant gain and noise figure versus temperature are determined. Enhanced RF performance, with improved gain and linearity is demonstrated and is shown to require increased power and involves a trade-off between improving noise figure and gain.
本文研究了在低噪声放大器中使用动态偏置控制方案来补偿由于热效应而导致的性能下降的可能性。该研究通过表征GaN MMIC LNA在- 25°C至75°C之间的偏置电压和温度依赖性来进行。在芯片温度升高的情况下,从增益、线性度和噪声方面来看,性能都有所下降。建立了非线性行为模型,并用于预测不同偏差和温度条件下的性能。确定了实现恒定增益和噪声系数随温度变化的偏置条件。增强的射频性能,改善增益和线性度,显示需要增加功率,并涉及改善噪声系数和增益之间的权衡。
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引用次数: 0
期刊
2018 13th European Microwave Integrated Circuits Conference (EuMIC)
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