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2018 13th European Microwave Integrated Circuits Conference (EuMIC)最新文献

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A 120 GHz SiGe BiCMOS Monostatic Transceiver for Radar Applications 用于雷达应用的120 GHz SiGe BiCMOS单站收发器
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539874
Efe Öztürk, D. Genschow, U. Yodprasit, Berk Yilmaz, D. Kissinger, W. Debski, W. Winkler
This paper focuses on the design and measurement results of a 120 GHz monostatic transceiver system for FMCW radar applications. The fully integrated chip is fabricated using 0.13 μm SiGe BiCMOS technology with fT/fmax of 250/340 GHz and occupies only an area of 1.33×0.73mm2, With a current consumption of 270 mA from a 3.3 V single supply, this fully differential transceiver is composed of an I/Q receiver, which has 11.8 dB of conversion gain and −16.6 dBm of input referred P1dB, and a transmitter with 2.6 dBm saturated output power having a 4-bit push-push type VCO integrated to a divide-by-32 block. Furthermore, TX and RX channels are isolated with a very compact front coupler so that the monostatic operation is possible with a single antenna input. As a built-in-self-test block, the transmitted power on transmitter chain is monitored through a two stage power detector by a branch-line-coupler. With the help of a small sized 3×3 cm2 HDPE lens and a compact antenna, the proposed fully integrated monostatic transceiver could detect obstacles above 100 m and proves its suitability for ISM band 120 GHz FMCW radar applications.
本文重点介绍了一种用于FMCW雷达的120 GHz单站收发系统的设计和测试结果。完全集成芯片是用0.13μm锗硅BiCMOS技术制作的《金融时报》/ fmax 250/340 GHz和只占面积1.33×0.73平方毫米,270毫安的电流消耗从3.3 V单供应,这充分微分收发器是由I / Q接收机,转换11.8 dB的增益和−16.6 dBm的输入P1dB,发射机,2.6 dBm饱和输出功率有4比特推广推广类型集成VCO divide-by-32块。此外,TX和RX通道通过非常紧凑的前耦合器隔离,因此可以使用单个天线输入进行单稳态操作。作为内置自检模块,发射链上的发射功率通过分支线耦合器的二级功率检测器进行监测。利用3×3 cm2的小尺寸HDPE透镜和紧凑的天线,所提出的全集成单站收发器可以探测到100米以上的障碍物,并证明了其适用于ISM频段120 GHz FMCW雷达应用。
{"title":"A 120 GHz SiGe BiCMOS Monostatic Transceiver for Radar Applications","authors":"Efe Öztürk, D. Genschow, U. Yodprasit, Berk Yilmaz, D. Kissinger, W. Debski, W. Winkler","doi":"10.23919/EUMIC.2018.8539874","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539874","url":null,"abstract":"This paper focuses on the design and measurement results of a 120 GHz monostatic transceiver system for FMCW radar applications. The fully integrated chip is fabricated using 0.13 μm SiGe BiCMOS technology with fT/fmax of 250/340 GHz and occupies only an area of 1.33×0.73mm2, With a current consumption of 270 mA from a 3.3 V single supply, this fully differential transceiver is composed of an I/Q receiver, which has 11.8 dB of conversion gain and −16.6 dBm of input referred P1dB, and a transmitter with 2.6 dBm saturated output power having a 4-bit push-push type VCO integrated to a divide-by-32 block. Furthermore, TX and RX channels are isolated with a very compact front coupler so that the monostatic operation is possible with a single antenna input. As a built-in-self-test block, the transmitted power on transmitter chain is monitored through a two stage power detector by a branch-line-coupler. With the help of a small sized 3×3 cm2 HDPE lens and a compact antenna, the proposed fully integrated monostatic transceiver could detect obstacles above 100 m and proves its suitability for ISM band 120 GHz FMCW radar applications.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126223947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Industrial 0.15-μm AlGaN/GaN on SiC Technology for Applications up to Ka Band 工业0.15-μm AlGaN/GaN在SiC技术上的应用高达Ka波段
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539905
V. Di Giacomo-Brunel, E. Byk, C. Chang, J. Grünenpütt, B. Lambert, G. Mouginot, D. Sommer, H. Jung, M. Camiade, P. Fellon, D. Floriot, H. Blanck, J. Viaud
This paper describes the main characteristics of the new GaN-on-SiC technology in development at UMS. This technology is based on a $0.15 - mu mathrm{m}$ gate-length and it is in the phase of industrial qualification for a target release by the end of the year. The results of two out of four demonstrators already successfully designed on the new technology are also reported: a 29.5–36 Ghz 9W HPA and a 15.5–18.5 GHz 20W HPA.
本文介绍了UMS正在开发的新型GaN-on-SiC技术的主要特点。这项技术基于$0.15 - mu maththrm {m}$的门长,目前正处于行业资格认证阶段,目标是在今年年底发布。已经成功设计的四个演示器中的两个也报告了新技术的结果:29.5-36 Ghz 9W HPA和15.5-18.5 Ghz 20W HPA。
{"title":"Industrial 0.15-μm AlGaN/GaN on SiC Technology for Applications up to Ka Band","authors":"V. Di Giacomo-Brunel, E. Byk, C. Chang, J. Grünenpütt, B. Lambert, G. Mouginot, D. Sommer, H. Jung, M. Camiade, P. Fellon, D. Floriot, H. Blanck, J. Viaud","doi":"10.23919/EUMIC.2018.8539905","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539905","url":null,"abstract":"This paper describes the main characteristics of the new GaN-on-SiC technology in development at UMS. This technology is based on a $0.15 - mu mathrm{m}$ gate-length and it is in the phase of industrial qualification for a target release by the end of the year. The results of two out of four demonstrators already successfully designed on the new technology are also reported: a 29.5–36 Ghz 9W HPA and a 15.5–18.5 GHz 20W HPA.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125704457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 23
A 0.3 V −190.2 dBc/Hz FoM 14-GHz Band LC-VCO IC with Harmonic Tuned LC Tank in 56-nm SOI CMOS 带谐波调谐LC槽的FoM 14ghz LC- vco集成电路,采用56nm SOI CMOS
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539876
Xiao Xu, T. Sugiura, T. Yoshimasu
This paper presents a 14-GHz band ultra-low-power low-phase-noise VCO IC with a novel harmonic tuned LC tank consisting of a conventional LC tank and additional series inductors. The additional inductor is connected between the drain of the cross-coupled pMOSFET and the conventional LC tank circuit to adjust the harmonic impedance and to shape the drain voltage waveform rectangular. The adjusted load impedance improves the phase noise of the VCO IC. The conventional and proposed VCOs are designed, fabricated and fully measured on-wafer in 56-nm SOI CMOS technology. The fabricated VCO IC has exhibited a measured phase-noise of − 125.7 dBc/Hz at 10 MHz offset from the 13.46 GHz carrier frequency at a supply voltage of only 0.3 V. The power consumption of the VCO IC core is 0.63 mW and the FoM is − 190.2 dBc/Hz.
提出了一种14ghz频段超低功耗低相位噪声压控集成电路,该电路采用一种新型谐波调谐LC槽,由传统LC槽和附加的串联电感组成。附加电感连接在交叉耦合pMOSFET的漏极和传统LC槽电路之间,以调节谐波阻抗并使漏极电压波形呈矩形。采用56纳米SOI CMOS技术设计、制造了传统的和所提出的VCO芯片,并对其进行了完整的片上测量。所制备的VCO集成电路在电源电压仅为0.3 V时,在13.46 GHz载波频率的10 MHz偏移处显示出- 125.7 dBc/Hz的相位噪声。VCO芯线功耗为0.63 mW, FoM为−190.2 dBc/Hz。
{"title":"A 0.3 V −190.2 dBc/Hz FoM 14-GHz Band LC-VCO IC with Harmonic Tuned LC Tank in 56-nm SOI CMOS","authors":"Xiao Xu, T. Sugiura, T. Yoshimasu","doi":"10.23919/EUMIC.2018.8539876","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539876","url":null,"abstract":"This paper presents a 14-GHz band ultra-low-power low-phase-noise VCO IC with a novel harmonic tuned LC tank consisting of a conventional LC tank and additional series inductors. The additional inductor is connected between the drain of the cross-coupled pMOSFET and the conventional LC tank circuit to adjust the harmonic impedance and to shape the drain voltage waveform rectangular. The adjusted load impedance improves the phase noise of the VCO IC. The conventional and proposed VCOs are designed, fabricated and fully measured on-wafer in 56-nm SOI CMOS technology. The fabricated VCO IC has exhibited a measured phase-noise of − 125.7 dBc/Hz at 10 MHz offset from the 13.46 GHz carrier frequency at a supply voltage of only 0.3 V. The power consumption of the VCO IC core is 0.63 mW and the FoM is − 190.2 dBc/Hz.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122939223","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Characterization and Electrical Modeling Including Trapping Effects of AIN/GaN HEMT 4×50μm on Silicon Substrate AIN/GaN HEMT 4×50μm在硅衬底上的俘获效应表征和电建模
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539941
M. Bouslama, A. Al Hajjar, R. Sommet, F. Medjdoub, J. Nallatamby
This paper reports the full characterization and modeling of novel AlN/GaN HEMTs on silicon using a short gate length. This device has been optimized for high frequency analog circuits applications. The presented model includes DC and small-signal modeling steps taking into account the trapping effects. It contains a trap model inside the current source which allows to accurately predict gate-lag transient response and low frequency dispersion of the output admittance. The model is validated by comparing the 4 GHz load-pull measurement results with the simulation ones.
本文报道了使用短栅极长度的新型硅上AlN/GaN hemt的完整表征和建模。该器件已针对高频模拟电路应用进行了优化。该模型包括考虑捕获效应的直流和小信号建模步骤。它在电流源内部包含一个陷阱模型,可以准确地预测门滞后瞬态响应和输出导纳的低频色散。通过4ghz负载-拉力测量结果与仿真结果的对比,验证了该模型的有效性。
{"title":"Characterization and Electrical Modeling Including Trapping Effects of AIN/GaN HEMT 4×50μm on Silicon Substrate","authors":"M. Bouslama, A. Al Hajjar, R. Sommet, F. Medjdoub, J. Nallatamby","doi":"10.23919/EUMIC.2018.8539941","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539941","url":null,"abstract":"This paper reports the full characterization and modeling of novel AlN/GaN HEMTs on silicon using a short gate length. This device has been optimized for high frequency analog circuits applications. The presented model includes DC and small-signal modeling steps taking into account the trapping effects. It contains a trap model inside the current source which allows to accurately predict gate-lag transient response and low frequency dispersion of the output admittance. The model is validated by comparing the 4 GHz load-pull measurement results with the simulation ones.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134608680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
On Stability Analysis and Loop Oscillation of Multi-Finger GaN FET Cells for High Power Amplifiers 大功率放大器用多指氮化镓场效应晶体管的稳定性分析及回路振荡
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539867
A. Issaoun, P. Hammes, M. Fagerlind, F. Chai, T. Roedle
Highly optimized multi-finger GaN HEMT's are prone to internal oscillations or odd-modes. Developing tools to detect and suppress these oscillations is of great help for GaN device designers. This manuscript proposes an internal oscillations detection technique based on a FET small-signal equivalent circuit coupled to Electromagnetic (EM) simulations. Then, a stability analysis technique is applied on the developed transfer function. The approach is demonstrated on three 8-finger cells using three different stability analysis techniques. All outcomes of the used stability techniques align which proves the accuracy of the developed approach.
高度优化的多指GaN HEMT容易出现内部振荡或奇模。开发工具来检测和抑制这些振荡对GaN器件设计人员有很大的帮助。本文提出了一种基于场效应管小信号等效电路耦合电磁仿真的内振荡检测技术。然后,将稳定性分析技术应用于所建立的传递函数。该方法使用三种不同的稳定性分析技术在三个8指细胞上进行了演示。所使用的稳定性技术的所有结果都一致,证明了所开发方法的准确性。
{"title":"On Stability Analysis and Loop Oscillation of Multi-Finger GaN FET Cells for High Power Amplifiers","authors":"A. Issaoun, P. Hammes, M. Fagerlind, F. Chai, T. Roedle","doi":"10.23919/EUMIC.2018.8539867","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539867","url":null,"abstract":"Highly optimized multi-finger GaN HEMT's are prone to internal oscillations or odd-modes. Developing tools to detect and suppress these oscillations is of great help for GaN device designers. This manuscript proposes an internal oscillations detection technique based on a FET small-signal equivalent circuit coupled to Electromagnetic (EM) simulations. Then, a stability analysis technique is applied on the developed transfer function. The approach is demonstrated on three 8-finger cells using three different stability analysis techniques. All outcomes of the used stability techniques align which proves the accuracy of the developed approach.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117187523","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A Hetero-Integrated W-Band Transmitter Module in InP-on-BiCMOS Technology 基于InP-on-BiCMOS技术的w波段异质集成发射模块
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539915
M. Hossain, M. Eissa, M. Hrobak, D. Stoppel, N. Weimann, A. Malignaggi, A. Mai, D. Kissinger, W. Heinrich, V. Krozer
This paper presents a W -band hetero-integrated transmitter module using InP-on-BiCMOS technology. It consists of a Phase Locked Loop (PLL) in 0.25 μm BiCMOS technology and a frequency multiplier followed by a double-balanced Gilbert mixer cell in 0.8 μm InP-HBT technology, which is integrated on top of the BiCMOS MMIC in a wafer-level BCB bonding process. The PLL operates from 45 GHz to 47 GHz and the module achieves a measured single sideband (SSB) power conversion loss of 20 dB and 22 dB at 88 GHz and 95 GHz, respectively, limited by the output power from the PLL source. The entire circuit consumes 434 mW DC power. The chip area of the module is 2.5×1.3 mm2, To the knowledge of the authors, this is the first complex hetero-Integrated module reported so far.
本文提出了一种采用InP-on-BiCMOS技术的W波段异质集成发射机模块。它由一个0.25 μm BiCMOS技术的锁相环(PLL)和一个倍频器组成,随后是一个0.8 μm InP-HBT技术的双平衡Gilbert混频器单元,该单元集成在BiCMOS MMIC之上,采用晶圆级BCB键合工艺。锁相环的工作频率为45 GHz至47 GHz,受锁相环源输出功率的限制,该模块在88 GHz和95 GHz频段分别实现了20 dB和22 dB的实测单边带(SSB)功率转换损耗。整个电路消耗434兆瓦的直流功率。该模块的芯片面积为2.5×1.3 mm2,据作者所知,这是迄今为止报道的第一个复杂的异质集成模块。
{"title":"A Hetero-Integrated W-Band Transmitter Module in InP-on-BiCMOS Technology","authors":"M. Hossain, M. Eissa, M. Hrobak, D. Stoppel, N. Weimann, A. Malignaggi, A. Mai, D. Kissinger, W. Heinrich, V. Krozer","doi":"10.23919/EUMIC.2018.8539915","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539915","url":null,"abstract":"This paper presents a W -band hetero-integrated transmitter module using InP-on-BiCMOS technology. It consists of a Phase Locked Loop (PLL) in 0.25 μm BiCMOS technology and a frequency multiplier followed by a double-balanced Gilbert mixer cell in 0.8 μm InP-HBT technology, which is integrated on top of the BiCMOS MMIC in a wafer-level BCB bonding process. The PLL operates from 45 GHz to 47 GHz and the module achieves a measured single sideband (SSB) power conversion loss of 20 dB and 22 dB at 88 GHz and 95 GHz, respectively, limited by the output power from the PLL source. The entire circuit consumes 434 mW DC power. The chip area of the module is 2.5×1.3 mm2, To the knowledge of the authors, this is the first complex hetero-Integrated module reported so far.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"371 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116229484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Three-Path SiGe BiCMOS LNA on Thinned Silicon Substrate for IoT Applications 物联网应用的薄硅衬底上的三路SiGe BiCMOS LNA
Pub Date : 2018-09-01 DOI: 10.23919/eumc.2018.8541760
Sefa Özbek, M. Grözing, G. Alavi, J. Burghartz, M. Berroth
This paper reports on a design methodology and measurement results of a fully integrated low noise amplifier (LNA) on a thinned substrate for Internet of Things (IoT) applications. Several key RF performance parameters of the LNA with different substrate thickness are evaluated through full-wave electromagnetic (EM) simulations. The proposed LNA operating at 5.5 GHz is fabricated in a cost-effective 0.25 μm SiGe BiCMOS technology (IHP process SGB25V; ft = 75 GHz). The Si chip is thinned to ~38 μm in order to be embedded seamlessly into a flexible foil system. The small-signal gain of the LNA, measured on the chuck is 14.32 dB before thinning. The measured center frequency on the thin silicon (thickness of 38 μm) is shifted about 700 MHz towards higher frequencies compared to the thick silicon due to the image mirror currents within the conducting material at the backside of the chip. The measured noise figure (NF) with the thick and thin substrate on the conducting material is around 3.36 dB at 5.5 GHz and 3.74 dB at 6.3 GHz., respectively.
本文报道了用于物联网(IoT)应用的薄基板上的全集成低噪声放大器(LNA)的设计方法和测量结果。通过全波仿真,评估了不同衬底厚度下LNA的几个关键射频性能参数。所提出的工作频率为5.5 GHz的LNA采用具有成本效益的0.25 μm SiGe BiCMOS技术(IHP工艺SGB25V;ft = 75 GHz)。为了无缝嵌入到柔性箔系统中,硅芯片被薄至~38 μm。在卡盘上测量的LNA的小信号增益在变薄之前为14.32 dB。由于芯片背面导电材料内部的镜像电流,薄硅(厚度为38 μm)上的中心频率比厚硅上的中心频率向更高的频率偏移了约700 MHz。测量的噪声系数(NF)在5.5 GHz时约为3.36 dB,在6.3 GHz时约为3.74 dB。,分别。
{"title":"Three-Path SiGe BiCMOS LNA on Thinned Silicon Substrate for IoT Applications","authors":"Sefa Özbek, M. Grözing, G. Alavi, J. Burghartz, M. Berroth","doi":"10.23919/eumc.2018.8541760","DOIUrl":"https://doi.org/10.23919/eumc.2018.8541760","url":null,"abstract":"This paper reports on a design methodology and measurement results of a fully integrated low noise amplifier (LNA) on a thinned substrate for Internet of Things (IoT) applications. Several key RF performance parameters of the LNA with different substrate thickness are evaluated through full-wave electromagnetic (EM) simulations. The proposed LNA operating at 5.5 GHz is fabricated in a cost-effective 0.25 μm SiGe BiCMOS technology (IHP process SGB25V; ft = 75 GHz). The Si chip is thinned to ~38 μm in order to be embedded seamlessly into a flexible foil system. The small-signal gain of the LNA, measured on the chuck is 14.32 dB before thinning. The measured center frequency on the thin silicon (thickness of 38 μm) is shifted about 700 MHz towards higher frequencies compared to the thick silicon due to the image mirror currents within the conducting material at the backside of the chip. The measured noise figure (NF) with the thick and thin substrate on the conducting material is around 3.36 dB at 5.5 GHz and 3.74 dB at 6.3 GHz., respectively.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122991098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Source and Drain Transient Currents Technique for Trap Characterisation in AIGaN/GaN HEMTs AIGaN/GaN hemt的源极和漏极瞬态电流表征技术
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539935
S. Duffy, B. Benbakhti, W. Zhang, K. Kalna, K. Ahmeda, M. Boucherta, N. Bourzgui, H. Maher, A. Soltani
The source/drain and gate induced charge trapping within an AIGaN/GaN high electron mobility transistor is studied, under normal device operation, by excluding self-heating effects, for the first time. Through direct measurement of current transients of both source and drain terminals, a characterisation technique has been developed to: (i) analyse the transient current degradations from μS to seconds, and (ii) evaluate the drain and gate induced charge trapping mechanisms. Two degradation mechanisms of current are observed: bulk trapping at a short time <1ms); and surface trapping and redistribution (>lms). The bulk charge trapping is found to occur during both ON and OFF states of the device when Vns>0V; where its trapping time constant is independent of bias conditions. In addition, the time constant of the slower current degradation is found to be mainly dependent on surface trapping and redistribution, not by the second heat transient.
本文首次在排除自热效应的情况下,研究了AIGaN/GaN高电子迁移率晶体管的源极/漏极和栅极感应电荷捕获。通过直接测量源极和漏极的瞬态电流,开发了一种表征技术:(i)分析瞬态电流从μS到秒的衰减,(ii)评估漏极和栅极诱导电荷捕获机制。观察到电流的两种降解机制:短时间内的大块捕获(lms)。当Vns>0V时,在器件的ON和OFF状态均发生大量电荷捕获;其中其俘获时间常数与偏置条件无关。此外,发现较慢的电流降解的时间常数主要依赖于表面捕获和重新分配,而不是由第二次热瞬态。
{"title":"A Source and Drain Transient Currents Technique for Trap Characterisation in AIGaN/GaN HEMTs","authors":"S. Duffy, B. Benbakhti, W. Zhang, K. Kalna, K. Ahmeda, M. Boucherta, N. Bourzgui, H. Maher, A. Soltani","doi":"10.23919/EUMIC.2018.8539935","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539935","url":null,"abstract":"The source/drain and gate induced charge trapping within an AIGaN/GaN high electron mobility transistor is studied, under normal device operation, by excluding self-heating effects, for the first time. Through direct measurement of current transients of both source and drain terminals, a characterisation technique has been developed to: (i) analyse the transient current degradations from μS to seconds, and (ii) evaluate the drain and gate induced charge trapping mechanisms. Two degradation mechanisms of current are observed: bulk trapping at a short time <1ms); and surface trapping and redistribution (>lms). The bulk charge trapping is found to occur during both ON and OFF states of the device when Vns>0V; where its trapping time constant is independent of bias conditions. In addition, the time constant of the slower current degradation is found to be mainly dependent on surface trapping and redistribution, not by the second heat transient.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121780691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A W-Band Frequency Tripler with Integrated Waveguide Filter Matching 一种集成波导滤波器匹配的w波段三倍频器
Pub Date : 2018-09-01 DOI: 10.23919/eumc.2018.8541657
Cheng Guo, J. Powell, X. Shang, M. Lancaster, Jun Xu, C. Viegas
A W-band Schottky diode based frequency tripler which uses waveguide resonator filters for low loss impedance matching is presented in this paper. Impedance matching of the diodes is achieved by scaling the external quality factors and adjusting the resonant frequencies of the filter cavities. This removes most of the matching structures from the high loss microstrip circuit to the lower loss waveguide resonators. Here the output frequency of the tripler is set to be 90 GHz with a 10% bandwidth. The simulation shows a conversion loss of 13-13.8 dB in the pass-band with an input power of 13–20 dBm. The measured conversion loss over the pass-band is 13.6 −15.8 dB for 17 dBm input power and better than 14 dB at 90 GHz for 13–20 dBm input power.
本文提出了一种基于肖特基二极管的w波段三倍频器,该三倍频器采用波导谐振器滤波器进行低损耗阻抗匹配。二极管的阻抗匹配是通过缩放外部质量因子和调整滤波器腔的谐振频率来实现的。这将大部分匹配结构从高损耗微带电路转移到低损耗波导谐振器。这里,三倍器的输出频率设置为90 GHz,带宽为10%。仿真结果表明,当输入功率为13 ~ 20 dBm时,通带的转换损耗为13 ~ 13.8 dB。当输入功率为17dbm时,通频带转换损耗为13.6 ~ 15.8 dB;当输入功率为13 ~ 20dbm时,通频带转换损耗优于14db。
{"title":"A W-Band Frequency Tripler with Integrated Waveguide Filter Matching","authors":"Cheng Guo, J. Powell, X. Shang, M. Lancaster, Jun Xu, C. Viegas","doi":"10.23919/eumc.2018.8541657","DOIUrl":"https://doi.org/10.23919/eumc.2018.8541657","url":null,"abstract":"A W-band Schottky diode based frequency tripler which uses waveguide resonator filters for low loss impedance matching is presented in this paper. Impedance matching of the diodes is achieved by scaling the external quality factors and adjusting the resonant frequencies of the filter cavities. This removes most of the matching structures from the high loss microstrip circuit to the lower loss waveguide resonators. Here the output frequency of the tripler is set to be 90 GHz with a 10% bandwidth. The simulation shows a conversion loss of 13-13.8 dB in the pass-band with an input power of 13–20 dBm. The measured conversion loss over the pass-band is 13.6 −15.8 dB for 17 dBm input power and better than 14 dB at 90 GHz for 13–20 dBm input power.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"241 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121872349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Broadband GaN-Based Power Amplifier MMIC and Module for V-Band Measurement Applications 用于v波段测量应用的宽带gan功率放大器MMIC和模块
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539940
D. Schwantuschke, P. Brückner, R. Amirpour, A. Tessmann, M. Kuri, M. Riessle, H. Massler, R. Quay
This work presents a balanced GaN-based power amplifier targeting the entire V-band frequency range. The fabricated chip was packaged in a split block WR-15 waveguide environment to make it applicable for high-power measurement applications. The designed GaN MMIC provides a high small-signal gain of more than 20 dB within a frequency range of 49 GHz up to 83 GHz. On-wafer large-signal measurements of the MMIC at 75 GHz demonstrate a linear gain of 26.3 dB, along with a saturated output power of 29.3 dBm (850 mW) and a maximum power added efficiency of 13.5 % For the assembled module, an average saturated output power of 28.1 dBm (645 mW) within a variance of ±0.4 dB has been measured for the entire V-band (50–75 GHz).
本文提出了一种针对整个v波段频率范围的平衡型氮化镓功率放大器。该芯片封装在WR-15分块波导环境中,使其适用于高功率测量应用。设计的GaN MMIC在49 GHz至83 GHz的频率范围内提供超过20 dB的高小信号增益。MMIC在75 GHz的片上大信号测量显示线性增益为26.3 dB,饱和输出功率为29.3 dBm (850 mW),最大功率增加效率为13.5%。对于组装模块,在整个v波段(50-75 GHz)测量到的平均饱和输出功率为28.1 dBm (645 mW),误差为±0.4 dB。
{"title":"Broadband GaN-Based Power Amplifier MMIC and Module for V-Band Measurement Applications","authors":"D. Schwantuschke, P. Brückner, R. Amirpour, A. Tessmann, M. Kuri, M. Riessle, H. Massler, R. Quay","doi":"10.23919/EUMIC.2018.8539940","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539940","url":null,"abstract":"This work presents a balanced GaN-based power amplifier targeting the entire V-band frequency range. The fabricated chip was packaged in a split block WR-15 waveguide environment to make it applicable for high-power measurement applications. The designed GaN MMIC provides a high small-signal gain of more than 20 dB within a frequency range of 49 GHz up to 83 GHz. On-wafer large-signal measurements of the MMIC at 75 GHz demonstrate a linear gain of 26.3 dB, along with a saturated output power of 29.3 dBm (850 mW) and a maximum power added efficiency of 13.5 % For the assembled module, an average saturated output power of 28.1 dBm (645 mW) within a variance of ±0.4 dB has been measured for the entire V-band (50–75 GHz).","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129898452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
期刊
2018 13th European Microwave Integrated Circuits Conference (EuMIC)
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