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2018 13th European Microwave Integrated Circuits Conference (EuMIC)最新文献

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A S-band 3D Surface Mount Packaged SiGe and GaN Tx Module Using Flip-Chip Bonding and a Device Embedded PCB Substrate 一种s波段3D表面贴装封装SiGe和GaN Tx模块,采用倒装键合和器件嵌入式PCB基板
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539907
K. Kawasaki, E. Kuwata, Hidenori Ishibashi, T. Yao, Kiyoshi Ishida, Kazuhiro Maeda, H. Shibata, M. Tsuru, K. Mori, M. Shimozawa, H. Fukumoto
This paper demonstrates a S-band 3D surface mount packaged Si and GaN Tx Module using flip-chip bonding and a chip embedded PCB Substrate. In order to integrate heterogeneous SiGe and GaN chips in a single package, 3D-structure is employed. The GaN chip is embedded in the PCB substrate and the SiGe chip is flip-chip bonded on the GaN embedded PCB Substrate. The Tx module includes a 5bit phase shifter, a 5bit VGA, a driver amplifier, and a power amplifier. The package size is occupying 7×7mm2• The developed Tx module achieves phase and amplitude error of less than 1.3 degrees-rms., and 0.36dB rms., and an output power of30dBm, respectively.
本文演示了一种s波段3D表面贴装封装的Si和GaN Tx模块,该模块使用倒装键合和芯片嵌入PCB衬底。为了在单一封装中集成异构SiGe和GaN芯片,采用了3d结构。GaN芯片嵌入在PCB衬底中,SiGe芯片倒装在GaN嵌入的PCB衬底上。Tx模块包括一个5位移相器、一个5位VGA、一个驱动放大器和一个功率放大器。•开发的Tx模块相位和幅度误差小于1.3度-rms。, 0.36dB rms。输出功率分别为30dbm。
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引用次数: 1
Single-Ended Branch PA Characterisation for Outphasing Amplifiers 反相放大器的单端支路PA特性
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539963
Paolo Enrico de Falco, K. Mimis, S. B. Smida, Kevin Morris, G. Watkins, A. Yamaoka, K. Yamaguchi
Back-off efficiency is a key requirement for load modulated power amplifier (PA) architectures such as Chireix outphasing. This paper studies the impact of second and third harmonic impedance tuning (Z2fo,Z3fo) on the performance of a 10 Watt GaN HEMT branch PA subject to outphasing-like load modulation, operating at 900 MHz. Performance variation of up to 3 dB output power (POUT) and 50% points drain efficiency (DE) with phase manipulation alone of Z2fo is recorded. Optimal Z2fo is revealed to vary - throughout a fixed and for different - outphasing trajectories. A simple technique is presented, using continuous class F−1closed form equations, which predicts the intrinsic optimal Z2fo for multiple points from five outphasing load trajectories, de-embedded to the current generator (CG) plane of the device.
回退效率是负载调制功率放大器(PA)架构(如Chireix失相)的关键要求。本文研究了二次和三次谐波阻抗调谐(Z2fo,Z3fo)对工作于900 MHz的10w GaN HEMT支路PA在类失相负载调制下性能的影响。记录了高达3db输出功率(POUT)和50%点漏极效率(DE)的性能变化,仅用Z2fo进行相位操作。最优Z2fo在一个固定的和不同的同相轨迹中是变化的。提出了一种简单的技术,使用连续类F−1闭形式方程,预测了从五个失相负载轨迹到器件电流发生器(CG)平面的多个点的内在最优Z2fo。
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引用次数: 3
Fully Integrated Asymmetric Doherty Amplifier Based on Two-Power-Level Impedance Optimization 基于双功率级阻抗优化的全集成非对称Doherty放大器
Pub Date : 2018-09-01 DOI: 10.23919/eumc.2018.8541803
R. Ishikawa, Y. Takayama, K. Honjo
A fully integrated asymmetric Doherty power amplifier has been developed by using GaN HEMT MMIC technology. To minimize the circuit size, a two-power-level impedance optimization method was applied instead of using a quarter-wavelength transmission line impedance inverter for load modulation in the Doherty amplifier. For this optimization, asymmetric configuration is required to realize optimum impedance conditions. The 4-GHz-band GaN HEMT Doherty amplifier MMIC exhibited a maximum drain efficiency of 56% and a maximum power-added efficiency (PAE) of 53% at 4.3 GHz, with a saturation output power of 36dBm. In addition, PAE of 44% was achieved at 4.2 GHz on a 6-dB output back-off condition.
采用GaN HEMT MMIC技术,研制了一种全集成非对称多尔蒂功率放大器。为了减小电路尺寸,采用双功率级阻抗优化方法代替四分之一波长传输线阻抗逆变器对Doherty放大器进行负载调制。对于这种优化,需要非对称配置来实现最佳阻抗条件。4ghz频段GaN HEMT Doherty放大器MMIC在4.3 GHz时的最大漏极效率为56%,最大功率附加效率(PAE)为53%,饱和输出功率为36dBm。此外,在6db输出回退条件下,在4.2 GHz下可实现44%的PAE。
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引用次数: 0
A Framework for the Generation of Guaranteed Stable Small-Signal Bias-Dependent Behavioral Models 一个保证稳定的小信号偏差依赖行为模型的生成框架
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539900
M. De Stefano, S. Grivet-Talocia, T. Bradde, A. Zanco
We present a numerical scheme for the identification of compact surrogate models of analog circuit blocks. The basic assumption is small signal operation, so that a local linearization can be applied around a given bias point, resulting in a bias-dependent linear state-space behavioral macromodel. The main novel contribution of this work is the ability to embed in the identification process a suitable set of constraints, that are able to guarantee the uniform stability of the model for any bias value within a prescribed design range.
我们提出了一种识别模拟电路块的紧凑替代模型的数值方案。基本假设是小信号操作,因此可以在给定偏置点周围应用局部线性化,从而产生与偏置相关的线性状态空间行为宏观模型。这项工作的主要新颖贡献是能够在识别过程中嵌入一组合适的约束,这些约束能够保证模型在规定的设计范围内的任何偏置值的均匀稳定性。
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引用次数: 3
European Microwave Week 2018 2018年欧洲微波周
Pub Date : 2018-09-01 DOI: 10.23919/eumic.2018.8539912
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引用次数: 0
Pushing the Linearity Limits of a Digital Polar Transmitter 推进数字极极发射机的线性极限
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539964
M. Hashemi, M. Alavi, L. D. de Vreede
The maximum achievable linearity of a digital polar transmitter (DPTX) is mainly constrained by two RF-DAC associated nonidealities; namely, aliasing of sampling spectral replicas (SSR) of the AM and PM signals, and the presence of nonuniform quantization noise. In this work, using DPTX hardware linearization, in combination with PM SSR filtering and iterative learning control (ILC) algorithm improved by look-up tables (LUT), a CMOS DPTX is linearized close to its theoretical ACPR and EVM limits as predicted by its resolution. Using the ILC technique as underlying basis, an effective real-time direct-learning digital predistortion (DPD) technique is proposed. Measurement results show −60/−53 dBc ACPR and −60/−47 dB EVM using the ILC algorithm for 16/64 MHz OFDM signals, and −55/−48 dBc ACPR and −50/−44 dB EVM using the proposed DPD for 16/64 MHz OFDM signals. To the best of author's knowledge, this is the highest linearity reported for a DPTX operating with wideband signals.
数字极极发射机(DPTX)的最大可实现线性度主要受到RF-DAC相关的两个非理想性的限制;即调幅和调幅信号的采样频谱副本(SSR)混叠,以及不均匀量化噪声的存在。在这项工作中,使用DPTX硬件线性化,结合PM SSR滤波和通过查找表(LUT)改进的迭代学习控制(ILC)算法,将CMOS DPTX线性化,接近其理论ACPR和EVM极限,如其分辨率预测的那样。以ILC技术为基础,提出了一种有效的实时直接学习数字预失真(DPD)技术。测量结果表明,对于16/64 MHz的OFDM信号,采用ILC算法的ACPR值为- 60/−53 dBc, EVM值为- 60/−47 dB;对于16/64 MHz的OFDM信号,采用本文提出的DPD算法的ACPR值为- 55/−48 dBc, EVM值为- 50/−44 dB。据作者所知,这是使用宽带信号的DPTX所报告的最高线性度。
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引用次数: 4
RF-Noise Modeling of InGaAs Metamorphic HEMTs and MOSFETs InGaAs变质hemt和mosfet的射频噪声建模
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539923
F. Heinz, D. Schwantuschke, A. Leuther, A. Tessmann, M. Ohlrogge, R. Quay, O. Ambacher
The mechanisms causing the RF-noise in InGaAs metamorphic HEMTs and MOSFETs have been investigated and compared. A small signal model for InGaAs- metamorphic HEMTs and InGaAs MOSFETs, including an accurate description of the RF-noise, is presented. The model is based on a distributed multiport-network approach, which is scalable in gate width, the number of gate-fingers and covers usual bias points used in amplifier circuits. The noise model is capable of analyzing the sources of noise in InGaAs HEMTs and MOSFETs and their impact on the overall device noise figure. The new extracted MOSFET model is verified on circuit level in the W-Band (75 to 110GHz).
研究并比较了InGaAs变质hemt和mosfet中射频噪声产生的机理。提出了InGaAs-变质hemt和InGaAs mosfet的小信号模型,包括对射频噪声的精确描述。该模型基于分布式多端口网络方法,在门宽、门指数量和覆盖放大器电路中常用的偏置点方面具有可扩展性。该噪声模型能够分析InGaAs hemt和mosfet中的噪声源及其对整体器件噪声系数的影响。新提取的MOSFET模型在w波段(75 ~ 110GHz)的电路电平上进行了验证。
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引用次数: 1
A 110-to-147 GHz Frequency Sixtupler in a 130 nm Sige Bicmos Technology 采用130 nm Sige Bicmos技术的110- 147 GHz频率六倍器
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539939
M. Bao, Z. He, Thanh NgocThi Do, H. Zirath
The presented D-band sixtupler consists of a frequency tripler, a frequency doubler, as well as amplifiers. The optimum arrangement for those blocks is investigated. The analysis shows that the tripler should precede the doubler. Furthermore, to extend the bandwidth, an amplifier with an increasing gain versus frequency is applied, to compensate the gain decrease of the tripler. This wideband frequency sixtupler is designed and characterized in a 130 nm SiGe BiCMOS technology. This sixtupler has a bandwidth of 37 GHz (from 110 to 147 GHz), the maximum output power is 4.5 dBm, with a DC power consumption of 310 mW. The maximum power efficiency is 0.9%.
提出的d波段六倍器由三倍器、倍频器和放大器组成。对这些块的最佳排列进行了研究。分析表明,三倍应先于两倍。此外,为了扩展带宽,应用增益随频率增加的放大器来补偿三倍器的增益下降。该宽带频率六倍器采用130 nm SiGe BiCMOS技术设计和表征。该六倍器带宽为37 GHz (110 ~ 147 GHz),最大输出功率为4.5 dBm,直流功耗为310 mW。最大功率效率为0.9%。
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引用次数: 12
Ka-Band P-I-N Diode Based Digital Phase Shifter 基于ka波段P-I-N二极管的数字移相器
Pub Date : 2018-09-01 DOI: 10.23919/eumc.2018.8541514
Daniel Kramer
Phase shifters are an important part of phased array antennas, which the next generation 5G wireless communication networks will rely on. This paper presents 4-bit and 6-bit digital phase shifters with very low loss and high power handling that function from 27.5 to 29.5 GHz, a frequency band being considered for 5G. This is achieved by using a combination of all shunt P-I-N diodes switches and delay lines on the MACOM A1GaAs P-I-N diode process. The chips have integrated bias networks and work well with MACOM's MADR-009443 quad driver.
移相器是相控阵天线的重要组成部分,下一代5G无线通信网络将依赖于相控阵天线。本文介绍了具有极低损耗和高功率处理的4位和6位数字移相器,其功能范围为27.5至29.5 GHz,这是5G正在考虑的频段。这是通过在MACOM A1GaAs P-I-N二极管工艺上使用所有并联P-I-N二极管开关和延迟线的组合来实现的。这些芯片集成了偏置网络,与MACOM的MADR-009443四轴驱动程序配合良好。
{"title":"Ka-Band P-I-N Diode Based Digital Phase Shifter","authors":"Daniel Kramer","doi":"10.23919/eumc.2018.8541514","DOIUrl":"https://doi.org/10.23919/eumc.2018.8541514","url":null,"abstract":"Phase shifters are an important part of phased array antennas, which the next generation 5G wireless communication networks will rely on. This paper presents 4-bit and 6-bit digital phase shifters with very low loss and high power handling that function from 27.5 to 29.5 GHz, a frequency band being considered for 5G. This is achieved by using a combination of all shunt P-I-N diodes switches and delay lines on the MACOM A1GaAs P-I-N diode process. The chips have integrated bias networks and work well with MACOM's MADR-009443 quad driver.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122828357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Comparison of C-Doped AlN/GaN HEMTs and AlN/GaN/AlGaN Double Heterostructure for mmW Applications c掺杂AlN/GaN HEMTs与AlN/GaN/AlGaN双异质结构毫米波应用的比较
Pub Date : 2018-09-01 DOI: 10.23919/EUMIC.2018.8539962
R. Kabouche, J. Derluyn, R. Pusche, S. Degroote, M. Germain, R. Pecheux, E. Okada, M. Zegaoui, F. Medjdoub
We report on a comparison of the ultrathin (sub-10 nm barrier thickness) AIN/GaN heterostructure using two types of buffer layers for millimeter-wave applications: 1) carbon doped GaN high electron mobility transistors (HEMTs) and 2) double heterostructure field effect transistor (DHFET). It is observed that the carbon doped HEMT structure shows superior electrical characteristics, with a maximum drain current density Id of 1.5 A/mm, an extrinsic transconductance Gm of 500 mS/mm and a maximum oscillation frequency fmaxof 242 GHz while using a gate length of 120 nm. The C-doped structure delivering high frequency performance together with an excellent electron confinement under high bias enabled to achieve a state-of-the-art combination at 40 GHz of output power density (POUT = 7 W/mm) and power added efficiency (PAE) above 52% up to VDs = 25V in pulsed mode.
我们报道了使用两种类型的毫米波应用缓冲层的超薄(低于10 nm势垒厚度)AIN/GaN异质结构的比较:1)碳掺杂GaN高电子迁移率晶体管(HEMTs)和2)双异质结构场效应晶体管(DHFET)。结果表明,当栅极长度为120 nm时,掺杂碳的HEMT结构具有优异的电特性,最大漏极电流密度Id为1.5 a /mm,外部跨导Gm为500 mS/mm,最大振荡频率fmax为242 GHz。在高偏置下,c掺杂结构具有高频率性能和优异的电子约束,能够在脉冲模式下实现40 GHz输出功率密度(POUT = 7 W/mm)和功率附加效率(PAE)高于52%的最先进组合,最高可达VDs = 25V。
{"title":"Comparison of C-Doped AlN/GaN HEMTs and AlN/GaN/AlGaN Double Heterostructure for mmW Applications","authors":"R. Kabouche, J. Derluyn, R. Pusche, S. Degroote, M. Germain, R. Pecheux, E. Okada, M. Zegaoui, F. Medjdoub","doi":"10.23919/EUMIC.2018.8539962","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539962","url":null,"abstract":"We report on a comparison of the ultrathin (sub-10 nm barrier thickness) AIN/GaN heterostructure using two types of buffer layers for millimeter-wave applications: 1) carbon doped GaN high electron mobility transistors (HEMTs) and 2) double heterostructure field effect transistor (DHFET). It is observed that the carbon doped HEMT structure shows superior electrical characteristics, with a maximum drain current density Id of 1.5 A/mm, an extrinsic transconductance Gm of 500 mS/mm and a maximum oscillation frequency fmaxof 242 GHz while using a gate length of 120 nm. The C-doped structure delivering high frequency performance together with an excellent electron confinement under high bias enabled to achieve a state-of-the-art combination at 40 GHz of output power density (POUT = 7 W/mm) and power added efficiency (PAE) above 52% up to VDs = 25V in pulsed mode.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128341288","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
期刊
2018 13th European Microwave Integrated Circuits Conference (EuMIC)
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