Pub Date : 2018-09-01DOI: 10.1109/RADECS45761.2018.9328651
K. A. Karthigeyan, P. Chandramani
Wide tuning range delay cell based 3-stage differential ring VCO designed using 90nm CMOS process operating at 2.6 GHz frequency shows better single event tolerance compared to diode-connected, triode load and Maneatis load delay cell topologies. This topology can be used in PLL and DLL clock generation applications for improved radiation tolerance for LET values between 10–50 MeV-cm2/mg.
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