Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520450
J. F. Marques, J. Estima, N. S. Gameiro, A. M. Marques Cardoso
Accurate fault identification allows the adoption of procedures that minimize the fault impact on the machines operation. Switched reluctance motors (SRMs) have been recognized for their fault-tolerant capabilities and they present a very robust configuration, particularly due to the absence of windings or magnets in the rotor. All these attributes make the SRM a competitive solution for aircraft and automotive applications, where systems reliability is a crucial feature. Therefore, in this paper, a new algorithm for real-time diagnosis of power converter faults in SRM drives is proposed. In contrast to other methods that use additional sensors or devices, the presented technique uses the measured phase currents only, which are already available for the drive control. The proposed algorithm effectively detects the inverter faulty phase and is capable to localize the faulty power switch. Power switch open-and short-circuit fault occurrences in an asymmetric full-bridge converter are considered and analyzed.
{"title":"A new diagnostic technique for real-time diagnosis of power converter faults in switched reluctance motor drives","authors":"J. F. Marques, J. Estima, N. S. Gameiro, A. M. Marques Cardoso","doi":"10.1109/APEC.2013.6520450","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520450","url":null,"abstract":"Accurate fault identification allows the adoption of procedures that minimize the fault impact on the machines operation. Switched reluctance motors (SRMs) have been recognized for their fault-tolerant capabilities and they present a very robust configuration, particularly due to the absence of windings or magnets in the rotor. All these attributes make the SRM a competitive solution for aircraft and automotive applications, where systems reliability is a crucial feature. Therefore, in this paper, a new algorithm for real-time diagnosis of power converter faults in SRM drives is proposed. In contrast to other methods that use additional sensors or devices, the presented technique uses the measured phase currents only, which are already available for the drive control. The proposed algorithm effectively detects the inverter faulty phase and is capable to localize the faulty power switch. Power switch open-and short-circuit fault occurrences in an asymmetric full-bridge converter are considered and analyzed.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125925678","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520206
C. Delepaut, S. Siconolfi, O. Mourra, F. Tonicello
The compliance to the fault tolerant operation requirement for power electronics is commonly assessed with reference to fault models applicable at component level. For switching MOSFET, the fault models include the short-circuit and open-circuit failures, implicitly assuming that the Gate open failure is equivalent to a switch open or short failure. MOSFET Gate open failure, also called floating Gate failure, may however entail a Drain to Source channel conduction with non-zero impedance and the subsequent power dissipation in the failed device may prove critical because of the thermal failure propagation risk. The present paper is dedicated to that question. It is shown that a power MOSFET with floating Gate is driven by leakage current from whatever initial conduction status either into a steady-state dissipative status or into run-away due to thermal instability. The analysis is confirmed by practical tests. As a conclusion, provisions to mitigate the MOSFET Gate open failure are proposed to be implemented at MOSFET level and/or at converter design level.
{"title":"MOSFET gate open failure analysis in power electronics","authors":"C. Delepaut, S. Siconolfi, O. Mourra, F. Tonicello","doi":"10.1109/APEC.2013.6520206","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520206","url":null,"abstract":"The compliance to the fault tolerant operation requirement for power electronics is commonly assessed with reference to fault models applicable at component level. For switching MOSFET, the fault models include the short-circuit and open-circuit failures, implicitly assuming that the Gate open failure is equivalent to a switch open or short failure. MOSFET Gate open failure, also called floating Gate failure, may however entail a Drain to Source channel conduction with non-zero impedance and the subsequent power dissipation in the failed device may prove critical because of the thermal failure propagation risk. The present paper is dedicated to that question. It is shown that a power MOSFET with floating Gate is driven by leakage current from whatever initial conduction status either into a steady-state dissipative status or into run-away due to thermal instability. The analysis is confirmed by practical tests. As a conclusion, provisions to mitigate the MOSFET Gate open failure are proposed to be implemented at MOSFET level and/or at converter design level.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"52 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114128027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520544
M. Narimani, G. Moschopoulos
A new ac-dc single-stage multilevel converter that can operate with standard phase-shift PWM due to its novel “flying capacitor” structure is proposed in this paper. In the paper, the operation of the converter is explained, the steady-state characteristics of the new converter are determined and its design is discussed. The feasibility of the new converter is confirmed with experimental results obtained from a prototype converter and its efficiency is compared to that of another multilevel converter of similar type.
{"title":"A new single-phase single-stage multilevel PFC AC-DC converter with flying capacitor","authors":"M. Narimani, G. Moschopoulos","doi":"10.1109/APEC.2013.6520544","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520544","url":null,"abstract":"A new ac-dc single-stage multilevel converter that can operate with standard phase-shift PWM due to its novel “flying capacitor” structure is proposed in this paper. In the paper, the operation of the converter is explained, the steady-state characteristics of the new converter are determined and its design is discussed. The feasibility of the new converter is confirmed with experimental results obtained from a prototype converter and its efficiency is compared to that of another multilevel converter of similar type.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114180459","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520576
Zhe Zhang, O. C. Thomsen, M. Andersen
This paper introduces a new zero-voltage-switching (ZVS) isolated DC-DC converter with two input ports which can be utilized in hybrid energy systems, for instance, in a fuel cell and super-capacitor system. By fully using two high frequency transformers, the proposed converter can effectively integrate a current-fed boost half-bridge (BHB) and a full-bridge (FB) into one equivalent circuit configuration which has dual-input ability and additionally it can reduce the number of the power devices. With the phase-shift control, it can achieve zero-voltage switching turn-on of active switches and zero-current switching (ZCS) turn-off of diodes leading to negligible reverse recovery loss. Voltage conversion ratio is higher compared to the conventional boost converter owing to the BHB circuit and the corresponding control. Finally, a 25~50 V input, 300~400 V output prototype with a 600 W nominal power rating are built up and tested to demonstrate the effectiveness of the proposed converter topology.
{"title":"Dual-input soft-switched DC-DC converter with isolated current-fed half-bridge and voltage-fed full-bridge for fuel cell or photovoltaic systems","authors":"Zhe Zhang, O. C. Thomsen, M. Andersen","doi":"10.1109/APEC.2013.6520576","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520576","url":null,"abstract":"This paper introduces a new zero-voltage-switching (ZVS) isolated DC-DC converter with two input ports which can be utilized in hybrid energy systems, for instance, in a fuel cell and super-capacitor system. By fully using two high frequency transformers, the proposed converter can effectively integrate a current-fed boost half-bridge (BHB) and a full-bridge (FB) into one equivalent circuit configuration which has dual-input ability and additionally it can reduce the number of the power devices. With the phase-shift control, it can achieve zero-voltage switching turn-on of active switches and zero-current switching (ZCS) turn-off of diodes leading to negligible reverse recovery loss. Voltage conversion ratio is higher compared to the conventional boost converter owing to the BHB circuit and the corresponding control. Finally, a 25~50 V input, 300~400 V output prototype with a 600 W nominal power rating are built up and tested to demonstrate the effectiveness of the proposed converter topology.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"12 5-6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120892046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520782
B. Akin, Manish Bhardwaj, S. Choudhury
Heating ventilation and air conditioning (HVAC) drives commonly utilize variable speed control to maximize efficiency and increasingly power factor correction (PFC) stage in the rectifier design to comply with regulations, such as IEC 61000-3-2, which limit the input current harmonics. Cycle by cycle control is desired for both the PFC stage and motor inverter. Closed loop control of these stages consumes the entire bandwidth available on a typical microcontroller leaving no bandwidth to implement fault diagnostics, housekeeping and host functions. This paper presents design of motor control and PFC using a single low cost microcontroller (MCU- TI TMS320F2805x) with embedded analog subsystem consisting of programmable gate arrays (PGA) to sense the shunt inverter currents, windowed comparators and DACs for programmable protection levels; and small footprint control law accelerator (CLA) to double the bandwidth. The integrated design reduces the number of components, reducing board size and build cost and enables on the fly changes which brings enhanced control possibilities for a cost sensitive market without compromising on cost.
{"title":"Integrated design of efficient & reliable motor drive and PFC using low cost microcontroller with embedded PGAs and CLA","authors":"B. Akin, Manish Bhardwaj, S. Choudhury","doi":"10.1109/APEC.2013.6520782","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520782","url":null,"abstract":"Heating ventilation and air conditioning (HVAC) drives commonly utilize variable speed control to maximize efficiency and increasingly power factor correction (PFC) stage in the rectifier design to comply with regulations, such as IEC 61000-3-2, which limit the input current harmonics. Cycle by cycle control is desired for both the PFC stage and motor inverter. Closed loop control of these stages consumes the entire bandwidth available on a typical microcontroller leaving no bandwidth to implement fault diagnostics, housekeeping and host functions. This paper presents design of motor control and PFC using a single low cost microcontroller (MCU- TI TMS320F2805x) with embedded analog subsystem consisting of programmable gate arrays (PGA) to sense the shunt inverter currents, windowed comparators and DACs for programmable protection levels; and small footprint control law accelerator (CLA) to double the bandwidth. The integrated design reduces the number of components, reducing board size and build cost and enables on the fly changes which brings enhanced control possibilities for a cost sensitive market without compromising on cost.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115968289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520205
C. Ronsisvalle, H. Fischer, K. Park, C. Abbate, G. Busatto, A. Sanseverino, F. Velardi
A wide experimental characterization about the input capacitance of Field Stop Trench Gate IGBTs is presented. It was achieved thanks to a novel experimental set-up which allows us to measure the input capacitance in the active region where the device operate during the Short Circuit (SC). The experimental results have been interpreted with the help of FEM simulations which confirm that negative capacitance is correlated with the accumulation of holes at the interface between N- IGBT base and gate oxide.
{"title":"High Frequency Capacitive behavior of field stop trench gate IGBTs operating in Short Circuit","authors":"C. Ronsisvalle, H. Fischer, K. Park, C. Abbate, G. Busatto, A. Sanseverino, F. Velardi","doi":"10.1109/APEC.2013.6520205","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520205","url":null,"abstract":"A wide experimental characterization about the input capacitance of Field Stop Trench Gate IGBTs is presented. It was achieved thanks to a novel experimental set-up which allows us to measure the input capacitance in the active region where the device operate during the Short Circuit (SC). The experimental results have been interpreted with the help of FEM simulations which confirm that negative capacitance is correlated with the accumulation of holes at the interface between N- IGBT base and gate oxide.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121197322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520616
A. Stankovic, Y. Rutkovskiy
In this paper, a generalized method for grid side inverter control under unbalanced operating conditions is proposed. The control method presented in this paper provides complete harmonic elimination in line currents and DC link voltage with adjustable power factor. The method is general and can be used for all levels of imbalance in grid voltages and line impedances. The control algorithm proposed in this paper has been implemented by using Matlab Simulink and dSpace RT1104 control system. Simulation and experimental results presented in this paper are in excellent agreement.
{"title":"A novel control method for grid side inverters under generalized unbalanced operating conditions","authors":"A. Stankovic, Y. Rutkovskiy","doi":"10.1109/APEC.2013.6520616","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520616","url":null,"abstract":"In this paper, a generalized method for grid side inverter control under unbalanced operating conditions is proposed. The control method presented in this paper provides complete harmonic elimination in line currents and DC link voltage with adjustable power factor. The method is general and can be used for all levels of imbalance in grid voltages and line impedances. The control algorithm proposed in this paper has been implemented by using Matlab Simulink and dSpace RT1104 control system. Simulation and experimental results presented in this paper are in excellent agreement.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116638092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520296
A. Sayed-Ahmed, R. Kerkman, B. Seibel
IGBT based Fundamental Front End “FFE” regenerative motor-drive system presents an attractive low cost solution for motor-drive applications that require regenerating power back to the grid. This technology doesn't require the addition of a breaking resistor to the drive which in many cases can present a safety hazard, and requires extra space. These motor-drive systems are extensively applied in industrial applications, as they provide an adequate replacement for standard motor-drive system applications that don't mandate reduced input current harmonics but require an economic / high power density design approach to regenerate power back to the grid. Thus, these motor-drive systems with IGBT based front-end converters have almost replaced conventional thyristor based line regenerative power converters especially in lower power applications. This paper is centered on providing a closed form solution and an in-depth mathematical analysis and performance evaluation of the IGBT based FFE.
{"title":"Analysis of IGBT based fundamental front end regenerative motor-drive systems","authors":"A. Sayed-Ahmed, R. Kerkman, B. Seibel","doi":"10.1109/APEC.2013.6520296","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520296","url":null,"abstract":"IGBT based Fundamental Front End “FFE” regenerative motor-drive system presents an attractive low cost solution for motor-drive applications that require regenerating power back to the grid. This technology doesn't require the addition of a breaking resistor to the drive which in many cases can present a safety hazard, and requires extra space. These motor-drive systems are extensively applied in industrial applications, as they provide an adequate replacement for standard motor-drive system applications that don't mandate reduced input current harmonics but require an economic / high power density design approach to regenerate power back to the grid. Thus, these motor-drive systems with IGBT based front-end converters have almost replaced conventional thyristor based line regenerative power converters especially in lower power applications. This paper is centered on providing a closed form solution and an in-depth mathematical analysis and performance evaluation of the IGBT based FFE.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"37 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116660414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520484
J. Huber, G. Ortiz, F. Krismer, N. Widmer, J. Kolar
In solid-state-transformer technology, the isolation and power transfer between low voltage and medium voltage side is performed by a high power DC/DC converter. This DC/DC converter provides a defined ratio between input and output voltages, whereby, in order to reduce switching losses, zero-current-switching modulation schemes are often mandatory. The series-resonant-converter operated in half-cycle discontinuous-conduction-mode possesses all the aforementioned features, thus making it highly attractive for solid-state-transformer applications. For this reason, a comprehensive analytical model of the converter's static and dynamic behavior is provided in this paper. In addition, a method to model the switching losses under ZCS conditions, which is based on the behavior of the stored charge in the semiconductors, is presented. This enables an efficiency/power density (η-ρ) Pareto optimization of the aforementioned converter system.
{"title":"η-ρ Pareto optimization of bidirectional half-cycle discontinuous-conduction-mode series-resonant DC/DC converter with fixed voltage transfer ratio","authors":"J. Huber, G. Ortiz, F. Krismer, N. Widmer, J. Kolar","doi":"10.1109/APEC.2013.6520484","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520484","url":null,"abstract":"In solid-state-transformer technology, the isolation and power transfer between low voltage and medium voltage side is performed by a high power DC/DC converter. This DC/DC converter provides a defined ratio between input and output voltages, whereby, in order to reduce switching losses, zero-current-switching modulation schemes are often mandatory. The series-resonant-converter operated in half-cycle discontinuous-conduction-mode possesses all the aforementioned features, thus making it highly attractive for solid-state-transformer applications. For this reason, a comprehensive analytical model of the converter's static and dynamic behavior is provided in this paper. In addition, a method to model the switching losses under ZCS conditions, which is based on the behavior of the stored charge in the semiconductors, is presented. This enables an efficiency/power density (η-ρ) Pareto optimization of the aforementioned converter system.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125142154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-03-17DOI: 10.1109/APEC.2013.6520505
Tao Qi, Jian Sun
This paper presents solutions to common-mode (CM) electromagnetic interference (EMI) problems in back-to-back converter systems with parallel- and/or series-connection of three-phase voltage-source converters (VSC). The main objective is to reduce the CM EMI emission at both the input and output terminals. Additionally, attention will also be given to the CM current through the converters and the circulating currents among parallel modules in an effort to reduce power losses and to improve control performance. A new CM filter arrangement with CM capacitors connected between the input and output terminals of cascaded VSC is proposed as a way to reduce the CM currents at both input and output terminals. Other system-level CM EMI reduction techniques, such as asymmetric interleaving, the use of inter-module chokes, optimization of dc bus grounding capacitance, and balancing of CM impedance to contain CM emission locally, are also presented and demonstrated.
{"title":"Common-mode EMI solutions for modular back-to-back converter systems","authors":"Tao Qi, Jian Sun","doi":"10.1109/APEC.2013.6520505","DOIUrl":"https://doi.org/10.1109/APEC.2013.6520505","url":null,"abstract":"This paper presents solutions to common-mode (CM) electromagnetic interference (EMI) problems in back-to-back converter systems with parallel- and/or series-connection of three-phase voltage-source converters (VSC). The main objective is to reduce the CM EMI emission at both the input and output terminals. Additionally, attention will also be given to the CM current through the converters and the circulating currents among parallel modules in an effort to reduce power losses and to improve control performance. A new CM filter arrangement with CM capacitors connected between the input and output terminals of cascaded VSC is proposed as a way to reduce the CM currents at both input and output terminals. Other system-level CM EMI reduction techniques, such as asymmetric interleaving, the use of inter-module chokes, optimization of dc bus grounding capacitance, and balancing of CM impedance to contain CM emission locally, are also presented and demonstrated.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125228606","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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