Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282702
K. Entesari, Gabriel M. Rebeiz
This paper presents a hermetic-compatible surface mount package for microstrip structures designed for K-band applications. The microstrip lines, fabricated on a 250 mum-thick alumina substrate are packaged using a 280 mum-thick silicon cap wafer and gold-gold thermo-compression bonding. A 130 mum cavity is etched in the cap wafer to allow ample space for RF MEMS devices, surface- or bulk-wave acoustic filters, power amplifiers, or multi-chip assemblies. A via-hole transition is used to connect the microstrip line inside the package to the coplanar waveguide (CPW) line on the back side of the alumina wafer. The gold sealing ring is connected to the microstrip ground using via-holes through the alumina wafer to eliminate any parasitic resonance modes and to improve the isolation between the input and output ports. A packaged microstrip line with total dimensions of 2.6 mm has a measured insertion loss and return loss of less than 0.5 dB and 18 dB, respectively, at DC-23 GHz
本文提出了一种用于k波段应用的微带结构的密封兼容表面贴装封装。微带线在250毫米厚的氧化铝衬底上制造，使用280毫米厚的硅帽晶圆和金-金热压缩键合封装。帽晶圆上蚀刻了一个130 μ m的腔，为RF MEMS器件、表面波或体波声滤波器、功率放大器或多芯片组件提供了充足的空间。通过孔过渡将封装内的微带线连接到氧化铝晶圆背面的共面波导(CPW)线。金密封环通过氧化铝晶圆通过过孔连接到微带接地，以消除任何寄生共振模式，并提高输入和输出端口之间的隔离。总尺寸为2.6 mm的封装微带线在DC-23 GHz下的插入损耗和回波损耗分别小于0.5 dB和18 dB
{"title":"A Low-Loss Microstrip Surface-Mount K-Band Package","authors":"K. Entesari, Gabriel M. Rebeiz","doi":"10.1109/EMICC.2006.282702","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282702","url":null,"abstract":"This paper presents a hermetic-compatible surface mount package for microstrip structures designed for K-band applications. The microstrip lines, fabricated on a 250 mum-thick alumina substrate are packaged using a 280 mum-thick silicon cap wafer and gold-gold thermo-compression bonding. A 130 mum cavity is etched in the cap wafer to allow ample space for RF MEMS devices, surface- or bulk-wave acoustic filters, power amplifiers, or multi-chip assemblies. A via-hole transition is used to connect the microstrip line inside the package to the coplanar waveguide (CPW) line on the back side of the alumina wafer. The gold sealing ring is connected to the microstrip ground using via-holes through the alumina wafer to eliminate any parasitic resonance modes and to improve the isolation between the input and output ports. A packaged microstrip line with total dimensions of 2.6 mm has a measured insertion loss and return loss of less than 0.5 dB and 18 dB, respectively, at DC-23 GHz","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127821777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282800
C. Siviero, P. M. Lavrador, J. Pedro
This paper reports on a novel extraction procedure of low-pass equivalent behavioral models of microwave power amplifiers. The proposed approach is based on the use of the discrete-time Volterra series model and on the complex envelope of a multisine as stimulus. The model extraction procedure is formulated using an alternative orthogonal model representation in the frequency domain, providing a methodology which successfully leads to an optimal model identification not affected by the ill-conditioning of typical learning methods
{"title":"A Frequency Domain Extraction Procedure of Low-Pass Equivalent Behavioural Models of Microwave PAs","authors":"C. Siviero, P. M. Lavrador, J. Pedro","doi":"10.1109/EMICC.2006.282800","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282800","url":null,"abstract":"This paper reports on a novel extraction procedure of low-pass equivalent behavioral models of microwave power amplifiers. The proposed approach is based on the use of the discrete-time Volterra series model and on the complex envelope of a multisine as stimulus. The model extraction procedure is formulated using an alternative orthogonal model representation in the frequency domain, providing a methodology which successfully leads to an optimal model identification not affected by the ill-conditioning of typical learning methods","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124560888","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282658
M. Holm, N. Cameron, D. Brookbanks
This paper presents a simulation of the transient behavior of a filtronic SP6T switch. By employing a non-linear switch model a representation of the switching dynamics is presented. The simulations predict that the changing control voltages has quickly attenuate the fundamental power, however harmonic performance is dependant on the total bias applied to the switch and hence relaxes to its steady state condition 0.15mus after the control voltages have settled. Within this paper we demonstrate the importance of understanding the behavior of the switch during transitions between equilibrium conditions with respect to the radiated spectral content
{"title":"Charge Effects and Transient Simulation of p-HEMT Meander Gate Switches","authors":"M. Holm, N. Cameron, D. Brookbanks","doi":"10.1109/EMICC.2006.282658","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282658","url":null,"abstract":"This paper presents a simulation of the transient behavior of a filtronic SP6T switch. By employing a non-linear switch model a representation of the switching dynamics is presented. The simulations predict that the changing control voltages has quickly attenuate the fundamental power, however harmonic performance is dependant on the total bias applied to the switch and hence relaxes to its steady state condition 0.15mus after the control voltages have settled. Within this paper we demonstrate the importance of understanding the behavior of the switch during transitions between equilibrium conditions with respect to the radiated spectral content","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128223512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282736
S. Delcourt, G. Dambrine, N. Eddine Bourzgui, S. Lépilliet, C. Laporte, D. Smith, Jean-Philippe Fraysse
This paper describes the noise and dynamic behavior of commercial MHEMTs characterized at extreme low temperatures (78K and 173K). This is the first time, to our knowledge that the noise performance of metamorphic transistors has been investigated at such low temperatures in this frequency range (from 20 to 42 GHz). The low temperature DC characteristics of these transistors are detailed after a brief introduction describing the main motivations of this study. Then, we describe the dynamic behavior of such components under cryogenic conditions. Finally, noise measurements have also been performed from 20 to 42 GHz, using a non-uniform de-embedding technique. The noise parameters of the transistors, extracted from these measurements, are presented versus the temperature. The results presented show an excellent cryogenic performance at transistor level (NFmin of 0.3 dB and a gass of 11.2 dB at 30 GHz and 78K) as well as for a matched MMIC LNA (S21=27 dB, NF=0.4 dB at 30 GHz, at 78K)
{"title":"Noise and Dynamic Cryogenic performance of Metamorphic Transistors from 20 to 42 GHz","authors":"S. Delcourt, G. Dambrine, N. Eddine Bourzgui, S. Lépilliet, C. Laporte, D. Smith, Jean-Philippe Fraysse","doi":"10.1109/EMICC.2006.282736","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282736","url":null,"abstract":"This paper describes the noise and dynamic behavior of commercial MHEMTs characterized at extreme low temperatures (78K and 173K). This is the first time, to our knowledge that the noise performance of metamorphic transistors has been investigated at such low temperatures in this frequency range (from 20 to 42 GHz). The low temperature DC characteristics of these transistors are detailed after a brief introduction describing the main motivations of this study. Then, we describe the dynamic behavior of such components under cryogenic conditions. Finally, noise measurements have also been performed from 20 to 42 GHz, using a non-uniform de-embedding technique. The noise parameters of the transistors, extracted from these measurements, are presented versus the temperature. The results presented show an excellent cryogenic performance at transistor level (NFmin of 0.3 dB and a gass of 11.2 dB at 30 GHz and 78K) as well as for a matched MMIC LNA (S21=27 dB, NF=0.4 dB at 30 GHz, at 78K)","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116869184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282663
W. Stiebler
A non-quasi-static, relaxation-time small-signal HEMT model is proposed that is fully compatible with large-signal modeling. The small-signal model is derived by linearization from a large-signal, charge-conserving model that uses a relaxation-time approximation. The model's topology is fully symmetrical with respect to the gate, and makes use of a comprehensive extrinsic network
{"title":"A Non-Quasi-Static, Relaxation-Time Small-Signal HEMT Model Compatible with Large-Signal Modeling","authors":"W. Stiebler","doi":"10.1109/EMICC.2006.282663","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282663","url":null,"abstract":"A non-quasi-static, relaxation-time small-signal HEMT model is proposed that is fully compatible with large-signal modeling. The small-signal model is derived by linearization from a large-signal, charge-conserving model that uses a relaxation-time approximation. The model's topology is fully symmetrical with respect to the gate, and makes use of a comprehensive extrinsic network","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122598518","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282808
E. Gatard, P. Bouysse, R. Sommet, R. Quéré, J. Bureau, P. Ledieu, M. Stanislawiak, C. Tolant
A p-i-n diode model for switching and limiting applications is presented. The model allows to simulate the I-region store charge effect that governs the impedance-frequency characteristic of the diode. The model also includes recombination phenomenon in the heavily doped region and junctions effects. The diode model has been implemented in a commercial circuit simulator and validated with a good agreement by measurement results
{"title":"A Physics-Based Nonlinear Model of Microwave P-I-N Diode for CAD","authors":"E. Gatard, P. Bouysse, R. Sommet, R. Quéré, J. Bureau, P. Ledieu, M. Stanislawiak, C. Tolant","doi":"10.1109/EMICC.2006.282808","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282808","url":null,"abstract":"A p-i-n diode model for switching and limiting applications is presented. The model allows to simulate the I-region store charge effect that governs the impedance-frequency characteristic of the diode. The model also includes recombination phenomenon in the heavily doped region and junctions effects. The diode model has been implemented in a commercial circuit simulator and validated with a good agreement by measurement results","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115421171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282673
Sungwon Kim, Gyungseon Seol, Jin-churl Her, Kyung-Chul Jang, K. Seo
We have successfully demonstrated the novel HSQ based T-gate process to transfer the negative nanoscale patterns to positive patterns. This process is based on electron beam (EB) lithography, O2 plasma and BOE solution etching. Because O2 plasma etching has the high selectivity between HSQ and ZEP, HSQ patterns were exposed over the ZEP layer without any loss of pattern dimension. HSQ was then selectively etched by BOE solution. Therefore it is very simple and reproducible process in achieving nanoscale pattern of positive tone and could be useful for the fabrication of nanoscale T-gate HEMTs. The fabricated 40 nm In0.7GaAs HEMTs with the novel HSQ based T-gate process exhibit an extrinsic transconductance gm of 1.4 S/mm and a cut-off frequency fT of 370 GHz
{"title":"40nm In0.7GaAs HEMTs with Novel HSQ Based T-gate Process","authors":"Sungwon Kim, Gyungseon Seol, Jin-churl Her, Kyung-Chul Jang, K. Seo","doi":"10.1109/EMICC.2006.282673","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282673","url":null,"abstract":"We have successfully demonstrated the novel HSQ based T-gate process to transfer the negative nanoscale patterns to positive patterns. This process is based on electron beam (EB) lithography, O2 plasma and BOE solution etching. Because O2 plasma etching has the high selectivity between HSQ and ZEP, HSQ patterns were exposed over the ZEP layer without any loss of pattern dimension. HSQ was then selectively etched by BOE solution. Therefore it is very simple and reproducible process in achieving nanoscale pattern of positive tone and could be useful for the fabrication of nanoscale T-gate HEMTs. The fabricated 40 nm In0.7GaAs HEMTs with the novel HSQ based T-gate process exhibit an extrinsic transconductance gm of 1.4 S/mm and a cut-off frequency fT of 370 GHz","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114708243","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282686
T. Kangasvieri, J. Halme, J. Vahakangas, M. Lahti
This paper presents three shielded vertical via transition designs applicable in millimeter-wave module packaging from DC up to the F-band. The optimized transition structures were fabricated using a standard low-temperature co-fired ceramic (LTCC) process. The measured scattering parameter results of the back-to-back via transition structures showed an exceptionally wide bandwidth with return losses better than 18 dB up to 50 GHz. The extracted insertion loss values of the single transitions were less than about 0.4 dB at 50 GHz. Moreover, full-wave electromagnetic (EM) simulations demonstrated the high potential of two of these via transitions up to 70 GHz
{"title":"Ultra-Wideband Shielded Vertical Via Transitions from DC up to the V-Band","authors":"T. Kangasvieri, J. Halme, J. Vahakangas, M. Lahti","doi":"10.1109/EMICC.2006.282686","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282686","url":null,"abstract":"This paper presents three shielded vertical via transition designs applicable in millimeter-wave module packaging from DC up to the F-band. The optimized transition structures were fabricated using a standard low-temperature co-fired ceramic (LTCC) process. The measured scattering parameter results of the back-to-back via transition structures showed an exceptionally wide bandwidth with return losses better than 18 dB up to 50 GHz. The extracted insertion loss values of the single transitions were less than about 0.4 dB at 50 GHz. Moreover, full-wave electromagnetic (EM) simulations demonstrated the high potential of two of these via transitions up to 70 GHz","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117287133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282792
S. Decoutere, V. Subramanian, J. Loo, C. Gustin, B. Parvais, M. Dehan, A. Mercha
The new process module and device architecture options emerging for (sub-) 45nm CMOS lead to both opportunities and challenges for analog/RF circuit design. A survey is given describing the advanced process modules for competing architectures (planar bulk CMOS versus FinFETS), for different gate stacks and mobility enhancement techniques. Challenges for compact modeling are identified
{"title":"Advanced Process Modules for (sub-) 45nm Analog/RF CMOS - Technology Description and Modeling Challenges","authors":"S. Decoutere, V. Subramanian, J. Loo, C. Gustin, B. Parvais, M. Dehan, A. Mercha","doi":"10.1109/EMICC.2006.282792","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282792","url":null,"abstract":"The new process module and device architecture options emerging for (sub-) 45nm CMOS lead to both opportunities and challenges for analog/RF circuit design. A survey is given describing the advanced process modules for competing architectures (planar bulk CMOS versus FinFETS), for different gate stacks and mobility enhancement techniques. Challenges for compact modeling are identified","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120974490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-09-01DOI: 10.1109/EMICC.2006.282773
P. Sun, P. Upadhyaya, Le Wang, DongHo Jeong, D. Heo
This paper presents a novel high isolation and low insertion loss broadband PIN diode implemented in a standard 0.18 μm SiGe BiCMOS process for upper X-band and lower Ku band LEO satellite phased array communication systems. By optimizing distance between anode and cathode terminals, the PIN diode overcomes the limitation of the common SiGe process which do not have customized etching step to remove the N-epi layer to build a high performance vertical PIN diode. Measurement shows that the PIN diodes achieve less than 1.09 dB insertion loss and isolation between 39dB to 13.67dB over DC to 18 GHz frequency. The PIN diode performance shows great potential for development of high performance MMICs in the standard SiGe processes
{"title":"High Performance PIN Diode in 0.18-μm SiGe BiCMOS Process for Broadband Monolithic Control Circuits","authors":"P. Sun, P. Upadhyaya, Le Wang, DongHo Jeong, D. Heo","doi":"10.1109/EMICC.2006.282773","DOIUrl":"https://doi.org/10.1109/EMICC.2006.282773","url":null,"abstract":"This paper presents a novel high isolation and low insertion loss broadband PIN diode implemented in a standard 0.18 μm SiGe BiCMOS process for upper X-band and lower Ku band LEO satellite phased array communication systems. By optimizing distance between anode and cathode terminals, the PIN diode overcomes the limitation of the common SiGe process which do not have customized etching step to remove the N-epi layer to build a high performance vertical PIN diode. Measurement shows that the PIN diodes achieve less than 1.09 dB insertion loss and isolation between 39dB to 13.67dB over DC to 18 GHz frequency. The PIN diode performance shows great potential for development of high performance MMICs in the standard SiGe processes","PeriodicalId":269652,"journal":{"name":"2006 European Microwave Integrated Circuits Conference","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121108442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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