Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8551113
Pradeep Dasari, C. Sharma, S. Karmalkar
We propose a simple method for incorporating the virtual gate effect present in Aluminum Gallium Nitride (AlGaN) / Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs) in numerical simulation of their ON-state current-voltage characteristics. Further, we show that the simulations which match the measured ON-state data neglecting the virtual gate effect end up employing an electron saturation velocity versus gate bias behavior that is qualitatively unphysical.
{"title":"Incorporation of the Virtual Gate Effect and Consequences of its Neglect in the Simulation of ON-State $pmb{I}_{pmb{D}}-pmb{V}_{pmb{DS}}$ Curves of AlGaN/GaN HEMTs","authors":"Pradeep Dasari, C. Sharma, S. Karmalkar","doi":"10.1109/BCICTS.2018.8551113","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8551113","url":null,"abstract":"We propose a simple method for incorporating the virtual gate effect present in Aluminum Gallium Nitride (AlGaN) / Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs) in numerical simulation of their ON-state current-voltage characteristics. Further, we show that the simulations which match the measured ON-state data neglecting the virtual gate effect end up employing an electron saturation velocity versus gate bias behavior that is qualitatively unphysical.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117032868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8550977
M. Nagatani, H. Wakita, Teruo Jyo, M. Mutoh, M. Ida, S. Voinigescu, H. Nosaka
This paper presents a 256-Gbps (128-GBaud) four-level pulse amplitude modulation (PAM-4) signal generator (SG) IC fabricated using developed $0.25- mutext{m}$ -emitter-width InP double heterojunction bipolar transistors (DHBTs), which have a peak $f_{text{T}}$ and $f_{max}$ of 460 and 480 GHz, respectively. The IC is based on a 128-GS/s 2-bit R2R-ladder current-steering digital-to-analog converter (DAC) with integrated two 2:1 multiplexer (MUX) functions. Ultrahigh-speed clear PAM-4 signals of up to 256 Gbps (128 GBaud) were successfully generated using this PAM-4 SG IC. To the best of our knowledge, this is the first demonstration of 256-Gbps (128-GBaud) PAM-4 signal generation without any equalization.
{"title":"A 256-Gbps PAM-4 Signal Generator IC in $0.25-mu text{m}$ InP DHBT Technology","authors":"M. Nagatani, H. Wakita, Teruo Jyo, M. Mutoh, M. Ida, S. Voinigescu, H. Nosaka","doi":"10.1109/BCICTS.2018.8550977","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8550977","url":null,"abstract":"This paper presents a 256-Gbps (128-GBaud) four-level pulse amplitude modulation (PAM-4) signal generator (SG) IC fabricated using developed $0.25- mutext{m}$ -emitter-width InP double heterojunction bipolar transistors (DHBTs), which have a peak $f_{text{T}}$ and $f_{max}$ of 460 and 480 GHz, respectively. The IC is based on a 128-GS/s 2-bit R2R-ladder current-steering digital-to-analog converter (DAC) with integrated two 2:1 multiplexer (MUX) functions. Ultrahigh-speed clear PAM-4 signals of up to 256 Gbps (128 GBaud) were successfully generated using this PAM-4 SG IC. To the best of our knowledge, this is the first demonstration of 256-Gbps (128-GBaud) PAM-4 signal generation without any equalization.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126328247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mainly due to the increase in the number of corresponding bands, and to the HPUE (High Power User Equipment) operation, the power amplifier for the mobile phone terminal is required to increase the maximum output power and gain at the same time. There are several ways to increase the transmit power, but here we have applied an AC-stacked method that combines the emitter ground transistor and the base ground transistor with the capacitor. By applying this method and prototyping a 2.5 GHz power amplifier module, we achieved a gain of approximately 34 dB and a linear output 29dBm at a 3.4 V supply voltage and confirmed the output of the 31dBm in the ET operation.
主要是由于相应频带数量的增加，以及为了HPUE (High Power User Equipment，高功率用户设备)的运行，要求手机终端的功率放大器同时提高最大输出功率和增益。有几种方法可以增加发射功率，但这里我们采用了一种交流堆叠方法，将发射极接地晶体管和基极接地晶体管与电容器结合起来。通过应用该方法并对2.5 GHz功率放大器模块进行原型设计，我们在3.4 V电源电压下获得了大约34 dB的增益和29dBm的线性输出，并确认了ET操作中31dBm的输出。
{"title":"AC-Stacked Power Amplifier for APT/ET LTE HPUE Applications","authors":"Kazuo Watanabe, Satoshi Tanaka, Masatoshi Hase, Yuuri Honda, Yusuke Tanaka, Satoshi Arayashiki","doi":"10.1109/BCICTS.2018.8551064","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8551064","url":null,"abstract":"Mainly due to the increase in the number of corresponding bands, and to the HPUE (High Power User Equipment) operation, the power amplifier for the mobile phone terminal is required to increase the maximum output power and gain at the same time. There are several ways to increase the transmit power, but here we have applied an AC-stacked method that combines the emitter ground transistor and the base ground transistor with the capacitor. By applying this method and prototyping a 2.5 GHz power amplifier module, we achieved a gain of approximately 34 dB and a linear output 29dBm at a 3.4 V supply voltage and confirmed the output of the 31dBm in the ET operation.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126663413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8550836
A. Tessmann, A. Leuther, F. Heinz, F. Bernhardt, H. Massler
Compact high gain 220 to 275 GHz millimeter wave monolithic integrated circuit (MMIC) amplifiers have been developed, based on a metamorphic 20 nm gate length InGaAs metal-oxide-semiconductor field-effect transistor (MOSFET) technology. Therefore, an Al2O3/HfO2layer stack was deposited as a gate dielectric directly on top of an $mathbf{In}_{0.8}mathbf{Ga}_{0.2}mathbf{As}$ channel by atomic layer deposition. The gate layout was optimized for millimeter wave and submillimeter wave integrated circuit applications using T-gates and wet chemical recess etching to minimize the parasitic gate capacitances. For a $2times 10 mu text{m}$ gate width transistor, a transit frequency $f_{text{T}}$ of 275 GHz and a record maximum oscillation frequency $f_{max}$ of 640 GHz was extrapolated. A realized three-stage cascode amplifier circuit demonstrated a maximum gain of 21 dB at 263 GHz and a small-signal gain of more than 18 dB between 222 and 274 GHz. The total chip size of the millimeter wave amplifier MMIC was only $0.5times 1.2 mathbf{mm}^{2}$.
{"title":"High Gain 220 - 275 GHz Amplifier MMICs Based on Metamorphic 20 nm InGaAs MOSFET Technology","authors":"A. Tessmann, A. Leuther, F. Heinz, F. Bernhardt, H. Massler","doi":"10.1109/BCICTS.2018.8550836","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8550836","url":null,"abstract":"Compact high gain 220 to 275 GHz millimeter wave monolithic integrated circuit (MMIC) amplifiers have been developed, based on a metamorphic 20 nm gate length InGaAs metal-oxide-semiconductor field-effect transistor (MOSFET) technology. Therefore, an Al2O3/HfO2layer stack was deposited as a gate dielectric directly on top of an $mathbf{In}_{0.8}mathbf{Ga}_{0.2}mathbf{As}$ channel by atomic layer deposition. The gate layout was optimized for millimeter wave and submillimeter wave integrated circuit applications using T-gates and wet chemical recess etching to minimize the parasitic gate capacitances. For a $2times 10 mu text{m}$ gate width transistor, a transit frequency $f_{text{T}}$ of 275 GHz and a record maximum oscillation frequency $f_{max}$ of 640 GHz was extrapolated. A realized three-stage cascode amplifier circuit demonstrated a maximum gain of 21 dB at 263 GHz and a small-signal gain of more than 18 dB between 222 and 274 GHz. The total chip size of the millimeter wave amplifier MMIC was only $0.5times 1.2 mathbf{mm}^{2}$.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115165716","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-07-12DOI: 10.1109/BCICTS.2018.8551150
Y. Yamaguchi, Tomohiro Otsuka, M. Hangai, S. Shinjo, T. Oishi
In this paper, a Ka-band large-signal model in consideration of trap effect on non-linear capacitance was proposed. In this model, trap effect was modeled by using trap circuits including the diode, the resistance, and the capacitance. The trap circuit affects non-linear capacitance as well as drain current and transconductance. Moreover, to extract the model parameters in the trap circuit, transient s-parameters were measured. By using transient s-parameters measurement, trap effect on non-linear capacitance including trap time constant can be considered. As the result of verification of the model, the proposed model was in good agreement with the measured data of not only AM-AM but also AM-PM.
{"title":"Ka-Band GaN Large-Signal Model Considering Trap Effect on Nonlinear Capacitance by Using Transient S-Parameters Measurement","authors":"Y. Yamaguchi, Tomohiro Otsuka, M. Hangai, S. Shinjo, T. Oishi","doi":"10.1109/BCICTS.2018.8551150","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8551150","url":null,"abstract":"In this paper, a Ka-band large-signal model in consideration of trap effect on non-linear capacitance was proposed. In this model, trap effect was modeled by using trap circuits including the diode, the resistance, and the capacitance. The trap circuit affects non-linear capacitance as well as drain current and transconductance. Moreover, to extract the model parameters in the trap circuit, transient s-parameters were measured. By using transient s-parameters measurement, trap effect on non-linear capacitance including trap time constant can be considered. As the result of verification of the model, the proposed model was in good agreement with the measured data of not only AM-AM but also AM-PM.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131489899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：