Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8550904
W. Quan, A. Arabhavi, R. Flueckiger, O. Ostinelli, C. Bolognesi
InP/GaAsSb DHBTs with varying emitter lengths $pmb{L}_{text{E}}$, emitter widths WE, and base metal widths $pmb{W}_{mathbf{B}}$ are characterized to determine their maximum oscillation cutoff frequency $f_{text{MAX}}$ using iterative de-embedding in comparison to the standard OPEN-SHORT and SHORT-OPEN de-embedding schemes. With increasing measurement frequencies the OPEN-SHORT and SHORT-OPEN methods become increasingly subject to pathologies in the Mason Unilateral power gain which corrupt the extracted $f_{mathbf{MAX}}$. In contrast, iterative de-embedding is free of such complications. In the present work, we characterize the $f_{text{MAX}}$ extraction error introduced by the usual de-embedding techniques with respect to iterative de-embedding as a function of DHBT dimensions $pmb{L}_{mathbf{E}},pmb{W}_{mathbf{E}}$, and $pmb{W}_{mathbf{B}}$ to reveal that extracted $pmb{f}_{mathbf{MAX}}$ values are especially sensitive to the emitter width $pmb{W}_{mathbf{E}}$. De-embedding errors appear to carry over to extrinsic collector area which sensitively affects $f_{text{MAX}}$.
{"title":"Iterative De-Embedding and Extracted Maximum Oscillation Frequency $f_{text{MAX}}$ in mm-Wave InP DHBTs: Impact of Device Dimensions on Extraction Errors","authors":"W. Quan, A. Arabhavi, R. Flueckiger, O. Ostinelli, C. Bolognesi","doi":"10.1109/BCICTS.2018.8550904","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8550904","url":null,"abstract":"InP/GaAsSb DHBTs with varying emitter lengths $pmb{L}_{text{E}}$, emitter widths WE, and base metal widths $pmb{W}_{mathbf{B}}$ are characterized to determine their maximum oscillation cutoff frequency $f_{text{MAX}}$ using iterative de-embedding in comparison to the standard OPEN-SHORT and SHORT-OPEN de-embedding schemes. With increasing measurement frequencies the OPEN-SHORT and SHORT-OPEN methods become increasingly subject to pathologies in the Mason Unilateral power gain which corrupt the extracted $f_{mathbf{MAX}}$. In contrast, iterative de-embedding is free of such complications. In the present work, we characterize the $f_{text{MAX}}$ extraction error introduced by the usual de-embedding techniques with respect to iterative de-embedding as a function of DHBT dimensions $pmb{L}_{mathbf{E}},pmb{W}_{mathbf{E}}$, and $pmb{W}_{mathbf{B}}$ to reveal that extracted $pmb{f}_{mathbf{MAX}}$ values are especially sensitive to the emitter width $pmb{W}_{mathbf{E}}$. De-embedding errors appear to carry over to extrinsic collector area which sensitively affects $f_{text{MAX}}$.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"27 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131165981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8550896
Kefei Wu, B. Fahs, M. Hella
This paper presents a novel 220 GHz transmitter based on on-off keying (OOK) modulation in 130 nm SiGe BiCMOS process. An outphasing architecture is explored for the first time beyond 200 GHz to enable the use of nonlinear power amplifier-multiplier chains (AMC) while supporting nonconstant envelope modulation schemes. The transmitter consists of a high speed outphasing modulator and two identical power amplifier frequency doubler chains. The modulator modulates the phase difference of two parallel signal paths between 0° and 90° through a double-pole double-throw (DPDT) switch and two fixed-value phase shifters. A −2 dBm continuous wave output power is measured at 220 GHz with a 3-dB bandwidth of 20 GHz. A data rate of 8 Gb/s is reported at a total DC power consumption of 380 mW.
{"title":"A 220 GHz OOK Outphasing Transmitter in 130-nm BiCMOS Technology","authors":"Kefei Wu, B. Fahs, M. Hella","doi":"10.1109/BCICTS.2018.8550896","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8550896","url":null,"abstract":"This paper presents a novel 220 GHz transmitter based on on-off keying (OOK) modulation in 130 nm SiGe BiCMOS process. An outphasing architecture is explored for the first time beyond 200 GHz to enable the use of nonlinear power amplifier-multiplier chains (AMC) while supporting nonconstant envelope modulation schemes. The transmitter consists of a high speed outphasing modulator and two identical power amplifier frequency doubler chains. The modulator modulates the phase difference of two parallel signal paths between 0° and 90° through a double-pole double-throw (DPDT) switch and two fixed-value phase shifters. A −2 dBm continuous wave output power is measured at 220 GHz with a 3-dB bandwidth of 20 GHz. A data rate of 8 Gb/s is reported at a total DC power consumption of 380 mW.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126316876","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8551149
Toshihiro Shimoda, Yoji Murau, T. Kaneko
This paper deals with the impact of GaN HEMT gate lag on radio performance of LTE TDD amplifier with digital predistorter (DPD). The mechanism of the gate lag with equivalent circuit modelling of GaN HEMT is investigated assuming RC delay circuit. Circuit parameters are extracted experimentally by measuring time constants with various conditions. Parameters related to gate lag is directly correlated with system radio performance for 4G mobile communications. Based on the extracted parameters and comparison of system parameters between 4G-LTE and 5G NR, device parameters required for 5G applications are proposed.
{"title":"Equivalent Circuit Modelling and Parameter Extraction of GaN HEMT Gate Lag Inducing ACLR Degradation of TDD-LTE BTS PA","authors":"Toshihiro Shimoda, Yoji Murau, T. Kaneko","doi":"10.1109/BCICTS.2018.8551149","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8551149","url":null,"abstract":"This paper deals with the impact of GaN HEMT gate lag on radio performance of LTE TDD amplifier with digital predistorter (DPD). The mechanism of the gate lag with equivalent circuit modelling of GaN HEMT is investigated assuming RC delay circuit. Circuit parameters are extracted experimentally by measuring time constants with various conditions. Parameters related to gate lag is directly correlated with system radio performance for 4G mobile communications. Based on the extracted parameters and comparison of system parameters between 4G-LTE and 5G NR, device parameters required for 5G applications are proposed.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"30 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113997351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8550908
R. Ciocoveanu, R. Weigel, A. Hagelauer, V. Issakov
This paper presents a wideband digitally tunable SPST switch based on the travelling-wave concept that has been realized in a 22 nm FD-SOI CMOS technology. The digital control for return loss is performed through mutual inductance switching. Small-signal measurement results show that the proposed SPST switch achieves a bandwidth of 10–110 GHz, with an insertion loss of 1.2 dB at 60 GHz and a 24 dB isolation at 60 GHz, whereas large-signal measurements show a 1-dB compression point of +7 dBm at 24 GHz. Furthermore, the 3 digital control bits allow tuning return loss center frequency by approximately 7 GHz. The chip core size is $0.12 text{mm x} 0.15 text{mm}$.
{"title":"A Low Insertion-Loss 10–110 GHz Digitally Tunable SPST Switch in 22 nm FD-SOI CMOS","authors":"R. Ciocoveanu, R. Weigel, A. Hagelauer, V. Issakov","doi":"10.1109/BCICTS.2018.8550908","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8550908","url":null,"abstract":"This paper presents a wideband digitally tunable SPST switch based on the travelling-wave concept that has been realized in a 22 nm FD-SOI CMOS technology. The digital control for return loss is performed through mutual inductance switching. Small-signal measurement results show that the proposed SPST switch achieves a bandwidth of 10–110 GHz, with an insertion loss of 1.2 dB at 60 GHz and a 24 dB isolation at 60 GHz, whereas large-signal measurements show a 1-dB compression point of +7 dBm at 24 GHz. Furthermore, the 3 digital control bits allow tuning return loss center frequency by approximately 7 GHz. The chip core size is $0.12 text{mm x} 0.15 text{mm}$.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115321760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8550947
J. Klamkin, Hongwei Zhao, B. Song, Yuan Liu, B. Isaac, S. Pinna, F. Sang, L. Coldren
A summary of photonic integrated circuit (PIC) platforms is provided with emphasis on indium phosphide (InP). Examples of InP PICs were fabricated and characterized for free space laser communications, Lidar, and microwave photonics. A novel high-performance hybrid integration technique for merging InP devices with silicon photonics is also discussed.
{"title":"Indium Phosphide Photonic Integrated Circuits: Technology and Applications","authors":"J. Klamkin, Hongwei Zhao, B. Song, Yuan Liu, B. Isaac, S. Pinna, F. Sang, L. Coldren","doi":"10.1109/BCICTS.2018.8550947","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8550947","url":null,"abstract":"A summary of photonic integrated circuit (PIC) platforms is provided with emphasis on indium phosphide (InP). Examples of InP PICs were fabricated and characterized for free space laser communications, Lidar, and microwave photonics. A novel high-performance hybrid integration technique for merging InP devices with silicon photonics is also discussed.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129407648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8551126
Jeongho Hwang, Gyu-Seob Jeong, Sang-Hyeok Chu, Wooseok Kim, Taeik Kim, D. Jeong
This paper presents a crystal-less programmable clock generator. The programmable clock generator takes advantages of both RC and LC oscillators. The frequency reference is generated by the RC oscillator without using expensive external crystals. The sawtooth signal generated from the RC oscillator is sampled by low phase-noise differential clocks which are divided from the LC oscillator. The timing information is then amplified by the sampler which uses hysteresis. An additional block, gain adjuster (GA), reduces lock time and dithering. After the system gets locked, it achieves 0.01 %/V and 25.5 ppm/°C frequency variations for 100 MHz generated clock. The 14 nm FinFET CMOS programmable clock generator draws 28 mA current from a single 1.8 V supply and occupies an active area of 0.12 mm2, It achieves 163 dBc/Hz FoM for 100 MHz test clock.
{"title":"A Crystal-Less Programmable Clock Generator with RC-LC Hybrid Oscillator for GHz Applications in 14 nm FinFET CMOS","authors":"Jeongho Hwang, Gyu-Seob Jeong, Sang-Hyeok Chu, Wooseok Kim, Taeik Kim, D. Jeong","doi":"10.1109/BCICTS.2018.8551126","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8551126","url":null,"abstract":"This paper presents a crystal-less programmable clock generator. The programmable clock generator takes advantages of both RC and LC oscillators. The frequency reference is generated by the RC oscillator without using expensive external crystals. The sawtooth signal generated from the RC oscillator is sampled by low phase-noise differential clocks which are divided from the LC oscillator. The timing information is then amplified by the sampler which uses hysteresis. An additional block, gain adjuster (GA), reduces lock time and dithering. After the system gets locked, it achieves 0.01 %/V and 25.5 ppm/°C frequency variations for 100 MHz generated clock. The 14 nm FinFET CMOS programmable clock generator draws 28 mA current from a single 1.8 V supply and occupies an active area of 0.12 mm2, It achieves 163 dBc/Hz FoM for 100 MHz test clock.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121568448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8551132
T. Soma, S. Hori, K. Kunihiro
We report a wide-bandwidth and high-efficiency supply modulator for an envelope tracking power amplifier. We fabricated a GaAs switching power amplifier monolithic microwave integrated circuit (MMIC), the switching frequency of which is 2 GHz, and measured its performance as a supply modulator. A delta-sigma modulation is used to generate digital input signals for the MMIC. To reduce the switching loss, we added an extra feed-back path to a conventional delta-sigma modulator from the output of the comparator to the input of the accumulator. The supply modulator shows a switching efficiency of 66% and an average output power of 30.5 dBm with a 200 MHz bandwidth orthogonal frequency division multiplexing (OFDM) envelope signal.
{"title":"A 200 MHz Bandwidth GaAs Switch-Mode Supply Modulator","authors":"T. Soma, S. Hori, K. Kunihiro","doi":"10.1109/BCICTS.2018.8551132","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8551132","url":null,"abstract":"We report a wide-bandwidth and high-efficiency supply modulator for an envelope tracking power amplifier. We fabricated a GaAs switching power amplifier monolithic microwave integrated circuit (MMIC), the switching frequency of which is 2 GHz, and measured its performance as a supply modulator. A delta-sigma modulation is used to generate digital input signals for the MMIC. To reduce the switching loss, we added an extra feed-back path to a conventional delta-sigma modulator from the output of the comparator to the input of the accumulator. The supply modulator shows a switching efficiency of 66% and an average output power of 30.5 dBm with a 200 MHz bandwidth orthogonal frequency division multiplexing (OFDM) envelope signal.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116450115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8551089
Cheng Li, Kunzhi Yu, Jinsoo Rhim, Kehan Zhu, Nan Qi, Marco Fiorentino, T. Pinguet, M. Peterson, V. Saxena, S. Palermo
Silicon photonic interconnects have the potential to break bandwidth-distance limitations intrinsically associated with electrical links. This paper presents a dual-mode NRZ/PAM4 silicon photonic transmitter based on a segmented-electrode Mach-Zehnder Modulator (SE-MZM). The electrical portion of the transmitter, fabricated in a 16nm FinFET process, utilizes stacked-CMOS push-pull driver stages that include a parallel asymmetric fast discharging path to compensate for the slow transition edge caused by the nonlinear capacitance of the reversed-biased MZM diode segments. High-speed PAM4 modulation is achieved with phase interpolators for coarse delay control between the MSB and LSB segments and by employing independent digital-controlled delay lines on a per-segment basis to match the optical propagation delay. The 56 Gb/s optical transmitter achieves 9.5 dB extinction ratio and 12.6 pJ/bit power efficiency, excluding laser power, when driving the flip-chip bonded MZM designed in a 130 nm SOI process.
{"title":"A 3D-Integrated 56 Gb/s NRZ/PAM4 Reconfigurable Segmented Mach-Zehnder Modulator-Based Si-Photonics Transmitter","authors":"Cheng Li, Kunzhi Yu, Jinsoo Rhim, Kehan Zhu, Nan Qi, Marco Fiorentino, T. Pinguet, M. Peterson, V. Saxena, S. Palermo","doi":"10.1109/BCICTS.2018.8551089","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8551089","url":null,"abstract":"Silicon photonic interconnects have the potential to break bandwidth-distance limitations intrinsically associated with electrical links. This paper presents a dual-mode NRZ/PAM4 silicon photonic transmitter based on a segmented-electrode Mach-Zehnder Modulator (SE-MZM). The electrical portion of the transmitter, fabricated in a 16nm FinFET process, utilizes stacked-CMOS push-pull driver stages that include a parallel asymmetric fast discharging path to compensate for the slow transition edge caused by the nonlinear capacitance of the reversed-biased MZM diode segments. High-speed PAM4 modulation is achieved with phase interpolators for coarse delay control between the MSB and LSB segments and by employing independent digital-controlled delay lines on a per-segment basis to match the optical propagation delay. The 56 Gb/s optical transmitter achieves 9.5 dB extinction ratio and 12.6 pJ/bit power efficiency, excluding laser power, when driving the flip-chip bonded MZM designed in a 130 nm SOI process.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134336588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8551141
M. Morton, Yan Chen, A. Molnar, Edward C. Szoka, Robin Ying
Funded under DARPA's Arrays on Commercial Timescales (ACT) program, Raytheon and Cornell have developed an RF Sampler technology that integrates highly-linear frequency conversion and filtering into a compact chipset, making it possible to fully leverage commercially-available digital components. With high performance spanning several octaves of bandwidth, the RF Sampler enables diverse yet affordable classes of multifunction digital beamforming systems.
{"title":"The RF Sampler: Chip-Scale Frequency Conversion and Filtering Enabling Affordable Element-Level Digital Beamforming","authors":"M. Morton, Yan Chen, A. Molnar, Edward C. Szoka, Robin Ying","doi":"10.1109/BCICTS.2018.8551141","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8551141","url":null,"abstract":"Funded under DARPA's Arrays on Commercial Timescales (ACT) program, Raytheon and Cornell have developed an RF Sampler technology that integrates highly-linear frequency conversion and filtering into a compact chipset, making it possible to fully leverage commercially-available digital components. With high performance spanning several octaves of bandwidth, the RF Sampler enables diverse yet affordable classes of multifunction digital beamforming systems.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133239115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/BCICTS.2018.8551061
M. Heijden, A. Scholten
This paper highlights some of the modeling and design challenges that we are facing in 5G mm-wave power amplifier (PA) design. Descending from the phased-array system down to the core transistor operation, the critical aspects that influence the performance become apparent. Especially the thermal impact of the total system sets harsh requirements on power dissipation, linearity, ruggedness and reliability of the PA. Therefore, the modeling quality of these characteristics is key in the success of beamformers for 5G mm-wave mobile networks.
{"title":"SiGe HBT PA Design for 5G (28 GHz and Beyond) - Modeling and Design Challenges","authors":"M. Heijden, A. Scholten","doi":"10.1109/BCICTS.2018.8551061","DOIUrl":"https://doi.org/10.1109/BCICTS.2018.8551061","url":null,"abstract":"This paper highlights some of the modeling and design challenges that we are facing in 5G mm-wave power amplifier (PA) design. Descending from the phased-array system down to the core transistor operation, the critical aspects that influence the performance become apparent. Especially the thermal impact of the total system sets harsh requirements on power dissipation, linearity, ruggedness and reliability of the PA. Therefore, the modeling quality of these characteristics is key in the success of beamformers for 5G mm-wave mobile networks.","PeriodicalId":272808,"journal":{"name":"2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114770014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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