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The role of model-based MPC in advanced mask manufacturing 基于模型的MPC在先进掩模制造中的作用
Pub Date : 2017-09-28 DOI: 10.1117/12.2281894
I. Bork, P. Buck
This paper describes the use of model-based MPC in mask manufacturing for the 14 nm technology node and beyond, analyzes the requirements and challenges for introducing MPC and highlights its benefits in the mask manufacturing process.
本文介绍了基于模型的MPC在14nm及以上节点掩模制造中的应用,分析了引入MPC的要求和挑战,并强调了其在掩模制造过程中的优势。
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引用次数: 4
Parallel compression/decompression-based datapath architecture for multibeam mask writers 基于并行压缩/解压缩的多波束掩码编写器数据路径架构
Pub Date : 2017-09-28 DOI: 10.1117/12.2279737
N. Chaudhary, S. Savari
Multibeam electron beam systems will be used in the future for mask writing and for complimentary lithography. The major challenges of the multibeam systems are in meeting throughput requirements and in handling the large data volumes associated with writing grayscale data on the wafer. In terms of future communications and computational requirements Amdahl’s Law suggests that a simple increase of computation power and parallelism may not be a sustainable solution. We propose a parallel data compression algorithm to exploit the sparsity of mask data and a grayscale video-like representation of data. To improve the communication and computational efficiency of these systems at the write time we propose an alternate datapath architecture partly motivated by multibeam direct write lithography and partly motivated by the circuit testing literature, where parallel decompression reduces clock cycles. We explain a deflection plate architecture inspired by NuFlare Technology’s multibeam mask writing system and how our datapath architecture can be easily added to it to improve performance.
多束电子束系统将在未来用于掩模书写和附加光刻。多波束系统的主要挑战是满足吞吐量要求,以及处理与在晶圆上写入灰度数据相关的大数据量。就未来的通信和计算需求而言,Amdahl定律表明,简单地增加计算能力和并行性可能不是一个可持续的解决方案。我们提出了一种并行数据压缩算法来利用掩码数据的稀疏性和数据的灰度视频表示。为了提高这些系统在写入时的通信和计算效率,我们提出了一种替代数据路径架构,部分由多波束直接写入光刻技术驱动,部分由电路测试文献驱动,其中并行解压缩减少了时钟周期。我们解释了受NuFlare Technology的多波束掩模书写系统启发的偏转板架构,以及如何将我们的数据路径架构轻松添加到其中以提高性能。
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引用次数: 1
Contour-based etch modeling enablement: from pattern selection to final verification 基于轮廓的蚀刻建模支持:从模式选择到最终验证
Pub Date : 2017-09-28 DOI: 10.1117/12.2279694
Jirka Schatz, F. Weisbuch, A. Lutich
Traditional CD-SEM metrology reaches its limits when measuring complex configurations (e.g. advanced node contact configurations). SEM extracted contours embody valuable information which is essential for building a robust etch prediction model [1, 2]. CDSEM recipe complexity, processing time and measurement robustness can be improved using contour based metrology. However, challenges for measurement pattern selection as well as final model verification arise. In this work, we present the full flow of implementing etch prediction models calibrated and verified with SEM contours into a manufacturing environment.
传统的CD-SEM测量在测量复杂结构(如高级节点接触结构)时达到了极限。SEM提取的轮廓包含有价值的信息,这些信息对于构建稳健的蚀刻预测模型至关重要[1,2]。采用等高线计量可以提高CDSEM的配方复杂度、处理时间和测量鲁棒性。然而,测量模式的选择以及最终的模型验证出现了挑战。在这项工作中,我们介绍了在制造环境中使用SEM轮廓校准和验证蚀刻预测模型的完整流程。
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引用次数: 1
Update on optical material properties for alternative EUV mask absorber materials 替代EUV掩模吸收材料光学材料性能的最新进展
Pub Date : 2017-09-28 DOI: 10.1117/12.2279702
F. Scholze, C. Laubis, Kim Vu Luong, V. Philipsen
The application of EUV lithography at the 7 nm node and below requires, among others, to reduce 3D mask effects1 like shadowing e.g. by introducing a thinner absorber structure. A search for new potential absorber materials with improved optical properties is done within the ECSEL JU project SeNaTe2,3,4,5. The standard Ta-based absorber system of the actual photomasks has been optically characterized in detail as the benchmark. The results are in agreement with the optical data presently used in the optical modeling of EUV photomasks. As candidates for an alternative absorber material, Ni, Co, NiAl are investigated. For the investigation of the alternative EUV mask absorber materials, metal layers of several 10 nm were deposited on silicon wafers. At PTB the spectral reflectance was measured in the angular range from normal incidence to grazing incidence in a wavelength band from 10 nm to 16 nm using PTB’s lubricationfree Ellipso-Scatterometer at the soft X-ray radiometry beamline. The measured reflectance is then fitted using Fresnel’s equations to a layer model accounting for thickness and roughness of the metal layer and additional top-oxide and a SiO2 layer on the Si-substrate surface. We present here an update on the optical constants of Ni, Co and NiAl layers.
EUV光刻技术在7nm及以下节点的应用需要减少3D掩模效应,例如通过引入更薄的吸收结构来减少阴影。在ECSEL JU项目senate2,3,4,5中,研究了具有改进光学性能的新型电位吸收材料。作为基准,对实际光掩膜的标准ta基吸收系统进行了详细的光学表征。所得结果与目前用于EUV掩膜光学建模的光学数据一致。研究了镍、钴、NiAl作为吸收材料的备选材料。为了研究替代的EUV掩膜吸收材料,在硅片上沉积了几层10 nm的金属层。在PTB,使用PTB的无润滑椭圆散射计在软x射线辐射测量光束线上测量了10 ~ 16 nm波长范围内从正入射到掠入射的光谱反射率。然后使用菲涅耳方程将测量的反射率拟合到考虑金属层的厚度和粗糙度以及硅衬底表面附加的顶氧化物和SiO2层的层模型中。本文更新了Ni、Co和NiAl层的光学常数。
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引用次数: 16
Depth-profiling of vertical material contrast after VUV exposure for contact-free polishing of 3D polymer micro-optics 三维聚合物微光学无接触抛光VUV曝光后垂直材料对比度的深度轮廓
Pub Date : 2017-09-28 DOI: 10.1117/12.2279712
R. Kirchner, Roel Hoekstra, N. Chidambaram, H. Schift
We characterize the impact of high-energy, 172 nm vacuum ultraviolet photons on the molecular weight and the glass transition temperature of poly(methyl methacrylate). We found that the molecular weight is reduced strongly on the surface of the exposed samples with a continuous transition towards the unexposed bulk material being located below the modified region. The glass transition temperature was found to be significantly lowered in the exposed region to well below 50°C compared to that of the 122°C of the bulk region. We could use this material contrast to selectively reflow the top surface of the exposed samples only. This allowed us to create ultra-smooth micro-optical structures by post-processing without influencing the overall geometry that is required for the optical functionality.
研究了172 nm的高能真空紫外光子对聚甲基丙烯酸甲酯的分子量和玻璃化转变温度的影响。我们发现,暴露样品表面的分子量随着向位于修饰区域下方的未暴露体材料的连续过渡而强烈减少。与本体区122℃相比,暴露区玻璃化转变温度显著降低至远低于50℃。我们可以使用这种材料对比有选择地回流暴露样品的顶部表面。这使我们能够通过后处理创建超光滑的微光学结构,而不会影响光学功能所需的整体几何形状。
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引用次数: 2
Technical trends of large-size photomasks for flat panel displays 平板显示器用大尺寸光罩的技术发展趋势
Pub Date : 2017-09-28 DOI: 10.1117/12.2279601
Koichiro Yoshida
Currently, flat panel displays (FPDs) are one of the main parts for information technology devices and sets. From 1990's to 2000's, liquid crystal displays (LCDs) and plasma displays had been mainstream FPDs. In the middle of 2000's, demand of plasma displays declined and organic light emitting diodes (OLEDs) newly came into FPD market. And today, major technology of FPDs are LCDs and OLEDs. Especially for mobile devices, the penetration of OLEDs is remarkable. In FPDs panel production, photolithography is the key technology as same as LSI. Photomasks for FPDs are used not only as original master of circuit pattern, but also as a tool to form other functional structures of FPDs. Photomasks for FPDs are called as "Large Size Photomasks(LSPMs)", since the remarkable feature is " Size" which reaches over 1- meter square and over 100kg. In this report, we discuss three LSPMs technical topics with FPDs technical transition and trend. The first topics is upsizing of LSPMs, the second is the challenge for higher resolution patterning, and the last is “Multi-Tone Mask” for "Half -Tone Exposure".
目前,平板显示器(FPDs)是信息技术设备和电视机的主要部件之一。从20世纪90年代到21世纪初,液晶显示器(lcd)和等离子显示器一直是主流的显示显示器。2000年代中期,等离子体显示器需求下降,有机发光二极管(oled)新进入FPD市场。目前,液晶显示器(lcd)和有机发光二极管(oled)是液晶显示器的主要技术。特别是在移动设备方面,oled的渗透率是显著的。在FPDs面板生产中,光刻技术与LSI一样是关键技术。光掩模不仅可以作为电路图形的原始主控元件,还可以作为构成光掩模其他功能结构的工具。用于fpd的光掩膜被称为“大尺寸光掩膜(LSPMs)”,因为其显著的特征是“尺寸”超过1平方米,超过100公斤。在本报告中,我们讨论了三个LSPMs技术主题与FPDs技术转型和趋势。第一个主题是lspm的放大,第二个主题是更高分辨率图案的挑战,最后一个主题是“半色调曝光”的“多色调掩模”。
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引用次数: 2
Improvements in the imaging performance of a high volume manufacturing EUV scanner with a special emphasis on the added value of the new illuminator for increased pupil flexibility 高容量制造EUV扫描仪的成像性能改进,特别强调新光源的附加值,以增加瞳孔的灵活性
Pub Date : 2017-09-28 DOI: 10.1117/12.2280379
B. Bilski, Ziyang Wang, F. Wittebrood, J. McNamara, D. Oorschot, M. A. van de Kerkhof, T. Fliervoet
With the introduction of the NXE:3400B EUV scanner, ASML brings to the market the next generation NXE system. In this paper we present the results of a subset of a larger investigation that aimed at assessing the imaging performance of the NXE:3400B in various scenarios. The use cases we chose for the presentation here are contact holes, which are typical building blocks for logic and memory applications. In this paper we evaluate typical lithographic metrics. Starting from the exposure latitude, we show that contact holes of already 17nm half-pitch can be printed. Next, we show that the full wafer CD uniformity improvement is mainly driven by a high reticle CD uniformity. After that, we explore the capabilities of the new NXE:3400B illuminator and investigate an improved illumination setting for relaxed staggered contact holes of half pitch >21nm, and show a 20% local CD uniformity improvement (from 4.6 to 3.6nm) for regular contact holes of 18nm half-pitch, without throughput loss.
随着NXE:3400B EUV扫描仪的推出,ASML为市场带来了下一代NXE系统。在本文中,我们展示了一项旨在评估NXE:3400B在各种场景下成像性能的大型调查的一个子集的结果。我们在这里为演示选择的用例是接触孔,它是逻辑和内存应用程序的典型构建块。本文对典型的光刻工艺进行了评价。从曝光纬度开始,我们发现可以打印半间距为17nm的接触孔。接下来,我们展示了全晶圆CD均匀性的改善主要是由高十字CD均匀性驱动的。之后,我们探索了新的NXE:3400B照明器的性能,并研究了半间距>21nm的放松交错接触孔的改进照明设置,并显示了18nm半间距的常规接触孔在没有吞吐量损失的情况下将局部CD均匀性提高了20%(从4.6 nm提高到3.6nm)。
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引用次数: 1
New overlay measurement technique with an i-line stepper using embedded standard field image alignment marks for wafer bonding applications 新的覆盖测量技术与i-线步进使用嵌入式标准场图像对准标记的晶圆键合应用
Pub Date : 2017-09-28 DOI: 10.1117/12.2279621
P. Kulse, K. Sasai, K. Schulz, M. Wietstruck
In the last decades the semiconductor technology has been driven by Moore’s law leading to high performance CMOS technologies with feature sizes of less than 10 nm [1]. It has been pointed out that not only scaling but also the integration of novel components and technology modules into CMOS/BiCMOS technologies is becoming more attractive to realize smart and miniaturized systems [2]. Driven by new applications in the area of communication, health and automation, new components and technology modules such as BiCMOS embedded RF-MEMS, high-Q passives, Sibased microfluidics and InP-SiGe BiCMOS heterointegration have been demonstrated [3-6]. In contrast to standard VLSI processes fabricated on front side of the silicon wafer, these new technology modules require addition backside processing of the wafer; thus an accurate alignment between the front and backside of the wafer is mandatory. In previous work an advanced back to front side alignment technique and implementation into IHP’s 0.25/0.13 μm high performance SiGe:C BiCMOS backside process module has been presented [7]. The developed technique enables a high resolution and accurate lithography on the backside of BiCMOS wafer for additional backside processing. In addition to the aforementioned back side process technologies, new applications like Through-Silicon Vias (TSV) for interposers and advanced substrate technologies for 3D heterogeneous integration demand not only single wafer fabrication but also processing of wafer stacks provided by temporary and permanent wafer bonding [8]. Therefore, the available overlay measurement techniques are not suitable if overlay and alignment marks are realized at the bonding interface of a wafer stack which consists of both a silicon device and a silicon carrier wafer. The former used EVG 40NT automated overlay measurement system, which use two opposite positioned microscopes inspecting simultaneous the wafer back and front side, is not capable measuring embedded overlay marks. In this work, the non-contact infrared alignment system of the Nikon i-line Stepper NSR-SF150 for both the alignment and the overlay determination of bonded wafer stacks with embedded alignment marks are used to achieve an accurate alignment between the different wafer sides. The embedded field image alignment (FIA) marks of the interface and the device wafer top layer are measured in a single measurement job. By taking the offsets between all different FIA’s into account, after correcting the wafer rotation induced FIA position errors, hence an overlay for the stacked wafers can be determined. The developed approach has been validated by a standard back to front side application. The overlay was measured and determined using both, the EVG NT40 automated measurement system with special overlay marks and the measurement of the FIA marks of the front and back side layer. A comparison of both results shows mismatches in x and y translations smaller than 200 nm, which is relatively smal
在过去的几十年里,半导体技术一直受到摩尔定律的推动,导致了特征尺寸小于10纳米的高性能CMOS技术。本文指出,为了实现系统的智能化和微型化,不仅要实现微型化,而且要将新型元件和技术模块集成到CMOS/BiCMOS技术中。在通信、健康和自动化领域的新应用的推动下,BiCMOS嵌入式RF-MEMS、高q无源、硅基微流体和InP-SiGe BiCMOS异质集成等新组件和技术模块得到了展示[3-6]。与在硅片正面制造的标准VLSI工艺相比,这些新技术模块需要对硅片进行额外的背面处理;因此,晶圆片的正面和背面之间的精确对准是必须的。在之前的工作中,已经提出了一种先进的前后侧面对准技术,并将其实现到IHP的0.25/0.13 μm高性能SiGe:C BiCMOS背面工艺模块中。所开发的技术可以在BiCMOS晶圆背面进行高分辨率和精确的光刻,以进行额外的背面处理。除了前面提到的背面工艺技术,新的应用,如用于中间层的硅通孔(TSV)和用于3D异质集成的先进衬底技术,不仅需要单晶圆制造,还需要临时和永久晶圆键合[8]提供的晶圆堆处理。因此,如果在由硅器件和硅载体晶圆组成的晶圆堆的键合界面上实现覆盖和对准标记,现有的覆盖测量技术就不适用了。前者采用EVG 40NT自动叠加测量系统,采用两台位置相对的显微镜同时检测晶圆背面和正面,无法测量嵌入的叠加痕迹。在这项工作中,使用尼康i线步进器NSR-SF150的非接触式红外对准系统对嵌入了对准标记的键合晶圆堆叠进行对准和覆盖确定,以实现不同晶圆侧面之间的精确对准。在一次测量作业中测量了接口和器件晶圆顶层的嵌入式场图像对准(FIA)标记。通过考虑所有不同FIA之间的偏移量,在校正晶圆旋转引起的FIA位置误差后,可以确定堆叠晶圆的覆盖层。所开发的方法已通过一个标准的后前端应用程序进行了验证。覆盖层的测量和确定采用EVG NT40专用覆盖层自动测量系统和前后侧层FIA标记的测量。两种结果的比较表明,x和y平移的不匹配小于200 nm,这与背面到正面工艺的±500 nm的覆盖公差相比相对较小。在成功验证了所开发的技术后,在键合界面上制作了具有FIA对准标记的特殊晶圆堆。由于双面抛光晶圆具有超强的红外光透明度,嵌入的FIA标记产生稳定清晰的信号,用于精确的x和y晶圆坐标定位。在没有红外照射的条件下,在标准条件下测量了器件晶圆顶层的FIA标记。下面的覆盖计算显示,覆盖层小于200 nm,这为高规模TSV集成和先进的衬底集成到IHP的0.25/0.13 μm SiGe:C BiCMOS技术提供了非常精确的工艺条件。该方法既适用于标准的前后侧工艺技术,也适用于新的临时和永久晶圆键合应用。
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引用次数: 0
Multi-beam mask writer MBM-1000 多波束掩模编写器MBM-1000
Pub Date : 2017-09-28 DOI: 10.1117/12.2280453
Hiroshi Matsumoto, H. Yamashita, T. Tamura, K. Ohtoshi
Multi-beam mask writer MBM-1000 will be released in Q4 2017 for N5 semiconductor production. The motivation to go to multi-beam is high throughput at aggressive shot count. MBM-1000 performs better than EBM-9500, which is our latest VSB writer, at shot count of 500 G/pass or more because of exposure count and beam current independent to figure count. Key technology for high throughput is cathode and high-voltage power supply which provides large beam emission current, inline data path and blanking aperture array (BAA) with 300 Gbps data ratio. In this paper, design of data path and BAA for MBM-1000 are described.
多波束掩模编写器MBM-1000将于2017年第四季度发布,用于N5半导体生产。采用多波束的动机是高吞吐量和高射数。MBM-1000的性能优于EBM-9500,这是我们最新的VSB写入器,在500 G/pass或更多的射击计数,因为曝光计数和光束电流独立于数字计数。高吞吐量的关键技术是提供大光束发射电流的阴极高压电源、内联数据路径和数据比为300 Gbps的消隐孔径阵列(BAA)。本文介绍了MBM-1000的数据路径和BAA的设计。
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引用次数: 0
Line edge roughness measurement through SEM images: effects of image digitization and their mitigation 通过扫描电镜图像测量线边缘粗糙度:图像数字化的影响及其缓解
Pub Date : 2017-09-28 DOI: 10.1117/12.2294060
G. Papavieros, V. Constantoudis
Line Edge Roughness is largely used in the current semiconductor research and industry for the evaluation of materials and processes since it is considered one of the critical factors to degrade device performance. Therefore, its accurate measurement and complete characterization though complicated is highly required. LER measurement is usually based on the analysis of top-down SEM images. As a result, it suffers from the limitations of image-based metrology which among others are the presence of noise and the digital nature of images. Recently, several studies have paid attention on the impact of image noise on LER metrics and the aliasing effects on the Power Spectrum Density curves caused by the discreteness of edge data along line/edge direction. However, image digitization imposes discretization of edge data also in the vertical to edge/line direction. In this paper, we focus on the effects of this aspect of edge data discretization on LER rms value and PSD curve. We explain and analyze the effect using synthesized SEM images and identify the critical role of the ratio of rms to pixel size. We find that for such ratios larger than 0.6, the image digitization has a fixed contribution to the measured rms roughness and PSD which should be removed to mitigate these effects.
线边缘粗糙度被认为是降低器件性能的关键因素之一,因此在当前的半导体研究和工业中广泛用于评估材料和工艺。因此,它的精确测量和完整的表征虽然复杂,是非常必要的。LER测量通常基于对自上而下的SEM图像的分析。因此,它受到基于图像的计量的限制,其中包括噪声的存在和图像的数字性质。近年来,一些研究开始关注图像噪声对LER指标的影响,以及边缘数据沿线/边缘方向离散导致的功率谱密度曲线的混叠效应。然而,图像数字化也会在垂直到边缘/线的方向上对边缘数据进行离散化。本文重点研究了这方面的边缘数据离散化对LER均方根值和PSD曲线的影响。我们使用合成的SEM图像解释和分析了这种影响,并确定了均方根与像素尺寸之比的关键作用。我们发现,对于大于0.6的比值,图像数字化对测量的均方根粗糙度和PSD有固定的贡献,应该去除这些贡献以减轻这些影响。
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引用次数: 10
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European Mask and Lithography Conference
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