Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355185
M. Aldrigo, M. Dragoman, L. Pierantoni, D. Mencarelli, G. Deligeorgis
In this paper we present a new way of biasing the graphene radiator of a coplanar patch antenna by exploiting an ad-hoc designed backside metallization. Due to the intrinsic physical properties of graphene, this would represent the most effective way to tune antenna matching and radiation characteristics by tuning graphene surface impedance. Simulation results are provided, showing that the proposed background metal plane does not affect antenna performance, thus guaranteeing an effective back-gate biasing technique.
{"title":"Back-gate bias of a graphene antenna via a smart background metallization","authors":"M. Aldrigo, M. Dragoman, L. Pierantoni, D. Mencarelli, G. Deligeorgis","doi":"10.1109/SMICND.2015.7355185","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355185","url":null,"abstract":"In this paper we present a new way of biasing the graphene radiator of a coplanar patch antenna by exploiting an ad-hoc designed backside metallization. Due to the intrinsic physical properties of graphene, this would represent the most effective way to tune antenna matching and radiation characteristics by tuning graphene surface impedance. Simulation results are provided, showing that the proposed background metal plane does not affect antenna performance, thus guaranteeing an effective back-gate biasing technique.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123824026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355205
Florin Bîzîitu
The proposed circuit uses a Dickson-type charge pump core with adaptive control of the supply voltage in order to improve the power efficiency. The battery referred “floating ground” used for supplying the charge pump core is implemented using a shunt voltage regulator instead of the more traditional series voltage regulator in an effort to control the radiated emissions of the circuit.
{"title":"Dickson charge pump regulation mechanism optimized for EMC performance","authors":"Florin Bîzîitu","doi":"10.1109/SMICND.2015.7355205","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355205","url":null,"abstract":"The proposed circuit uses a Dickson-type charge pump core with adaptive control of the supply voltage in order to improve the power efficiency. The battery referred “floating ground” used for supplying the charge pump core is implemented using a shunt voltage regulator instead of the more traditional series voltage regulator in an effort to control the radiated emissions of the circuit.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130542218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355211
L. Efthymiou, G. Longobardi, G. Camuso, A. P. Hsieh, F. Udrea
This paper describes a method to extract the ideality factor, barrier height and series resistance of a lateral AlGaN/GaN heterostructure power Schottky diode using a simple I-V measurement in on-state and sub-threshold domains. An analytical model previously developed for Gallium Arsenide (GaAs) and Silicon vertical diodes [1] is applied to lateral AlGaN/GaN Schottky diodes and calibrated using extensive experimental results. The validity of the model at increased temperatures (up to 428K) is also investigated and the dependence of the ideality factor and barrier height with temperature are obtained and assessed against those previously reported in the literature [2].
{"title":"Modelling of an AlGaN/GaN Schottky diode and extraction of main parameters","authors":"L. Efthymiou, G. Longobardi, G. Camuso, A. P. Hsieh, F. Udrea","doi":"10.1109/SMICND.2015.7355211","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355211","url":null,"abstract":"This paper describes a method to extract the ideality factor, barrier height and series resistance of a lateral AlGaN/GaN heterostructure power Schottky diode using a simple I-V measurement in on-state and sub-threshold domains. An analytical model previously developed for Gallium Arsenide (GaAs) and Silicon vertical diodes [1] is applied to lateral AlGaN/GaN Schottky diodes and calibrated using extensive experimental results. The validity of the model at increased temperatures (up to 428K) is also investigated and the dependence of the ideality factor and barrier height with temperature are obtained and assessed against those previously reported in the literature [2].","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123795221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355167
Takahiro Suzuki, S. Ando
CuInSe2 (CIS) thin films prepared on quartz substrates by the spin-coating method using the nanoparticles of CIS have been investigated by X-ray diffraction, scanning electron microscope, energy dispersive X-ray analysis. The chemical composition of CIS thin films sintered in N2 atmosphere was Se/metal(Cu+In) = 0.55 or 0.58, indicating a deficiency of selenium. However, CIS thin films sintered in atmosphere of N2 including Se vapor were improved Se/metal molar ratio. It can be seen that the improvement of crystallinity of CIS thin films using the nanoparticles of CIS were relatively effective for the sintering time and the sintering Se vapor.
{"title":"Preparation and characterizations of CuInSe2 thin films by spin-coating method using the nanoparticles of CuInSe2","authors":"Takahiro Suzuki, S. Ando","doi":"10.1109/SMICND.2015.7355167","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355167","url":null,"abstract":"CuInSe2 (CIS) thin films prepared on quartz substrates by the spin-coating method using the nanoparticles of CIS have been investigated by X-ray diffraction, scanning electron microscope, energy dispersive X-ray analysis. The chemical composition of CIS thin films sintered in N2 atmosphere was Se/metal(Cu+In) = 0.55 or 0.58, indicating a deficiency of selenium. However, CIS thin films sintered in atmosphere of N2 including Se vapor were improved Se/metal molar ratio. It can be seen that the improvement of crystallinity of CIS thin films using the nanoparticles of CIS were relatively effective for the sintering time and the sintering Se vapor.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131249518","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355214
N. Donato, M. Antoniou, E. Napoli, G. Amaratunga, F. Udrea
In this paper we present a numerical analysis of Schottky Barrier Diodes (SBDs) based on CVD (Chemical Vapour Deposition) Diamond. Material and interface models suitable for TCAD (Technology Computer Aided Design) finite element simulations were implemented in the software and their validity was assessed against experimental results obtained on MIP+(Metal-Intrinsic layer-highly P doped substrate) SBDs with Al and Au as Schottky metal contacts both at room and higher temperature conditions. The paper also highlights the need to improve such TCAD models since the complex behavior of Diamond based devices is still not well captured in static and dynamic conditions. The present work also discusses the role of the Oxygen surface interface in the on state performances of the SBDs.
{"title":"On the models used for TCAD simulations of Diamond Schottky Barrier Diodes","authors":"N. Donato, M. Antoniou, E. Napoli, G. Amaratunga, F. Udrea","doi":"10.1109/SMICND.2015.7355214","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355214","url":null,"abstract":"In this paper we present a numerical analysis of Schottky Barrier Diodes (SBDs) based on CVD (Chemical Vapour Deposition) Diamond. Material and interface models suitable for TCAD (Technology Computer Aided Design) finite element simulations were implemented in the software and their validity was assessed against experimental results obtained on MIP+(Metal-Intrinsic layer-highly P doped substrate) SBDs with Al and Au as Schottky metal contacts both at room and higher temperature conditions. The paper also highlights the need to improve such TCAD models since the complex behavior of Diamond based devices is still not well captured in static and dynamic conditions. The present work also discusses the role of the Oxygen surface interface in the on state performances of the SBDs.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130476506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355184
A. Bunea, D. Neculoiu, M. Lahti, T. Vaha-Heikkila
This paper presents the design, electromagnetic simulation and experimental results of a 94 GHz microstrip patch antenna with four parasitic patches. The structure was designed for a six tape Low Temperature Co-Fired Ceramics process (LTCC). The antenna element is fed by a substrate integrated waveguide, taking advantage of the 3D vertical integration possibilities of the LTCC technology. The measured input matching bandwidth (|S11| <; - 10 dB) is between 89.5 - 95.9 GHz. The measured half-power gain bandwidth is between 80 - 103 GHz.
{"title":"Substrate integrated waveguide fed LTCC microstrip patch antenna for 94 GHz applications","authors":"A. Bunea, D. Neculoiu, M. Lahti, T. Vaha-Heikkila","doi":"10.1109/SMICND.2015.7355184","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355184","url":null,"abstract":"This paper presents the design, electromagnetic simulation and experimental results of a 94 GHz microstrip patch antenna with four parasitic patches. The structure was designed for a six tape Low Temperature Co-Fired Ceramics process (LTCC). The antenna element is fed by a substrate integrated waveguide, taking advantage of the 3D vertical integration possibilities of the LTCC technology. The measured input matching bandwidth (|S11| <; - 10 dB) is between 89.5 - 95.9 GHz. The measured half-power gain bandwidth is between 80 - 103 GHz.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133259407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355217
A. Tulbure, C. Huţanu, G. Brezeanu
The semiconductors impedance is a primary electrical parameter that determines the performance of electronic devices and circuits. For this reason many papers [1,] [2], [3] discus the frequency-dependent impedance of semiconductor junctions. Subject of this contribution is the investigation of physical model of the diode and bipolar power semiconductor devices (silicon) in the low frequency range between 0-100kHz. The goal of this contribution is to demonstrate through experimental measurements that the impedance of the power semiconductors depends on the signal frequency, junction's geometry and properties of the electronic structure. In the paper a procedure for computing the equivalent semiconductor impedance has been described and by experiments validated.
{"title":"Small signal impedance analysis of high efficient power devices","authors":"A. Tulbure, C. Huţanu, G. Brezeanu","doi":"10.1109/SMICND.2015.7355217","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355217","url":null,"abstract":"The semiconductors impedance is a primary electrical parameter that determines the performance of electronic devices and circuits. For this reason many papers [1,] [2], [3] discus the frequency-dependent impedance of semiconductor junctions. Subject of this contribution is the investigation of physical model of the diode and bipolar power semiconductor devices (silicon) in the low frequency range between 0-100kHz. The goal of this contribution is to demonstrate through experimental measurements that the impedance of the power semiconductors depends on the signal frequency, junction's geometry and properties of the electronic structure. In the paper a procedure for computing the equivalent semiconductor impedance has been described and by experiments validated.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132022474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355238
C. Pleşa, C. Răducan, M. Neag, L. Radoias
This paper presents novel circuit solutions for two issues related to the Enable control of low-dropout (LDO) voltage regulators: setting precise voltage thresholds for the ON/OFF states of the LDO and ensuring that in the OFF state the LDO output is not affected by fast variations of the supply voltage. First, an Enable circuit with hysteresis and temperature compensated thresholds is described: the accuracy of its threshold voltages - including their low temperature coefficients - are predicted by analytical analysis and validated by measurements performed on a silicon implementation. Second, a simple yet effective comparator is proposed, able to significantly reduce the effect the supply voltage variations have on the output voltage when the regulator is in OFF state. Simulation results show that, when the supply voltage varies from 0 to 28V in 28μs, the overshoot of the output voltage is reduced from 5.5V to under 200mV, that is by a factor of 35.
{"title":"Precise and robust enable control circuitry for LDO voltage regulators","authors":"C. Pleşa, C. Răducan, M. Neag, L. Radoias","doi":"10.1109/SMICND.2015.7355238","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355238","url":null,"abstract":"This paper presents novel circuit solutions for two issues related to the Enable control of low-dropout (LDO) voltage regulators: setting precise voltage thresholds for the ON/OFF states of the LDO and ensuring that in the OFF state the LDO output is not affected by fast variations of the supply voltage. First, an Enable circuit with hysteresis and temperature compensated thresholds is described: the accuracy of its threshold voltages - including their low temperature coefficients - are predicted by analytical analysis and validated by measurements performed on a silicon implementation. Second, a simple yet effective comparator is proposed, able to significantly reduce the effect the supply voltage variations have on the output voltage when the regulator is in OFF state. Simulation results show that, when the supply voltage varies from 0 to 28V in 28μs, the overshoot of the output voltage is reduced from 5.5V to under 200mV, that is by a factor of 35.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"160 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114330164","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355226
H. Hamad, C. Raynaud, P. Bevilacqua, D. Planson
Wide bandgap semiconductors such as silicon carbide, gallium nitride and diamond have been recently investigated in order to replace silicon in the power electronic domain. In this paper, silicon carbide devices are studied using an optical method. It consists on illuminating a reverse biased junction with a laser beam with an appropriate wavelength, and then measuring the induced current due to the photon absorption. According to the wavelength, one- or two-photon absorption is triggered when photon energy is respectively higher or lower than the semiconductor bandgap. In the latter case, the probability of electron hole pair (EHP) generation is very small, which leads to use a powerful incident beam. In this paper, two-photon generation is used in order to determine the lifetime of minority charge carriers in N doped 4H-SiC. The incident beam is a pulsed green source with a wavelength of 532 nm and a high power density that can reach up to 6 GW.cm-2. Test devices are PN diodes protected by a junction termination extension (JTE). Results show a hole's lifetime of 730 ns.
{"title":"Lifetime of holes determination in 4H-SiC using two-photon optical beam induced current method","authors":"H. Hamad, C. Raynaud, P. Bevilacqua, D. Planson","doi":"10.1109/SMICND.2015.7355226","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355226","url":null,"abstract":"Wide bandgap semiconductors such as silicon carbide, gallium nitride and diamond have been recently investigated in order to replace silicon in the power electronic domain. In this paper, silicon carbide devices are studied using an optical method. It consists on illuminating a reverse biased junction with a laser beam with an appropriate wavelength, and then measuring the induced current due to the photon absorption. According to the wavelength, one- or two-photon absorption is triggered when photon energy is respectively higher or lower than the semiconductor bandgap. In the latter case, the probability of electron hole pair (EHP) generation is very small, which leads to use a powerful incident beam. In this paper, two-photon generation is used in order to determine the lifetime of minority charge carriers in N doped 4H-SiC. The incident beam is a pulsed green source with a wavelength of 532 nm and a high power density that can reach up to 6 GW.cm-2. Test devices are PN diodes protected by a junction termination extension (JTE). Results show a hole's lifetime of 730 ns.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124036150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-17DOI: 10.1109/SMICND.2015.7355155
C. Palade, A. Slav, A. Lepadatu, A. Maraloiu, V. Teodorescu, M. Ciurea
The charge storage properties of Ge nanocrystals-based MOS-like capacitors with tunnel and gate HfO2 are studied. HfO2/Ge/HfO2/Si trilayer structures were prepared by magnetron sputtering (in Ar) and subsequent rapid thermal annealing (650 °C). HfO2/Si structures were also prepared, some under similar conditions, while others were deposited in Ar:O2. TEM investigations and C-V measurements were performed. TEM on annealed trilayers evidences the formation of ordered and precisely positioned array of Ge nanocrystals embedded in crystalline HfO2. The annealed Al/HfO2/Ge/HfO2/p-Si/Al capacitors present counterclockwise C-V hysteresis (0.8 V memory window) mainly given by Ge nanocrystals, with negligible contribution from crystallized-HfO2 traps.
{"title":"HfO2 with embedded Ge nanocrystals with memory effects","authors":"C. Palade, A. Slav, A. Lepadatu, A. Maraloiu, V. Teodorescu, M. Ciurea","doi":"10.1109/SMICND.2015.7355155","DOIUrl":"https://doi.org/10.1109/SMICND.2015.7355155","url":null,"abstract":"The charge storage properties of Ge nanocrystals-based MOS-like capacitors with tunnel and gate HfO<sub>2</sub> are studied. HfO<sub>2</sub>/Ge/HfO<sub>2</sub>/Si trilayer structures were prepared by magnetron sputtering (in Ar) and subsequent rapid thermal annealing (650 °C). HfO<sub>2</sub>/Si structures were also prepared, some under similar conditions, while others were deposited in Ar:O<sub>2</sub>. TEM investigations and C-V measurements were performed. TEM on annealed trilayers evidences the formation of ordered and precisely positioned array of Ge nanocrystals embedded in crystalline HfO<sub>2</sub>. The annealed Al/HfO<sub>2</sub>/Ge/HfO<sub>2</sub>/p-Si/Al capacitors present counterclockwise C-V hysteresis (0.8 V memory window) mainly given by Ge nanocrystals, with negligible contribution from crystallized-HfO<sub>2</sub> traps.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"13 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120981137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：