Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.962905
S. Kono, T. Masui, Y. Ohyama
In 300 mm diameter wafer fabrication line, concrete infrastructure that enables high degree of line operation is essential to minimize the cost and the risk of new 300 mm fab infrastructure and integration. Equipment online communication is an essential technology as fab infrastructure. Based on CIM-GJG and SEMI standards, Selete (Semiconductor Leading Edge Technologies, Inc.) has been developed unified process tool communication specification and its test specification at implementation level. These specifications will be used as base specifications among device makers and give directions of design and implementation at equipment suppliers.
在直径300毫米的晶圆生产线中，混凝土基础设施能够实现高度的生产线操作，这对于最小化新的300毫米晶圆厂基础设施和集成的成本和风险至关重要。设备在线通信是晶圆厂基础设施的一项重要技术。Selete (Semiconductor Leading Edge Technologies, Inc.)基于CIM-GJG和SEMI标准，在实施层面制定了统一的工艺工具通信规范及其测试规范。这些规范将作为设备制造商之间的基本规范，并为设备供应商的设计和实施提供指导。
{"title":"Unified tool communication specification for 300 mm automated fab","authors":"S. Kono, T. Masui, Y. Ohyama","doi":"10.1109/ISSM.2001.962905","DOIUrl":"https://doi.org/10.1109/ISSM.2001.962905","url":null,"abstract":"In 300 mm diameter wafer fabrication line, concrete infrastructure that enables high degree of line operation is essential to minimize the cost and the risk of new 300 mm fab infrastructure and integration. Equipment online communication is an essential technology as fab infrastructure. Based on CIM-GJG and SEMI standards, Selete (Semiconductor Leading Edge Technologies, Inc.) has been developed unified process tool communication specification and its test specification at implementation level. These specifications will be used as base specifications among device makers and give directions of design and implementation at equipment suppliers.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123895892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.963009
M. Locy
Initially, the industry viewed e-diagnostics as a way to collect, trend, and extract potential failure points from equipment, as well as to provide the ability for a remote service engineer to gain access to equipment for trouble shooting. As e-diagnostics progressed, the industry needed to implement an e-diagnostics enabling solution that not only collected and analyzed data, but also delivered true added value support with the goal of making tools more productive. KLA-Tencor's iSupport e-Diagnostics program was the first in the industry to design a solution integrating a value-added support program with e-diagnostics technology. During the first year of iSupport connectivity to worldwide customer sites, the program focused on assisting users with "Reactive" and "Escalation" support calls. This paper addresses the background, success cases, and value experienced by many iSupport customers throughout this first year of operation. Additionally, this paper addresses the iSupport road map, where predictive failure monitoring holds much promise.
{"title":"The impact of e-diagnostics - one year later","authors":"M. Locy","doi":"10.1109/ISSM.2001.963009","DOIUrl":"https://doi.org/10.1109/ISSM.2001.963009","url":null,"abstract":"Initially, the industry viewed e-diagnostics as a way to collect, trend, and extract potential failure points from equipment, as well as to provide the ability for a remote service engineer to gain access to equipment for trouble shooting. As e-diagnostics progressed, the industry needed to implement an e-diagnostics enabling solution that not only collected and analyzed data, but also delivered true added value support with the goal of making tools more productive. KLA-Tencor's iSupport e-Diagnostics program was the first in the industry to design a solution integrating a value-added support program with e-diagnostics technology. During the first year of iSupport connectivity to worldwide customer sites, the program focused on assisting users with \"Reactive\" and \"Escalation\" support calls. This paper addresses the background, success cases, and value experienced by many iSupport customers throughout this first year of operation. Additionally, this paper addresses the iSupport road map, where predictive failure monitoring holds much promise.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124089246","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.962964
W. Chang, M. Yu, R. Wu, C. Chen, J. Chen, C. Hsieh, C.K. Wang
Factors that induce the yield loss are frequently intertwined. It is desirable to distinguish the yield impact between one factor and another so that the failure cause can be identified and the yield improvement can be achieved by applying the appropriate countermeasures. This paper addresses the ways in which cycle time and process fluctuation will influence the yield in semiconductor manufacturing. With manufacturing yield data, it is shown that yield improvement can be achieved through effective reductions of process fluctuation, particle generation, and waiting times in key stages.
{"title":"Yield improvement through cycle time and process fluctuation analyses","authors":"W. Chang, M. Yu, R. Wu, C. Chen, J. Chen, C. Hsieh, C.K. Wang","doi":"10.1109/ISSM.2001.962964","DOIUrl":"https://doi.org/10.1109/ISSM.2001.962964","url":null,"abstract":"Factors that induce the yield loss are frequently intertwined. It is desirable to distinguish the yield impact between one factor and another so that the failure cause can be identified and the yield improvement can be achieved by applying the appropriate countermeasures. This paper addresses the ways in which cycle time and process fluctuation will influence the yield in semiconductor manufacturing. With manufacturing yield data, it is shown that yield improvement can be achieved through effective reductions of process fluctuation, particle generation, and waiting times in key stages.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130080937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.962939
H. Sakurai, M. Iwase, A. Shimazaki, S. Nadahara
It is one of the key points for the "Agile Fab" concept that the process equipment is shared for several processes. On the other hand, new metals tend to be applied for the latest DRAM, FeRAM and logic devices. Therefore, we investigated the behavior of these new metals to derive a protocol for "Agile-Fab." We evaluated their electrical properties and diffusion behavior. It is necessary to construct a suitable "protocol" using the result, and to control metallic contamination.
{"title":"Characterization of metallic impurities for the ULSI fabrication process","authors":"H. Sakurai, M. Iwase, A. Shimazaki, S. Nadahara","doi":"10.1109/ISSM.2001.962939","DOIUrl":"https://doi.org/10.1109/ISSM.2001.962939","url":null,"abstract":"It is one of the key points for the \"Agile Fab\" concept that the process equipment is shared for several processes. On the other hand, new metals tend to be applied for the latest DRAM, FeRAM and logic devices. Therefore, we investigated the behavior of these new metals to derive a protocol for \"Agile-Fab.\" We evaluated their electrical properties and diffusion behavior. It is necessary to construct a suitable \"protocol\" using the result, and to control metallic contamination.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127954680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.963006
K. De Backker, W. Deweerd, H. Lebon
In this paper we will elaborate on experience that has been built up at IMECs class 1 R&D fab, based on a scheme for contamination control that allows to safely and simultaneously introduce a multitude of contaminants in a single tool park and requiring only limited means of contamination dedicated tool allocation. Emphasis will be put on Cu/low k related research. Details will be given on various aspects, ranging from the employed specs, operational strategy and allocation, over classification schemes for various contaminants, to long-term monitoring.
{"title":"Managing and controlling contamination in an advanced 8\" CMOS pilot line","authors":"K. De Backker, W. Deweerd, H. Lebon","doi":"10.1109/ISSM.2001.963006","DOIUrl":"https://doi.org/10.1109/ISSM.2001.963006","url":null,"abstract":"In this paper we will elaborate on experience that has been built up at IMECs class 1 R&D fab, based on a scheme for contamination control that allows to safely and simultaneously introduce a multitude of contaminants in a single tool park and requiring only limited means of contamination dedicated tool allocation. Emphasis will be put on Cu/low k related research. Details will be given on various aspects, ranging from the employed specs, operational strategy and allocation, over classification schemes for various contaminants, to long-term monitoring.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130037728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.962915
Ying-Jen Chen, Kuo-sung Huang, Will Chen, Yu-Ja Hsu
This paper describes a DSS (decision-making support system) for solving tool overlapping problems by using a real time dispatching system developed in MXIC FAB I. The problem issue and the system are first presented, followed by the description of the algorithm for solving tool overlapping. We found that operators can obtain the tool arrangement information very quickly through this DSS. With its precise forecast of coming WIP and calculation, our algorithm increases tool utilization by 10/spl sim/13% as well as delivering a short cycle time for BTO (build-to-order) products.
{"title":"Using real time dispatcher as a decision-making support system to resolve overlapping dispatching problem in FAB manufacturing","authors":"Ying-Jen Chen, Kuo-sung Huang, Will Chen, Yu-Ja Hsu","doi":"10.1109/ISSM.2001.962915","DOIUrl":"https://doi.org/10.1109/ISSM.2001.962915","url":null,"abstract":"This paper describes a DSS (decision-making support system) for solving tool overlapping problems by using a real time dispatching system developed in MXIC FAB I. The problem issue and the system are first presented, followed by the description of the algorithm for solving tool overlapping. We found that operators can obtain the tool arrangement information very quickly through this DSS. With its precise forecast of coming WIP and calculation, our algorithm increases tool utilization by 10/spl sim/13% as well as delivering a short cycle time for BTO (build-to-order) products.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124395652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.962987
I.A.N. Goh, H. Chua, T. L. Neo, Y.Y. Soh, I.C. Chiang, E.W. Tan, G.Y. Tey, K. J. How, K. Wong, W. Yeoh
This paper presents an integrated engineering approach to improve Esort yield at the wafer edge region. In absence of any systematic or parametric issue, the yield loss at the wafer edge region is investigated and initial failure models are then created. Various process improvement schemes which include improved ILD/IMD thickness profile by optimizing Chemical Mechanical Polishing (CMP) recipe, better edge pattern coverage by printing extra lithographic shots and improved Via etch recipes, are explored to resolve the edge losses. These schemes are successfully demonstrated in a production environment with an impressive overall improvement of 5-11 % in Esort yield by reducing the edge loss by more than 70 %. A flow-chart detailing the key improvement steps is presented as well.
{"title":"An integrated engineering approach to improve wafer edge yield","authors":"I.A.N. Goh, H. Chua, T. L. Neo, Y.Y. Soh, I.C. Chiang, E.W. Tan, G.Y. Tey, K. J. How, K. Wong, W. Yeoh","doi":"10.1109/ISSM.2001.962987","DOIUrl":"https://doi.org/10.1109/ISSM.2001.962987","url":null,"abstract":"This paper presents an integrated engineering approach to improve Esort yield at the wafer edge region. In absence of any systematic or parametric issue, the yield loss at the wafer edge region is investigated and initial failure models are then created. Various process improvement schemes which include improved ILD/IMD thickness profile by optimizing Chemical Mechanical Polishing (CMP) recipe, better edge pattern coverage by printing extra lithographic shots and improved Via etch recipes, are explored to resolve the edge losses. These schemes are successfully demonstrated in a production environment with an impressive overall improvement of 5-11 % in Esort yield by reducing the edge loss by more than 70 %. A flow-chart detailing the key improvement steps is presented as well.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123007549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.963005
J. Hashem, B. Bradshaw
In this paper, we will discuss the application of a portable Residual Gas Analyzer (RGA) for characterizing and troubleshooting diffusion furnaces and rapid thermal anneal (RTA) reactors in the thermal module at Kilby Fab (KFAB) of Texas Instruments Inc. The tools characterized were Tokyo Electron Ltd. (TEL) vertical atmospheric furnaces, TEL vertical LPCVD furnaces and Applied Materials (AMAT) Rapid Thermal Annealers and Rapid Thermal Processors. Some aspects of the coordination of this operation in a manufacturing environment will also be discussed.
在本文中，我们将讨论便携式残余气体分析仪(RGA)在德州仪器公司Kilby Fab (KFAB)热模块中扩散炉和快速热退火(RTA)反应器的表征和故障排除的应用。表征的工具是东京电子公司(TEL)的垂直常压炉，TEL垂直LPCVD炉和应用材料公司(AMAT)的快速热退火器和快速热处理器。还将讨论在制造环境中协调这一操作的一些方面。
{"title":"The practical use of residual gas analysis in a semiconductor thermal processing module","authors":"J. Hashem, B. Bradshaw","doi":"10.1109/ISSM.2001.963005","DOIUrl":"https://doi.org/10.1109/ISSM.2001.963005","url":null,"abstract":"In this paper, we will discuss the application of a portable Residual Gas Analyzer (RGA) for characterizing and troubleshooting diffusion furnaces and rapid thermal anneal (RTA) reactors in the thermal module at Kilby Fab (KFAB) of Texas Instruments Inc. The tools characterized were Tokyo Electron Ltd. (TEL) vertical atmospheric furnaces, TEL vertical LPCVD furnaces and Applied Materials (AMAT) Rapid Thermal Annealers and Rapid Thermal Processors. Some aspects of the coordination of this operation in a manufacturing environment will also be discussed.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"341 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114010929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.962997
R. Allen, Chen Chen, Thanassis Trikas, Kurt Lehman, R. Shinagawa, V. Bhaskaran, B. Stephenson, D. Watts
Describes the design, operation, and algorithms for an in-situ CMP endpoint detection and control system, with particular emphasis on copper polishing. The system's eddy current-based sensor gives absolute surface metal thickness. Its multi-angle reflectometer gives eight optical reflectance measurements. The endpointer improves on existing sensors and techniques in several ways. It can process reflectance traces individually according to their endpoint sensitivity, which applies to dielectric polishing and copper barrier removal processes. Also, it merges reflectance signals for higher signal-to-noise ratios, which benefits copper CMP. Finally, the system can fuse the reflectance data with thickness readings for more robust endpoint detection.
{"title":"In-situ CMP copper endpoint control system","authors":"R. Allen, Chen Chen, Thanassis Trikas, Kurt Lehman, R. Shinagawa, V. Bhaskaran, B. Stephenson, D. Watts","doi":"10.1109/ISSM.2001.962997","DOIUrl":"https://doi.org/10.1109/ISSM.2001.962997","url":null,"abstract":"Describes the design, operation, and algorithms for an in-situ CMP endpoint detection and control system, with particular emphasis on copper polishing. The system's eddy current-based sensor gives absolute surface metal thickness. Its multi-angle reflectometer gives eight optical reflectance measurements. The endpointer improves on existing sensors and techniques in several ways. It can process reflectance traces individually according to their endpoint sensitivity, which applies to dielectric polishing and copper barrier removal processes. Also, it merges reflectance signals for higher signal-to-noise ratios, which benefits copper CMP. Finally, the system can fuse the reflectance data with thickness readings for more robust endpoint detection.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115001538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-10-08DOI: 10.1109/ISSM.2001.962910
J. Lu, D.S.T. Hsieh, E.C.C. Feng, I.H.W. Hsu
In order to improve foundry-services quality and save customers time and money, TSMC provide an easy Internet solution to help customers. The system offers data from wafer parameters, assembly, final test, etc. The in-situ data, process flow, target delivery time and delivery logistics could also be done by these systems. With it, the customer will fall very easily and seamlessly between several subcontractors.
{"title":"B2B in TSMC turnkey services [semiconductor manufacturing]","authors":"J. Lu, D.S.T. Hsieh, E.C.C. Feng, I.H.W. Hsu","doi":"10.1109/ISSM.2001.962910","DOIUrl":"https://doi.org/10.1109/ISSM.2001.962910","url":null,"abstract":"In order to improve foundry-services quality and save customers time and money, TSMC provide an easy Internet solution to help customers. The system offers data from wafer parameters, assembly, final test, etc. The in-situ data, process flow, target delivery time and delivery logistics could also be done by these systems. With it, the customer will fall very easily and seamlessly between several subcontractors.","PeriodicalId":356225,"journal":{"name":"2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122513256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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