1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century最新文献
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633584
M.L. Lynch
Next Generation Test Generator (NGTG) processes require the existence of circuit models, both good and faulty, as well as the simulation of these models in order to develop tests in an effective manner. This paper addresses the issues associated with model development and simulation within an NGTG framework. The emphasis of the model development and simulation methods is on the use of commercial tools. If test automation processes are to be successfully used throughout the design and test community, the tools that designers are familiar with and use everyday must be incorporated into the NGTG processes. This paper describes the overall system briefly and the functional elements related to model development in detail. The model development portion of the system is composed of three basic functional elements: Netlist Generator (NG), Component Model Library (CML) and Automatic Model Builder (AMB). The simulation of the models is an integral part of the Automatic Test Generation (ATG) system and is presented in detail. A circuit model development process is described which allows for the creation of the good circuit model as well as the fault models necessary as part of the ATG systems. The model development and simulation approach emphasizes the use of commercial tools such as OrCAD(R)'s Capture/sup TM/, Simucad's SILOS(R) III and Intusoft/sup TM/'s ICAP/4.
{"title":"Using commercial modeling and simulation tools within NGTG processes","authors":"M.L. Lynch","doi":"10.1109/AUTEST.1997.633584","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633584","url":null,"abstract":"Next Generation Test Generator (NGTG) processes require the existence of circuit models, both good and faulty, as well as the simulation of these models in order to develop tests in an effective manner. This paper addresses the issues associated with model development and simulation within an NGTG framework. The emphasis of the model development and simulation methods is on the use of commercial tools. If test automation processes are to be successfully used throughout the design and test community, the tools that designers are familiar with and use everyday must be incorporated into the NGTG processes. This paper describes the overall system briefly and the functional elements related to model development in detail. The model development portion of the system is composed of three basic functional elements: Netlist Generator (NG), Component Model Library (CML) and Automatic Model Builder (AMB). The simulation of the models is an integral part of the Automatic Test Generation (ATG) system and is presented in detail. A circuit model development process is described which allows for the creation of the good circuit model as well as the fault models necessary as part of the ATG systems. The model development and simulation approach emphasizes the use of commercial tools such as OrCAD(R)'s Capture/sup TM/, Simucad's SILOS(R) III and Intusoft/sup TM/'s ICAP/4.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132134685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633601
P. Hansen
New software technologies, including the World Wide Web, may seem far removed from the tasks facing test program set (TPS) developers, but they promise to revolutionize the way TPS data is organized, presented, and used. This paper will describe how an integrated TPS development and execution environment can capitalize on these new technologies to improve test programming efficiency.
{"title":"The World Wide Web leads a revolution in ATE programming environments","authors":"P. Hansen","doi":"10.1109/AUTEST.1997.633601","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633601","url":null,"abstract":"New software technologies, including the World Wide Web, may seem far removed from the tasks facing test program set (TPS) developers, but they promise to revolutionize the way TPS data is organized, presented, and used. This paper will describe how an integrated TPS development and execution environment can capitalize on these new technologies to improve test programming efficiency.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"300 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133637055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633690
H. Singh, T. Palanisamy, W. R. Johnson, D. Mains
This paper provides an overview of the Advanced Battery Analyzer/Charger (ABAC) Technology under development at AlliedSignal for the US Navy. The ABAC technology provides complete battery maintenance and support solution including battery analysis, charging and multimedia based operator-training capabilities. The technology addresses three battery electrochemical couples: Lead-acid, Nickel-Cadmium (NiCd), and Silver-Zinc (AgZn). The ABAC technology is a cutting edge technology which is being implemented using state-of-the-art hardware and software components. This paper describes the need for a comprehensive battery support solution Program objectives and goals as jointly defined by the Navy and AlliedSignal are outlined. Key features and benefits of the technology are highlighted. The paper provides an overview of the ABAC Technology development approach. various applications of the technology are discussed The multimedia-training package, which can be tailored to specific mission requirements, is discussed The paper illustrates how time, electrical energy and cost savings are realized as a result of this technology. Monetary payoffs are quantified and a detailed discussion is included on potential benefits. Finally, the paper enumerates several target applications planned for this technology.
{"title":"Advanced battery analyzer/charger program","authors":"H. Singh, T. Palanisamy, W. R. Johnson, D. Mains","doi":"10.1109/AUTEST.1997.633690","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633690","url":null,"abstract":"This paper provides an overview of the Advanced Battery Analyzer/Charger (ABAC) Technology under development at AlliedSignal for the US Navy. The ABAC technology provides complete battery maintenance and support solution including battery analysis, charging and multimedia based operator-training capabilities. The technology addresses three battery electrochemical couples: Lead-acid, Nickel-Cadmium (NiCd), and Silver-Zinc (AgZn). The ABAC technology is a cutting edge technology which is being implemented using state-of-the-art hardware and software components. This paper describes the need for a comprehensive battery support solution Program objectives and goals as jointly defined by the Navy and AlliedSignal are outlined. Key features and benefits of the technology are highlighted. The paper provides an overview of the ABAC Technology development approach. various applications of the technology are discussed The multimedia-training package, which can be tailored to specific mission requirements, is discussed The paper illustrates how time, electrical energy and cost savings are realized as a result of this technology. Monetary payoffs are quantified and a detailed discussion is included on potential benefits. Finally, the paper enumerates several target applications planned for this technology.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122905664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633686
Giancarlo Fortino, Domenico Grimaldi, L. Nigro
Java is rapidly emerging as a powerful language for web programming. This paper reports on a research project whose aim is the use of Java and related web tools for building object-oriented portable, open and re-configurable distributed measurement systems. Different architectural patterns are possible. The paper discusses some useful patterns and exemplifies them by a developed example.
{"title":"Distributed measurement patterns based on Java and web tools","authors":"Giancarlo Fortino, Domenico Grimaldi, L. Nigro","doi":"10.1109/AUTEST.1997.633686","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633686","url":null,"abstract":"Java is rapidly emerging as a powerful language for web programming. This paper reports on a research project whose aim is the use of Java and related web tools for building object-oriented portable, open and re-configurable distributed measurement systems. Different architectural patterns are possible. The paper discusses some useful patterns and exemplifies them by a developed example.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114387733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633636
C. Hill
Achieving hardware-independence in a Signal-Oriented test software framework relies on a flexible procedure for selecting instruments when a test is executed. The procedure requires a list of available instrument knowledge of the requirements of the signal, knowledge of the capability of the instruments, and a means for making an instrument selection. With this information, instrument selection can be made statically by a user before run-time or dynamically as the test is run. This paper discusses how the required information is obtained from the framework and describes a tool that presents this information and facilitates a static instrument selection process.
{"title":"Simplifying the instrument selection process in a hardware independent environment","authors":"C. Hill","doi":"10.1109/AUTEST.1997.633636","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633636","url":null,"abstract":"Achieving hardware-independence in a Signal-Oriented test software framework relies on a flexible procedure for selecting instruments when a test is executed. The procedure requires a list of available instrument knowledge of the requirements of the signal, knowledge of the capability of the instruments, and a means for making an instrument selection. With this information, instrument selection can be made statically by a user before run-time or dynamically as the test is run. This paper discusses how the required information is obtained from the framework and describes a tool that presents this information and facilitates a static instrument selection process.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114531947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633587
C. M. West
Although current methods for digital and analog circuit testing in the NAVY Automatic Test Equipment (ATE) environment are adequate, there are limitations and pitfalls. These can be due to inadequate transfer of information between the design and test of a circuit card resulting in untestable circuits. This can lead to expensive and time consuming test generation. Next Generation Test Generator (NGTG) has developed a process that will generate tests and diagnostic data using genetic algorithms and neural networks. This paper describes the procedure that will be used to interface NGTG and the ATE. NGTG will be demonstrated on Consolidated Automated Support System (CASS). For digital circuit testing, the CASS environment uses the Digital Test Unit (DTU). This environment requires diagnostic data in a unique language, L200, to process information. The NGTG system must interface with the DTU via Abbreviated Test Language for All Systems (ATLAS) code. ATLAS uses a Functional External Program (FEP) to interface with the DTU. This paper will describe the two options and the necessary steps to demonstrate NGTG on CASS. These options involve diagnostic data in the proposed IEEE-P1445 Standard, Digital Test Interchange Format (DTIF) formatted files and new NGTG/FEP interfaces.
{"title":"Next Generation Test Generator (NGTG) interface to Automatic Test Equipment (ATE) for digital circuits","authors":"C. M. West","doi":"10.1109/AUTEST.1997.633587","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633587","url":null,"abstract":"Although current methods for digital and analog circuit testing in the NAVY Automatic Test Equipment (ATE) environment are adequate, there are limitations and pitfalls. These can be due to inadequate transfer of information between the design and test of a circuit card resulting in untestable circuits. This can lead to expensive and time consuming test generation. Next Generation Test Generator (NGTG) has developed a process that will generate tests and diagnostic data using genetic algorithms and neural networks. This paper describes the procedure that will be used to interface NGTG and the ATE. NGTG will be demonstrated on Consolidated Automated Support System (CASS). For digital circuit testing, the CASS environment uses the Digital Test Unit (DTU). This environment requires diagnostic data in a unique language, L200, to process information. The NGTG system must interface with the DTU via Abbreviated Test Language for All Systems (ATLAS) code. ATLAS uses a Functional External Program (FEP) to interface with the DTU. This paper will describe the two options and the necessary steps to demonstrate NGTG on CASS. These options involve diagnostic data in the proposed IEEE-P1445 Standard, Digital Test Interchange Format (DTIF) formatted files and new NGTG/FEP interfaces.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134512138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633657
A. Ambler, M.B. Bassat, L. Ungar
Detecting the existence of a fault in complex systems is neither sufficient nor economical without diagnostics assisting in fault isolation and cost-effective repairs. This work attempts to put in economical terms the technical decisions involving diagnostics. It looks at the cost factors of poor diagnostics in terms of the accuracy and completeness of fault identification and the time and effort it takes to come to a final (accurate) repair decision. No Problems Found (NPF), Retest OK (RTOK), False Alarms, Cannot Duplicates (CND) and other diagnostic deficiencies can range from 30% to 60% of all repair actions. According to a 1995 survey run by the IEEE Reliability Society, the Air Transport Association (ATA) has determined that 4500 NPF events cost ATE member airlines $100 million annually. A U.S. Army study has shown that maintenance costs can be reduced by 25% if 70-80% of the items if had been repairing were to be discarded. Many of these situations can be overcome by investing in emerging technologies, such as Built-in (Self) Test (BIST) and expert diagnostic tools. The role of these tools is to minimize dependence on the skills, knowledge and experience of individuals, and thus overcome costs of inaccurate, inefficient, and incomplete diagnostics. Use of BIST can also directly reduce costs. This paper presents technical solutions and economic analyses showing to what extent such solutions provide a sufficient return on investment.
{"title":"Economics of diagnosis","authors":"A. Ambler, M.B. Bassat, L. Ungar","doi":"10.1109/AUTEST.1997.633657","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633657","url":null,"abstract":"Detecting the existence of a fault in complex systems is neither sufficient nor economical without diagnostics assisting in fault isolation and cost-effective repairs. This work attempts to put in economical terms the technical decisions involving diagnostics. It looks at the cost factors of poor diagnostics in terms of the accuracy and completeness of fault identification and the time and effort it takes to come to a final (accurate) repair decision. No Problems Found (NPF), Retest OK (RTOK), False Alarms, Cannot Duplicates (CND) and other diagnostic deficiencies can range from 30% to 60% of all repair actions. According to a 1995 survey run by the IEEE Reliability Society, the Air Transport Association (ATA) has determined that 4500 NPF events cost ATE member airlines $100 million annually. A U.S. Army study has shown that maintenance costs can be reduced by 25% if 70-80% of the items if had been repairing were to be discarded. Many of these situations can be overcome by investing in emerging technologies, such as Built-in (Self) Test (BIST) and expert diagnostic tools. The role of these tools is to minimize dependence on the skills, knowledge and experience of individuals, and thus overcome costs of inaccurate, inefficient, and incomplete diagnostics. Use of BIST can also directly reduce costs. This paper presents technical solutions and economic analyses showing to what extent such solutions provide a sufficient return on investment.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131390274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633632
B. Wright
Plug-in VXI based breadboard modules are an excellent solution to achieve a lower costing, time and hardware saving test bench. These breadboard modules are equipped with built-in VXI bus interface circuitry and a breadboard area for creating a design to suit your test needs. A prime example for the use of this capability was demonstrated on a recent radar system test bench created to test many unique Units Under Test (UUTs) previously tested on separate test benches. A single breadboard module design replaced the dedicated interface and control hardware within the many test benches and test fixtures previously used to test the individual UUTs. This paper will present some design considerations and techniques implemented as part of this VXI breadboard module that can be useful when creating a VXI breadboard design. If will also address the inherent built-in test capabilities provided by the module in conjunction with the techniques presented in the paper.
{"title":"Using VXI based breadboard modules","authors":"B. Wright","doi":"10.1109/AUTEST.1997.633632","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633632","url":null,"abstract":"Plug-in VXI based breadboard modules are an excellent solution to achieve a lower costing, time and hardware saving test bench. These breadboard modules are equipped with built-in VXI bus interface circuitry and a breadboard area for creating a design to suit your test needs. A prime example for the use of this capability was demonstrated on a recent radar system test bench created to test many unique Units Under Test (UUTs) previously tested on separate test benches. A single breadboard module design replaced the dedicated interface and control hardware within the many test benches and test fixtures previously used to test the individual UUTs. This paper will present some design considerations and techniques implemented as part of this VXI breadboard module that can be useful when creating a VXI breadboard design. If will also address the inherent built-in test capabilities provided by the module in conjunction with the techniques presented in the paper.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130318170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633566
L. Kirkland, R. G. Wright
This paper describes the use of neural networks in combination with algorithmic test programs to aid in improving test efficiency and accuracy, especially in test situations where "bad actor" test programs exist that have difficulty in detecting and isolating Unit Under Test (UUT) failures. The paper will begin with a discussion of the theoretical basis for the use of neural networks as diagnostic aids. Specifically, as an electronic device or circuit is tested, the output of the Unit Under Test (UUT) may be considered as a function of the input. Through the use of multiple tests designed to exercise system capabilities in evaluating UUT performance, the characteristic behavior of the UUT can be established. Test results obtained from the knowledge of Automatic Test System (ATS) programmed stimulus and sensor readings can be used in conjunction with neural networks in classifying good and failed UUTs based upon this characteristic behavior. Indeed, failed UUT behavior can be further classified to distinguish faulty lower-level UUT assemblies and components.
{"title":"Functional testing philosophies using neural networks","authors":"L. Kirkland, R. G. Wright","doi":"10.1109/AUTEST.1997.633566","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633566","url":null,"abstract":"This paper describes the use of neural networks in combination with algorithmic test programs to aid in improving test efficiency and accuracy, especially in test situations where \"bad actor\" test programs exist that have difficulty in detecting and isolating Unit Under Test (UUT) failures. The paper will begin with a discussion of the theoretical basis for the use of neural networks as diagnostic aids. Specifically, as an electronic device or circuit is tested, the output of the Unit Under Test (UUT) may be considered as a function of the input. Through the use of multiple tests designed to exercise system capabilities in evaluating UUT performance, the characteristic behavior of the UUT can be established. Test results obtained from the knowledge of Automatic Test System (ATS) programmed stimulus and sensor readings can be used in conjunction with neural networks in classifying good and failed UUTs based upon this characteristic behavior. Indeed, failed UUT behavior can be further classified to distinguish faulty lower-level UUT assemblies and components.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123647621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-09-22DOI: 10.1109/AUTEST.1997.633550
M. Sudolsky
C-17 avionics built-in test (BIT) improvement is critical to mission readiness and capability. Enhanced C-17 Globemaster III propulsion data reporting using personal computer relational database (RDB) software contributes to improved avionics BIT, and introduces many other base-level advantages for the maintenance technician; a corresponding benefit is the transformation of raw recorded aircraft data into useful maintenance information.
{"title":"Enhanced C-17 O-level QAR data processing and reporting","authors":"M. Sudolsky","doi":"10.1109/AUTEST.1997.633550","DOIUrl":"https://doi.org/10.1109/AUTEST.1997.633550","url":null,"abstract":"C-17 avionics built-in test (BIT) improvement is critical to mission readiness and capability. Enhanced C-17 Globemaster III propulsion data reporting using personal computer relational database (RDB) software contributes to improved avionics BIT, and introduces many other base-level advantages for the maintenance technician; a corresponding benefit is the transformation of raw recorded aircraft data into useful maintenance information.","PeriodicalId":369132,"journal":{"name":"1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127035976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
1997 IEEE Autotestcon Proceedings AUTOTESTCON '97. IEEE Systems Readiness Technology Conference. Systems Readiness Supporting Global Needs and Awareness in the 21st Century
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