Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551883
A. Seabaugh
This paper reviews recent progress in the development of tunnel field-effect transistors (TFETs) [1–5] toward achieving channel currents comparable to high performance MOSFETs at supply voltages less than 0.5 V and subthreshold swing less than 60 mV/decade, for logic applications. To enable high performance in TFETs, development of narrow bandgap III–V and graphene nanoribbon (GNR) channels is indicated. Beyond the switch, the tunnel junction could provide enhanced functionality and new ways to integrate logic and memory [6].
{"title":"Tunnel field-effect transistors - status and prospects","authors":"A. Seabaugh","doi":"10.1109/DRC.2010.5551883","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551883","url":null,"abstract":"This paper reviews recent progress in the development of tunnel field-effect transistors (TFETs) [1–5] toward achieving channel currents comparable to high performance MOSFETs at supply voltages less than 0.5 V and subthreshold swing less than 60 mV/decade, for logic applications. To enable high performance in TFETs, development of narrow bandgap III–V and graphene nanoribbon (GNR) channels is indicated. Beyond the switch, the tunnel junction could provide enhanced functionality and new ways to integrate logic and memory [6].","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124256732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551948
B. Behin-Aein, S. Datta
THE possible role of spin rather than charge as a state variable in devices for processing and storing information has been widely discussed, because it could allow low-power operation and might also have applications in quantum computing. However, spin-based experiments and proposals for logic applications typically use spin only as an internal variable, the terminal quantities for each individual logic gate still being charge-based. This requires repeated spin-to-charge conversion, using extra hardware that offsets any possible advantage.
{"title":"All-spin logic","authors":"B. Behin-Aein, S. Datta","doi":"10.1109/DRC.2010.5551948","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551948","url":null,"abstract":"THE possible role of spin rather than charge as a state variable in devices for processing and storing information has been widely discussed, because it could allow low-power operation and might also have applications in quantum computing. However, spin-based experiments and proposals for logic applications typically use spin only as an internal variable, the terminal quantities for each individual logic gate still being charge-based. This requires repeated spin-to-charge conversion, using extra hardware that offsets any possible advantage.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124416319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551850
B. J. Moehlmann, M. Flatté
Spintronics, using spin transport physics to manipulate information encoded in spin polarization, requires the ability to scalably manipulate electron spins, which is most easily achieved without magnetic materials or applied magnetic fields. Coherent spin rotation in the spin-orbit fields of a quantum well can yield efficient spin manipulation that depends only on the path traversed by a packet of electronic spin, and not on the speed with which the path is traversed. For a configuration with no applied magnetic field, where an electron spin is driven around three straight legs, with the first and last parallel, and the intermediate leg perpendicular to them and half their length, transport around the path will cause a robust, electrically controllable spin rotation. The angle of the spin rotation depends on the lengths of those legs. However, it is also possible to switch between integer π rotations of the electron spin (about a fixed axis in the plane of the quantum well) in a specific device with a fixed path by adjusting a vertical electric field applied to the quantum well. This spin rotation is described by a generalized Berry's phase and is not a dynamical effect, so it is invariant with respect to the current, source-drain voltage, travel time, and temperature (within a parabolic band approximation). The simplest realization would be a device with a narrow GaAs channel between undoped AlGaAs barriers with spin-selective injection and detection. For a ten nanometer thick GaAs/AlGaAs quantum well the long legs of the device would ideally be on the order of 10–100 nm in length, and transport should be in the drift-diffusion regime.
{"title":"Robust path-dependent spin rotation on the nanoscale in a semiconductor quantum well","authors":"B. J. Moehlmann, M. Flatté","doi":"10.1109/DRC.2010.5551850","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551850","url":null,"abstract":"Spintronics, using spin transport physics to manipulate information encoded in spin polarization, requires the ability to scalably manipulate electron spins, which is most easily achieved without magnetic materials or applied magnetic fields. Coherent spin rotation in the spin-orbit fields of a quantum well can yield efficient spin manipulation that depends only on the path traversed by a packet of electronic spin, and not on the speed with which the path is traversed. For a configuration with no applied magnetic field, where an electron spin is driven around three straight legs, with the first and last parallel, and the intermediate leg perpendicular to them and half their length, transport around the path will cause a robust, electrically controllable spin rotation. The angle of the spin rotation depends on the lengths of those legs. However, it is also possible to switch between integer π rotations of the electron spin (about a fixed axis in the plane of the quantum well) in a specific device with a fixed path by adjusting a vertical electric field applied to the quantum well. This spin rotation is described by a generalized Berry's phase and is not a dynamical effect, so it is invariant with respect to the current, source-drain voltage, travel time, and temperature (within a parabolic band approximation). The simplest realization would be a device with a narrow GaAs channel between undoped AlGaAs barriers with spin-selective injection and detection. For a ten nanometer thick GaAs/AlGaAs quantum well the long legs of the device would ideally be on the order of 10–100 nm in length, and transport should be in the drift-diffusion regime.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122045482","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551983
Guowang Li, T. Zimmermann, Yu Cao, Chuanxin Lian, X. Xing, Ronghua Wang, P. Fay, H. Xing, D. Jena
Enormous progress has been made in low Al composition (<40 %) AlGaN/GaN HEMTs for high power and high frequency applications [1]. For scaling down to deep sub-micrometer dimensions, high Al composition AlGaN barrier can offer higher two-dimensional electron gas (2DEG) density and lower sheet resistance than low Al composition AlGaN [2]. Pure AlN barriers cause high contact resistance due to their wide band gap (6.2 eV) [3]. Compared to lattice-matched AlInN barriers, the higher band gap and conduction band offset of high Al composition AlGaN barrier can result in lower gate tunneling current [4]. In this work we report the device characteristics of novel high Al composition Al0.72Ga0.28N/AlN/GaN HEMTs. By combining ALD technology, threshold voltage control by work-function engineering is demonstrated for the first time.
{"title":"Work-function engineering in novel high Al composition Al0.72Ga0.28N/AlN/GaN HEMTs","authors":"Guowang Li, T. Zimmermann, Yu Cao, Chuanxin Lian, X. Xing, Ronghua Wang, P. Fay, H. Xing, D. Jena","doi":"10.1109/DRC.2010.5551983","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551983","url":null,"abstract":"Enormous progress has been made in low Al composition (<40 %) AlGaN/GaN HEMTs for high power and high frequency applications [1]. For scaling down to deep sub-micrometer dimensions, high Al composition AlGaN barrier can offer higher two-dimensional electron gas (2DEG) density and lower sheet resistance than low Al composition AlGaN [2]. Pure AlN barriers cause high contact resistance due to their wide band gap (6.2 eV) [3]. Compared to lattice-matched AlInN barriers, the higher band gap and conduction band offset of high Al composition AlGaN barrier can result in lower gate tunneling current [4]. In this work we report the device characteristics of novel high Al composition Al0.72Ga0.28N/AlN/GaN HEMTs. By combining ALD technology, threshold voltage control by work-function engineering is demonstrated for the first time.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124996691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551875
Ronghua Wang, X. Xing, T. Fang, T. Zimmermann, Chuanxin Lian, Guowang Li, P. Saunier, Xiang Gao, Shiping Guo, G. Snider, P. Fay, D. Jena, H. Xing
Due to the high two-dimensional electron gas (2DEG) concentration and high temperature stability, lattice matched InAlN/AlN/GaN high electron mobility transistors (HEMTs) have attracted tremendous amount of interest for high-power and high-frequency electronics [1–2]. Employing the gate recess technology, a popular way to develop enhancement-mode (E-mode) devices for digital and mixed signal applications, record high performance (output current density of 2 A/mm, extrinsic transconductance of 890 mS/mm, and ft/fmax of 95/135 GHz for 150-nm gate length) have been very recently reported on E-mode InAlN HEMTs [3]. Temperature dependent characterization of the subthreshold slope (SS) can provide valuable information on the interface states and their distribution near the band edges. In this paper, we have performed the field-effect measurements on these gate-recessed E-mod InAlN HEMTs reported in Ref. 3, and extracted the interface states from the temperature dependent SS from 80 to 300 K.
{"title":"High performance E-mode InAlN/GaN HEMTs: Interface states from subthreshold slopes","authors":"Ronghua Wang, X. Xing, T. Fang, T. Zimmermann, Chuanxin Lian, Guowang Li, P. Saunier, Xiang Gao, Shiping Guo, G. Snider, P. Fay, D. Jena, H. Xing","doi":"10.1109/DRC.2010.5551875","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551875","url":null,"abstract":"Due to the high two-dimensional electron gas (2DEG) concentration and high temperature stability, lattice matched InAlN/AlN/GaN high electron mobility transistors (HEMTs) have attracted tremendous amount of interest for high-power and high-frequency electronics [1–2]. Employing the gate recess technology, a popular way to develop enhancement-mode (E-mode) devices for digital and mixed signal applications, record high performance (output current density of 2 A/mm, extrinsic transconductance of 890 mS/mm, and ft/fmax of 95/135 GHz for 150-nm gate length) have been very recently reported on E-mode InAlN HEMTs [3]. Temperature dependent characterization of the subthreshold slope (SS) can provide valuable information on the interface states and their distribution near the band edges. In this paper, we have performed the field-effect measurements on these gate-recessed E-mod InAlN HEMTs reported in Ref. 3, and extracted the interface states from the temperature dependent SS from 80 to 300 K.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125059815","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551888
D. Pawlik, M. Barth, P. Thomas, S. Kurinec, S. Mookerjea, D. Mohata, S. Datta, S. Cohen, D. Ritter, S. Rommel
Tunneling field effect transistors (TFET), which are gated Esaki tunnel junctions (ETD) operating in the Zener regime, have theoretically been predicted to operate with ultra low power supplies (<0.5 V) and steep subthreshold slopes (<60 mV/dec) [1, 2]. However, the majority of these projections have been made based on uncalibrated TCAD modeling. To this end, the authors experimentally demonstrate a pair of InGaAs tunnel diodes with the highest peak current densities (JP = IP/Area) ever reported for tunnel diodes (975 kA/cm2 or 9.75 mA/µm2) [3–5]. Other groups have attempted to experimentally demonstrate these structures, but were limited by a combination of output current and series resistance [6]. The key innovation in this study was a process for testing deep submicron Esaki diodes [7], which mitigates these factors.
{"title":"Sub-micron InGaAs Esaki diodes with record high peak current density","authors":"D. Pawlik, M. Barth, P. Thomas, S. Kurinec, S. Mookerjea, D. Mohata, S. Datta, S. Cohen, D. Ritter, S. Rommel","doi":"10.1109/DRC.2010.5551888","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551888","url":null,"abstract":"Tunneling field effect transistors (TFET), which are gated Esaki tunnel junctions (ETD) operating in the Zener regime, have theoretically been predicted to operate with ultra low power supplies (<0.5 V) and steep subthreshold slopes (<60 mV/dec) [1, 2]. However, the majority of these projections have been made based on uncalibrated TCAD modeling. To this end, the authors experimentally demonstrate a pair of InGaAs tunnel diodes with the highest peak current densities (JP = IP/Area) ever reported for tunnel diodes (975 kA/cm2 or 9.75 mA/µm2) [3–5]. Other groups have attempted to experimentally demonstrate these structures, but were limited by a combination of output current and series resistance [6]. The key innovation in this study was a process for testing deep submicron Esaki diodes [7], which mitigates these factors.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123612224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551901
A. Ionescu
Timing components are the heartbeat of consumer electronics as almost all electronic systems need a highly stable reference source for synchronization between its sub-systems. Over the past few decades, quartz crystals have provided highly accurate frequency references and demonstrated a continuing and sustainable presence with improved performance. On the other hand, Micro-Electro-Mechanical (MEM) resonators are micro-meter scale mechanical devices fabricated on silicon wafers with CMOS compatible processes and materials. The research on MEM resonators started in the 60's when a vibrating metal beam was proposed as the gate of a MOS transistor [1]. Pioneering work on the use of MEM resonators for frequency reference applications has been initiated in the early 90's at University of California at Berkeley and later blossomed at University of Michigan [2]. Subsequently, growing interest in wireless applications has generated tremendous technological progress in the field of radio frequency micro-electro-mechanical systems (RF MEMS) and transformed the MEM resonator technology based on IC-compatible micromachining processes and materials such as semiconductors, polysilicon or metals in a strong competitor position to the quartz crystal. Today, majority of the MEM resonators exploit the principles of capacitive excitation and detection via deep sub-micron air-gaps. However, MEM resonators with capacitively transduced signals are passive devices that show limited scaling potential in terms of impedance and signal-to-noise ratio. Inspired by the resonant gate transistor [1], vibrating or resonant body transistors (VBT or RBT) have been proposed for the first time in 2007–2008 [3–4], by embedding a field effect transistor in the body of vibrating beams, Fig. 1 with lateral gates coupled via narrow air-gaps. The resonant body transistor is an active resonator with intrinsic gain mechanisms, Fig. 2: the output of RBT is the drain current of the transistor and not the capacitive current. They have the unique advantage of enabling combined modulation of charge and piezoresistance (or mobility), which are effective at very small scale and controllable by the device design. The device small signal equivalent circuit is a hybrid between a resonator (RLC resonant circuit) and a transistor (current sources), Fig. 2a. The gain mechanisms are mirrored in the current sources depending on the transistor transconductance, which is voltage-tuneable (Fig. 3) and reaches its maximum at the resonance frequency (Fig. 2b). Absolute gain in resonant transistors is demonstrated in Fig. 4. In Fig. 5a bulk mode, piezoresistive gain resonant transistors based on multiple coupled beams shows the highest quality factor in RBTs reported to date (Q∼105) and a Q x f > 2 1012, comparable with quartz. Recently, a high frequency (>10GHz) version of the RBT, with internal dielectric transduction, has been reported in [5] showing a record Q x f higher than 1013. A 70MHz square bulk-mode
{"title":"Resonant body transistors","authors":"A. Ionescu","doi":"10.1109/DRC.2010.5551901","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551901","url":null,"abstract":"Timing components are the heartbeat of consumer electronics as almost all electronic systems need a highly stable reference source for synchronization between its sub-systems. Over the past few decades, quartz crystals have provided highly accurate frequency references and demonstrated a continuing and sustainable presence with improved performance. On the other hand, Micro-Electro-Mechanical (MEM) resonators are micro-meter scale mechanical devices fabricated on silicon wafers with CMOS compatible processes and materials. The research on MEM resonators started in the 60's when a vibrating metal beam was proposed as the gate of a MOS transistor [1]. Pioneering work on the use of MEM resonators for frequency reference applications has been initiated in the early 90's at University of California at Berkeley and later blossomed at University of Michigan [2]. Subsequently, growing interest in wireless applications has generated tremendous technological progress in the field of radio frequency micro-electro-mechanical systems (RF MEMS) and transformed the MEM resonator technology based on IC-compatible micromachining processes and materials such as semiconductors, polysilicon or metals in a strong competitor position to the quartz crystal. Today, majority of the MEM resonators exploit the principles of capacitive excitation and detection via deep sub-micron air-gaps. However, MEM resonators with capacitively transduced signals are passive devices that show limited scaling potential in terms of impedance and signal-to-noise ratio. Inspired by the resonant gate transistor [1], vibrating or resonant body transistors (VBT or RBT) have been proposed for the first time in 2007–2008 [3–4], by embedding a field effect transistor in the body of vibrating beams, Fig. 1 with lateral gates coupled via narrow air-gaps. The resonant body transistor is an active resonator with intrinsic gain mechanisms, Fig. 2: the output of RBT is the drain current of the transistor and not the capacitive current. They have the unique advantage of enabling combined modulation of charge and piezoresistance (or mobility), which are effective at very small scale and controllable by the device design. The device small signal equivalent circuit is a hybrid between a resonator (RLC resonant circuit) and a transistor (current sources), Fig. 2a. The gain mechanisms are mirrored in the current sources depending on the transistor transconductance, which is voltage-tuneable (Fig. 3) and reaches its maximum at the resonance frequency (Fig. 2b). Absolute gain in resonant transistors is demonstrated in Fig. 4. In Fig. 5a bulk mode, piezoresistive gain resonant transistors based on multiple coupled beams shows the highest quality factor in RBTs reported to date (Q∼105) and a Q x f > 2 1012, comparable with quartz. Recently, a high frequency (>10GHz) version of the RBT, with internal dielectric transduction, has been reported in [5] showing a record Q x f higher than 1013. A 70MHz square bulk-mode","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126816861","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551963
A. Franklin, A. Bol, Zhihong Chen
In order to consider single-walled carbon nanotubes (SWCNTs) for a future technology their physical scaling limits must be understood. Such scaling involves shrinking two critical lengths: 1) the channel length (Lg) and 2) the less-emphasized source/drain contact lengths (CL). Until recently, many believed that Lg could not be scaled in SWCNT field-effect transistors (CNTFETs) without incurring severe short channel effects (SCEs). However, using an improved device geometry, it has now been shown that proper Lg scaling can be achieved with actual enhancement in performance [1]. In this presentation, a more complete picture of Lg scaling is given, along with the first reported results of contact length scaling.
{"title":"Channel and contact length scaling in carbon nanotube transistors","authors":"A. Franklin, A. Bol, Zhihong Chen","doi":"10.1109/DRC.2010.5551963","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551963","url":null,"abstract":"In order to consider single-walled carbon nanotubes (SWCNTs) for a future technology their physical scaling limits must be understood. Such scaling involves shrinking two critical lengths: 1) the channel length (Lg) and 2) the less-emphasized source/drain contact lengths (CL). Until recently, many believed that Lg could not be scaled in SWCNT field-effect transistors (CNTFETs) without incurring severe short channel effects (SCEs). However, using an improved device geometry, it has now been shown that proper Lg scaling can be achieved with actual enhancement in performance [1]. In this presentation, a more complete picture of Lg scaling is given, along with the first reported results of contact length scaling.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125578230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551951
D. Berman, M. Flatté
Current proposals and implementations of spin field effect transistors (spin-FETs) rely on three key elements: (1) spin injection of highly spin polarized distribution into a channel, (2) gate control of the spin orientation or polarization in some fashion within the channel, and (3) sensitivity of current through a drain contact to spin polarization in the channel. Although all three of these effects have been demonstrated experimentally to some degree, elements (1) and (3) are still well below the required performance to yield a competitive device. Here we describe a new approach to gate-controlled electronic transport in a two-dimensional electron gas, which relies on gate control of the spin-orbit interaction to control the direction and focusing of “electron beams” which propagate along specific crystal axes. A major advantage of this approach is that the electron beams exist even when the propagating electrons are not spin-polarized when injected. Thus no spin-selective injection or detection is required for this device, nor any magnetic materials or applied magnetic field only gate-control of the spin-orbit interaction.
{"title":"Gate control of a spin transistor via spin-orbit “focusing” of electron beams","authors":"D. Berman, M. Flatté","doi":"10.1109/DRC.2010.5551951","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551951","url":null,"abstract":"Current proposals and implementations of spin field effect transistors (spin-FETs) rely on three key elements: (1) spin injection of highly spin polarized distribution into a channel, (2) gate control of the spin orientation or polarization in some fashion within the channel, and (3) sensitivity of current through a drain contact to spin polarization in the channel. Although all three of these effects have been demonstrated experimentally to some degree, elements (1) and (3) are still well below the required performance to yield a competitive device. Here we describe a new approach to gate-controlled electronic transport in a two-dimensional electron gas, which relies on gate control of the spin-orbit interaction to control the direction and focusing of “electron beams” which propagate along specific crystal axes. A major advantage of this approach is that the electron beams exist even when the propagating electrons are not spin-polarized when injected. Thus no spin-selective injection or detection is required for this device, nor any magnetic materials or applied magnetic field only gate-control of the spin-orbit interaction.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130341013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-21DOI: 10.1109/DRC.2010.5551899
U. Zschieschang, Tatsuya Yamamoto, K. Takimiya, H. Kuwabara, M. Ikeda, T. Sekitani, T. Someya, H. Klauk
Pentacene is among the most widely employed semiconductors for organic thin-film transistors (TFTs). The main reason is its large field-effect mobility (∼1 cm2/Vs) which results from the relatively large overlap of the delocalized molecular orbitals in the (001) lattice plane of the pentacene thin-film phase [1–4]. But pentacene molecules are easily oxidized at the 6 and 13 positions, and since the oxidation changes the electronic structure of the molecules, the mobility of pentacene TFTs degrades rapidly during air exposure [5,6]. Yamamoto et al. have recently synthesized a six-ring fused heteroarene, dinaphtho-[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (DNTT), which has a crystal structure and thin-film morphology similar to those of pentacene, but is less susceptible to oxidation [7]. As a result of the favorable crystal structure and morphology, the mobility in DNTT is similar to that in pentacene, while the greater oxidation resistance affords better air stability of DNTT transistors compared with pentacene devices. Here we report on the static and dynamic performance and on the stability of DNTT TFTs on flexible polyethylene naphthalate (PEN) substrates.
{"title":"Low-voltage, high-mobility organic thin-film transistors with improved stability","authors":"U. Zschieschang, Tatsuya Yamamoto, K. Takimiya, H. Kuwabara, M. Ikeda, T. Sekitani, T. Someya, H. Klauk","doi":"10.1109/DRC.2010.5551899","DOIUrl":"https://doi.org/10.1109/DRC.2010.5551899","url":null,"abstract":"Pentacene is among the most widely employed semiconductors for organic thin-film transistors (TFTs). The main reason is its large field-effect mobility (∼1 cm2/Vs) which results from the relatively large overlap of the delocalized molecular orbitals in the (001) lattice plane of the pentacene thin-film phase [1–4]. But pentacene molecules are easily oxidized at the 6 and 13 positions, and since the oxidation changes the electronic structure of the molecules, the mobility of pentacene TFTs degrades rapidly during air exposure [5,6]. Yamamoto et al. have recently synthesized a six-ring fused heteroarene, dinaphtho-[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (DNTT), which has a crystal structure and thin-film morphology similar to those of pentacene, but is less susceptible to oxidation [7]. As a result of the favorable crystal structure and morphology, the mobility in DNTT is similar to that in pentacene, while the greater oxidation resistance affords better air stability of DNTT transistors compared with pentacene devices. Here we report on the static and dynamic performance and on the stability of DNTT TFTs on flexible polyethylene naphthalate (PEN) substrates.","PeriodicalId":396875,"journal":{"name":"68th Device Research Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132312052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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