2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)最新文献
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463357
V. Rochus, R. Jansen, J. Goyvaerts, G. Vandenboch, B. van de Voort, P. Neutens, J. Callaghan, H. Tilmans, X. Rottenberg
This paper presents the design of Micro-Opto-Mechanical Pressure Sensors (MOMPS), which can exhibit much improved sensitivity and noise performance compared to their piezoelectric and capacitive counterparts. As the output intensity variation depends on multiple design parameters, such as the radius of the membrane, the position of the waveguide, the wavelength and the phase variation due to the opto-mechanical coupling, we first derive an analytical model which allows to predict the response of the total system. We then use a Finite Element opto-mechanical model to evaluate the variation of the effective refractive index due to the modification of the optical material properties created by mechanical stress as well as to the waveguide shape deformation. Finally, the sensitivity of the device for a single loop MOMPS and for spiral loops configuration is analyzed.
{"title":"Design of a MZI Micro-Opto-Mechanical Pressure Sensor for a SiN photonics platform","authors":"V. Rochus, R. Jansen, J. Goyvaerts, G. Vandenboch, B. van de Voort, P. Neutens, J. Callaghan, H. Tilmans, X. Rottenberg","doi":"10.1109/EUROSIME.2016.7463357","DOIUrl":"https://doi.org/10.1109/EUROSIME.2016.7463357","url":null,"abstract":"This paper presents the design of Micro-Opto-Mechanical Pressure Sensors (MOMPS), which can exhibit much improved sensitivity and noise performance compared to their piezoelectric and capacitive counterparts. As the output intensity variation depends on multiple design parameters, such as the radius of the membrane, the position of the waveguide, the wavelength and the phase variation due to the opto-mechanical coupling, we first derive an analytical model which allows to predict the response of the total system. We then use a Finite Element opto-mechanical model to evaluate the variation of the effective refractive index due to the modification of the optical material properties created by mechanical stress as well as to the waveguide shape deformation. Finally, the sensitivity of the device for a single loop MOMPS and for spiral loops configuration is analyzed.","PeriodicalId":438097,"journal":{"name":"2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126602028","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463398
X. Qiu, J. Lo, Andrew W. Shang, S. Lee
Conventional packaging materials for light-emitting diodes (LED) are susceptible to UV radiation and high temperature. Therefore, for developing UV LED packages, new materials with better UV and high temperature resistance are required. There are two candidates, namely, epoxy molding compound (EMC) and silicone molding compound (SMC), being considered by the industry. This paper focuses on the change in reflectance of EMC and SMC over time as a measure of reliability. Aging was performed on EMC and SMC culls under high temperature, and combination of UV exposure and high temperature simultaneously. Reflectance of EMC and SMC culls before and after aging were compared. It was concluded that both EMC and SMC degrade under simultaneous UV radiation and high temperature aging, and that SMC is more UV and thermally resistant than EMC based on change in reflectance, surface morphology, and roughness.
{"title":"Investigation of reliability of EMC and SMC on reflectance for UV LED applications","authors":"X. Qiu, J. Lo, Andrew W. Shang, S. Lee","doi":"10.1109/EUROSIME.2016.7463398","DOIUrl":"https://doi.org/10.1109/EUROSIME.2016.7463398","url":null,"abstract":"Conventional packaging materials for light-emitting diodes (LED) are susceptible to UV radiation and high temperature. Therefore, for developing UV LED packages, new materials with better UV and high temperature resistance are required. There are two candidates, namely, epoxy molding compound (EMC) and silicone molding compound (SMC), being considered by the industry. This paper focuses on the change in reflectance of EMC and SMC over time as a measure of reliability. Aging was performed on EMC and SMC culls under high temperature, and combination of UV exposure and high temperature simultaneously. Reflectance of EMC and SMC culls before and after aging were compared. It was concluded that both EMC and SMC degrade under simultaneous UV radiation and high temperature aging, and that SMC is more UV and thermally resistant than EMC based on change in reflectance, surface morphology, and roughness.","PeriodicalId":438097,"journal":{"name":"2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"50 49","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113957712","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463314
Paula López, A. J. G. Loureiro, E. Ferro, V. Brea, B. Rivas‐Murias
Computer-aided design (CAD) simulation tools offer the advantage of integrating both thermal and electrical simulations facilitating the study of new materials and structures. In this work, we demonstrate the possibility of using conventional electron devices simulation tools to study the thermoelectrical properties of non-typical semiconductor materials, which allows to do predictive parametric analysis of novel device structures without costly experiments. This is illustrated without loss of generality for scandium nitride and strontium titanate. The simulated results are in good agreement with those reported in the literature.
{"title":"Study of the thermoelectric properties of non-typical semiconductor materials with conventional CAD tools","authors":"Paula López, A. J. G. Loureiro, E. Ferro, V. Brea, B. Rivas‐Murias","doi":"10.1109/EUROSIME.2016.7463314","DOIUrl":"https://doi.org/10.1109/EUROSIME.2016.7463314","url":null,"abstract":"Computer-aided design (CAD) simulation tools offer the advantage of integrating both thermal and electrical simulations facilitating the study of new materials and structures. In this work, we demonstrate the possibility of using conventional electron devices simulation tools to study the thermoelectrical properties of non-typical semiconductor materials, which allows to do predictive parametric analysis of novel device structures without costly experiments. This is illustrated without loss of generality for scandium nitride and strontium titanate. The simulated results are in good agreement with those reported in the literature.","PeriodicalId":438097,"journal":{"name":"2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130308331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463397
Umar A. Albalawi, S. Mohanty, E. Kougianos
This paper proposes a hardware architecture for a Secure Digital Camera (SDC) integrated with Secure Better Portable Graphics (SBPG) compression algorithm. The proposed architecture is suitable for high performance imaging in the Internet of Things (IoT). The objectives of this paper are twofold. On the one hand, the proposed SBPG architecture offers double-layer protection: encryption and watermarking. On the other hand, the paper proposes SDC integrated with secure BPG compression for real time intelligent traffic surveillance (ITS). The experimental results prove that the new compression technique BPG outperforms JPEG in terms of compression quality and size of the compression file. As the visual quality of the watermarked and compressed images improves with larger values of PSNR, the results show that the proposed SBPG substantially increases the quality of the watermarked compressed images. To achieve a high performance architecture three techniques are considered: first, using the center portion of the image to insert the encrypted signature. Second, watermarking is done in the frequency domain using block-wise DCT size 8×8. Third, in BPG encoder, the proposed architecture uses inter and intra prediction to reduce the temporal and spatial redundancy.
{"title":"SBPG: A secure better portable graphics compression architecture for high speed trusted image communication in the IoT","authors":"Umar A. Albalawi, S. Mohanty, E. Kougianos","doi":"10.1109/EUROSIME.2016.7463397","DOIUrl":"https://doi.org/10.1109/EUROSIME.2016.7463397","url":null,"abstract":"This paper proposes a hardware architecture for a Secure Digital Camera (SDC) integrated with Secure Better Portable Graphics (SBPG) compression algorithm. The proposed architecture is suitable for high performance imaging in the Internet of Things (IoT). The objectives of this paper are twofold. On the one hand, the proposed SBPG architecture offers double-layer protection: encryption and watermarking. On the other hand, the paper proposes SDC integrated with secure BPG compression for real time intelligent traffic surveillance (ITS). The experimental results prove that the new compression technique BPG outperforms JPEG in terms of compression quality and size of the compression file. As the visual quality of the watermarked and compressed images improves with larger values of PSNR, the results show that the proposed SBPG substantially increases the quality of the watermarked compressed images. To achieve a high performance architecture three techniques are considered: first, using the center portion of the image to insert the encrypted signature. Second, watermarking is done in the frequency domain using block-wise DCT size 8×8. Third, in BPG encoder, the proposed architecture uses inter and intra prediction to reduce the temporal and spatial redundancy.","PeriodicalId":438097,"journal":{"name":"2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128470717","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463353
E. Grunwald, R. Nuster, R. Hammer, H. Asmann, G. Paltauf, R. Brunner
Modern microelectronic devices frequently require the use of thin films and multi-layer systems [1]. Especially the application of advanced material models to simulate e.g. reliability issues for such components relies on the accurate determination of the layers' elastic properties [2]. Polyimides (PI) show many beneficial mechanical and chemical properties for applications in the field of microelectronics, e.g. in the realization of MEMS packages [3]. In the work reported here, the combination of a laser ultrasonic measurement and a numerically solved theoretical model [4] is presented in order to determine the elastic properties of a multi-layer system. The multi-layer system consists of a polyimide layer of 11 μm thickness and an 800 nm silicon nitride film on a (100) silicon substrate. The theoretical model uses a partial wave ansatz and a global matrix method in order to determine the frequency dependent phase velocity [5]. For the measurement of the frequency dependent phase velocity, nanosecond laser pulses were focused to a line shape onto the sample surface. This line excitation generates plane broadband surface acoustic waves (SAWs). The phase velocity depends on the frequency as a consequence of the different sound velocities of substrate and layers. The low frequency SAWs propagate mainly in the substrate, whereas higher frequency waves propagate mostly in the thin layers. An optical beam deflection method was applied to detect the SAWs. The Young's Modulus and the Poisson ratio of the polyimide layer were derived by fitting the theoretical curve to the experiment. The presented method provides the possibility to measure contactless on wafer level. It represents a valuable tool regarding the non-destructive evaluation of elastic properties of thin films in multi-layered systems. The Young's modulus and the Poisson ratio can serve as essential input for various advanced measurement techniques and simulations [2].
{"title":"Characterization of polyimid-multi-layer thin films combining laser ultrasonic measurements and numerical evaluations","authors":"E. Grunwald, R. Nuster, R. Hammer, H. Asmann, G. Paltauf, R. Brunner","doi":"10.1109/EUROSIME.2016.7463353","DOIUrl":"https://doi.org/10.1109/EUROSIME.2016.7463353","url":null,"abstract":"Modern microelectronic devices frequently require the use of thin films and multi-layer systems [1]. Especially the application of advanced material models to simulate e.g. reliability issues for such components relies on the accurate determination of the layers' elastic properties [2]. Polyimides (PI) show many beneficial mechanical and chemical properties for applications in the field of microelectronics, e.g. in the realization of MEMS packages [3]. In the work reported here, the combination of a laser ultrasonic measurement and a numerically solved theoretical model [4] is presented in order to determine the elastic properties of a multi-layer system. The multi-layer system consists of a polyimide layer of 11 μm thickness and an 800 nm silicon nitride film on a (100) silicon substrate. The theoretical model uses a partial wave ansatz and a global matrix method in order to determine the frequency dependent phase velocity [5]. For the measurement of the frequency dependent phase velocity, nanosecond laser pulses were focused to a line shape onto the sample surface. This line excitation generates plane broadband surface acoustic waves (SAWs). The phase velocity depends on the frequency as a consequence of the different sound velocities of substrate and layers. The low frequency SAWs propagate mainly in the substrate, whereas higher frequency waves propagate mostly in the thin layers. An optical beam deflection method was applied to detect the SAWs. The Young's Modulus and the Poisson ratio of the polyimide layer were derived by fitting the theoretical curve to the experiment. The presented method provides the possibility to measure contactless on wafer level. It represents a valuable tool regarding the non-destructive evaluation of elastic properties of thin films in multi-layered systems. The Young's modulus and the Poisson ratio can serve as essential input for various advanced measurement techniques and simulations [2].","PeriodicalId":438097,"journal":{"name":"2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"198 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123349700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463368
M. Stiebing, E. Lortscher, W. Steller, D. Vogel, M. Wolf, T. Brunschwiler, B. Wunderle
With the anticipated slow-down of Moore's Law in the near future, three-dimensional (3D) packaging of microelectronic structures would enable to further increase the integration density required to meet the forecasted demands of future exa-scale computing, cloud computing, big data systems, cognitive computing, mobile communicatoin and other emerging technologies. Through-silicon vias (TSVs) are a pathway to provide electrical connections for signaling and power-delivery through 3D-stacked silicon (Si) microstructures. TSVs and related structures such as, e.g., interconnects and redistribution lines, however, induce stress in their proximity, namely upon electrochemical deposition and subsequent annealing, the latter due to the large mismatch in the coefficient of thermal expansion between Si and the TSV-filling materials used. Stress-induced crowding and relaxation of the Si lattice can cause a variety of issues ranging from active-device performance degradation, interfacial delamination or interconnect failures to cracking of the entire Si microstructures at stress hotspots upon assembly or operation. Employing a novel dual-shell Si interposer concept with both power delivery and signaling through TSVs, we aim at removing the heat dissipated from the active components sitting on top of one interposer shell through embedded liquid-cooling cavities, a strategy that generically enables true 3D stacking but may also induce additional stress. In the current paper, we reduce system complexity and first investigate, both experimentally and theoretically the TSV-induced stress profiles in one Si interposer half before introducing cooling cavities and sealing structures. After each processing step, the residual and non-thermal stress profile around the TSV is determined using a confocal Raman microscope with sub-micrometer spot-size acting as a local strain gauge. These measurements are conducted under ultra-silent conditions, revealing an unprecedented resolution of 0.01 cm-1, corresponding to approx. 4.3 MPa of stress in crystalline Si. A detailed comparison of measurements and finite element analysis (with the later taking into account geometry and material properties) is provided, revealing both a good qualitative and quantitative correlation between theory and experiment. We also show that athermal stress after copper deposition can be minimized during an annealing step.
{"title":"Stress investigations in 3D-integrated silicon microstructures","authors":"M. Stiebing, E. Lortscher, W. Steller, D. Vogel, M. Wolf, T. Brunschwiler, B. Wunderle","doi":"10.1109/EUROSIME.2016.7463368","DOIUrl":"https://doi.org/10.1109/EUROSIME.2016.7463368","url":null,"abstract":"With the anticipated slow-down of Moore's Law in the near future, three-dimensional (3D) packaging of microelectronic structures would enable to further increase the integration density required to meet the forecasted demands of future exa-scale computing, cloud computing, big data systems, cognitive computing, mobile communicatoin and other emerging technologies. Through-silicon vias (TSVs) are a pathway to provide electrical connections for signaling and power-delivery through 3D-stacked silicon (Si) microstructures. TSVs and related structures such as, e.g., interconnects and redistribution lines, however, induce stress in their proximity, namely upon electrochemical deposition and subsequent annealing, the latter due to the large mismatch in the coefficient of thermal expansion between Si and the TSV-filling materials used. Stress-induced crowding and relaxation of the Si lattice can cause a variety of issues ranging from active-device performance degradation, interfacial delamination or interconnect failures to cracking of the entire Si microstructures at stress hotspots upon assembly or operation. Employing a novel dual-shell Si interposer concept with both power delivery and signaling through TSVs, we aim at removing the heat dissipated from the active components sitting on top of one interposer shell through embedded liquid-cooling cavities, a strategy that generically enables true 3D stacking but may also induce additional stress. In the current paper, we reduce system complexity and first investigate, both experimentally and theoretically the TSV-induced stress profiles in one Si interposer half before introducing cooling cavities and sealing structures. After each processing step, the residual and non-thermal stress profile around the TSV is determined using a confocal Raman microscope with sub-micrometer spot-size acting as a local strain gauge. These measurements are conducted under ultra-silent conditions, revealing an unprecedented resolution of 0.01 cm-1, corresponding to approx. 4.3 MPa of stress in crystalline Si. A detailed comparison of measurements and finite element analysis (with the later taking into account geometry and material properties) is provided, revealing both a good qualitative and quantitative correlation between theory and experiment. We also show that athermal stress after copper deposition can be minimized during an annealing step.","PeriodicalId":438097,"journal":{"name":"2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128134809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463360
S. Hartmann, J. Bonitz, M. Heggen, S. Hermann, O. Holck, S. Schulz, T. Gessner, B. Wunderle
In this paper we present our recent efforts to develop an in situ tensile test device for thermo-mechanical characterization of interfaces between single-walled carbon nanotubes (SWCNTs) and metals. For the mechanical tests, the chosen loading condition is a pull-out test. After summarizing results of maximum stresses calculated from molecular dynamics simulations and obtained from in situ scanning electron microscope experiments we outline the requirement for an in situ experimental method with atomic resolution to study the mechanics of SWCNT-metal interfaces in further detail. To this purpose, we designed, fabricated and characterized a silicon-based micromechanical test stage with a thermal actuator for pull-out tests inside a transmission electron microscope. The objective is to obtain in situ images of SWCNT-metal interfaces under mechanical loads at the atomic scale for fundamental structure investigation. The design of this MEMS test stage permits also the integration of SWCNTs by wafer level technologies. First experiments with this MEMS test stage confirmed the presence of suspended thin metal electrodes to embed SWCNTs. These suspended thin metal electrodes are electron transparent at the designated SWCNT locations. Actuator movements were evaluated by digital image correlation and we observed systematic actuator movements that allow for a defined load application of SWCNTS. Although significant image drifts occured during actuation, we achieved atomic resolution of the metal electrode and stable movement in the focal plane of the electron microscope. The presented system may be also used and further developed for in situ characterization of other materials.
{"title":"An in situ tensile test device for thermo-mechanical characterisation of interfaces between carbon nanotubes and metals","authors":"S. Hartmann, J. Bonitz, M. Heggen, S. Hermann, O. Holck, S. Schulz, T. Gessner, B. Wunderle","doi":"10.1109/EUROSIME.2016.7463360","DOIUrl":"https://doi.org/10.1109/EUROSIME.2016.7463360","url":null,"abstract":"In this paper we present our recent efforts to develop an in situ tensile test device for thermo-mechanical characterization of interfaces between single-walled carbon nanotubes (SWCNTs) and metals. For the mechanical tests, the chosen loading condition is a pull-out test. After summarizing results of maximum stresses calculated from molecular dynamics simulations and obtained from in situ scanning electron microscope experiments we outline the requirement for an in situ experimental method with atomic resolution to study the mechanics of SWCNT-metal interfaces in further detail. To this purpose, we designed, fabricated and characterized a silicon-based micromechanical test stage with a thermal actuator for pull-out tests inside a transmission electron microscope. The objective is to obtain in situ images of SWCNT-metal interfaces under mechanical loads at the atomic scale for fundamental structure investigation. The design of this MEMS test stage permits also the integration of SWCNTs by wafer level technologies. First experiments with this MEMS test stage confirmed the presence of suspended thin metal electrodes to embed SWCNTs. These suspended thin metal electrodes are electron transparent at the designated SWCNT locations. Actuator movements were evaluated by digital image correlation and we observed systematic actuator movements that allow for a defined load application of SWCNTS. Although significant image drifts occured during actuation, we achieved atomic resolution of the metal electrode and stable movement in the focal plane of the electron microscope. The presented system may be also used and further developed for in situ characterization of other materials.","PeriodicalId":438097,"journal":{"name":"2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128183915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463317
C. Qian, Y. Li, Jiajie Fan, Xuejun Fan, Jiajia Fu, Lixia Zhao, Guoqi Zhang
In this study, an electro-optical simulation method is developed to simulate the light intensity distribution of a conventional GaN based blue LED chip. The entire modeling process consists of electrical simulation with ANSYS and optical simulation with LightTools, which are based on an assumption of proportional relation between the distributed current density and light emission energy on multiple quantum well layer. Experimental results show that the proposed simulation method can give a good prediction on the light intensity distribution of a packaged GaN based blue LED chip.
{"title":"Electro-optical simulation of a GaN based blue LED chip","authors":"C. Qian, Y. Li, Jiajie Fan, Xuejun Fan, Jiajia Fu, Lixia Zhao, Guoqi Zhang","doi":"10.1109/EUROSIME.2016.7463317","DOIUrl":"https://doi.org/10.1109/EUROSIME.2016.7463317","url":null,"abstract":"In this study, an electro-optical simulation method is developed to simulate the light intensity distribution of a conventional GaN based blue LED chip. The entire modeling process consists of electrical simulation with ANSYS and optical simulation with LightTools, which are based on an assumption of proportional relation between the distributed current density and light emission energy on multiple quantum well layer. Experimental results show that the proposed simulation method can give a good prediction on the light intensity distribution of a packaged GaN based blue LED chip.","PeriodicalId":438097,"journal":{"name":"2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128523320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463378
B. Métais, M. Kuezynska, A. Kabakchiev, S. Wolfangel, P. Buhl, S. Weihe
Electronic devices for automotive applications undergo substantial thermo-mechanical cyclic loads during their operation. Within the phase of assembly, a large variety of passive and active electronic components are electrically connected by solder joints of complex geometrical shapes. As a consequence, external thermomechanical loads result in local multiaxial stress states in the solder material during their operation. In the past years, significant efforts were made in the characterization of solder materials and the accurate FE-modeling of their viscoplastic deformation behavior as well as the modeling of their damage behavior. However, material testing and numerical model calibration were focused on uniaxial tests, which result in a homogeneous stress state and a fixed ratio between its hydrostatic and deviatoric parts. Therefore, the correlation between varying multiaxial loads and cyclic damage evolution in solder alloys is still not understood. Here, we report on the experimental investigation of Low Cycle Fatigue (LCF) on bulk samples under uniaxial and multiaxial stress states realized by means of a pure tension-compression and superimposed tension-torsion loads. In order to describe the observed cyclic degradation behavior, a phenomenological fatigue damage model is modified incorporating the influence of multiaxial stresses in the damage development. The new damage model is implemented as a user-subroutine for Finite Element (FE) calculation supported by the commercial FE-package ansysTM. Uniaxial and multiaxial loads are simulated on the meshed specimen-geometry. The material model is able to describe the mechanical properties in the initial state of deformation. Besides, it shows numerical stability which enables the simulation of large number of cyclic loads. Based on the damage mechanic approach enhanced by multiaxial effects, this study contributes to the framework of solder joints modeling.
{"title":"Experimental and numerical investigation of fatigue damage development under multiaxial loads in a lead-free Sn-based solder alloy","authors":"B. Métais, M. Kuezynska, A. Kabakchiev, S. Wolfangel, P. Buhl, S. Weihe","doi":"10.1109/EUROSIME.2016.7463378","DOIUrl":"https://doi.org/10.1109/EUROSIME.2016.7463378","url":null,"abstract":"Electronic devices for automotive applications undergo substantial thermo-mechanical cyclic loads during their operation. Within the phase of assembly, a large variety of passive and active electronic components are electrically connected by solder joints of complex geometrical shapes. As a consequence, external thermomechanical loads result in local multiaxial stress states in the solder material during their operation. In the past years, significant efforts were made in the characterization of solder materials and the accurate FE-modeling of their viscoplastic deformation behavior as well as the modeling of their damage behavior. However, material testing and numerical model calibration were focused on uniaxial tests, which result in a homogeneous stress state and a fixed ratio between its hydrostatic and deviatoric parts. Therefore, the correlation between varying multiaxial loads and cyclic damage evolution in solder alloys is still not understood. Here, we report on the experimental investigation of Low Cycle Fatigue (LCF) on bulk samples under uniaxial and multiaxial stress states realized by means of a pure tension-compression and superimposed tension-torsion loads. In order to describe the observed cyclic degradation behavior, a phenomenological fatigue damage model is modified incorporating the influence of multiaxial stresses in the damage development. The new damage model is implemented as a user-subroutine for Finite Element (FE) calculation supported by the commercial FE-package ansysTM. Uniaxial and multiaxial loads are simulated on the meshed specimen-geometry. The material model is able to describe the mechanical properties in the initial state of deformation. Besides, it shows numerical stability which enables the simulation of large number of cyclic loads. Based on the damage mechanic approach enhanced by multiaxial effects, this study contributes to the framework of solder joints modeling.","PeriodicalId":438097,"journal":{"name":"2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123534745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-04-18DOI: 10.1109/EUROSIME.2016.7463298
P. Gardes, F. Roqueta, M. Diatta, P. Martinez, F. Lauron, E. Bouyssou, P. Poveda
For the last decade, paraelectric BaxSr1-xTiO3 (BST) thin films have been especially studied to fabricate MIM capacitor for capacitance tuning applications. This paper describes the mechanisms of cracks apparition under BST stacked MIMIM capacitors (Metal Insulator Metal Insulator Metal) built on silicon substrate. The methodology used in this study to have a further understanding of this phenomenon is to investigate 2D process simulations, based on an elastic model. Hence, it could be evidenced that the gap between the extreme stress levels induced by an annealing performed at the end of the capacitor manufacturing is the main contributor in the crack formation. Then, the change from silicon to a sapphire substrate was implemented to avoid cracks in the real process integration. Finally, the capacitor devices could be tested and were demonstrated to exhibit better electrical specifications.
在过去的十年中，对准电BaxSr1-xTiO3 (BST)薄膜进行了专门的研究，以制造用于电容调谐应用的MIM电容器。本文研究了基于硅衬底的BST叠置电容(Metal Insulator Metal Insulator Metal)产生裂纹的机理。为了进一步理解这一现象，本研究采用了基于弹性模型的二维过程模拟方法。因此，可以证明，在电容器制造结束时进行的退火引起的极端应力水平之间的差距是裂纹形成的主要原因。然后，实现了从硅衬底到蓝宝石衬底的变化，以避免在实际的工艺集成中出现裂缝。最后，电容器器件可以进行测试，并被证明具有更好的电气规格。
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