Pub Date : 2023-10-01DOI: 10.1109/MDAT.2023.3284295
G. De Micheli
This keynote paper highlights the interaction between emerging technologies and software tools to enable the current evolution of electronic design automation systems.
这篇主题论文强调了新兴技术和软件工具之间的相互作用，使电子设计自动化系统的当前发展成为可能。
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Pub Date : 2023-10-01DOI: 10.1109/MDAT.2023.3253603
V. Meyers, Dennis R. E. Gnad, M. Tahoori
This article emphasizes the growing importance of studying defenses for physical attacks on neural network accelerators, and describes approaches based on side-channel attacks and fault-injection attacks.
本文强调了研究神经网络加速器物理攻击防御的重要性，并介绍了基于侧信道攻击和故障注入攻击的防御方法。
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Pub Date : 2023-10-01DOI: 10.1109/MDAT.2023.3286334
T. Martin, C. Barnes, G. Grewal, S. Areibi
This article discusses challenges posed by current designs and proposes the adoption of machine-learning probes in the FPGA design flow to improve performance.
本文讨论了当前设计带来的挑战，并提出在FPGA设计流程中采用机器学习探针来提高性能。
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Pub Date : 2023-10-01DOI: 10.1109/mdat.2023.3287930
I. O’Connor, R. Wille, A. Pimentel, V. Bertacco
Digital Object Identier 10.1109/MDAT.2023.3287930 Date of current version: 29 August 2023. DATE is A leading international event providing unique networking opportunities. The conference brings together designers and design automation users, researchers, and vendors, as well as specialists in hardware and software design, testing, and manufacturing of electronic circuits and systems—from system-level hardware and software implementation down to integrated circuit design. Almost four years had passed since we closed the doors on the last in-person edition of the DATE conference. With three online editions due to COVID19 and in anticipation of a return to a full in-person format, the DATE Sponsors Committee felt that the conference needed to put interaction, as well as reinforcing and rebuilding links in the community, at the heart of the event. In this spirit, the postpandemic 2023 edition of DATE had a substantially reworked format intending for significant added value for in-person participation, with more focus on interaction and condensed down to three days. The intent was that, in this way, the community could actually do what DATE is for meeting, discussing, and exchanging the latest progress in design and design automation. The 26th DATE conference was held at the Flanders Meeting and Convention Center in Antwerp, Belgium, from 17 to 19 April 2023 and offered an exciting, wide-ranging technical program.
{"title":"Postpandemic Conferences: The DATE 2023 Experience","authors":"I. O’Connor, R. Wille, A. Pimentel, V. Bertacco","doi":"10.1109/mdat.2023.3287930","DOIUrl":"https://doi.org/10.1109/mdat.2023.3287930","url":null,"abstract":"Digital Object Identier 10.1109/MDAT.2023.3287930 Date of current version: 29 August 2023. DATE is A leading international event providing unique networking opportunities. The conference brings together designers and design automation users, researchers, and vendors, as well as specialists in hardware and software design, testing, and manufacturing of electronic circuits and systems—from system-level hardware and software implementation down to integrated circuit design. Almost four years had passed since we closed the doors on the last in-person edition of the DATE conference. With three online editions due to COVID19 and in anticipation of a return to a full in-person format, the DATE Sponsors Committee felt that the conference needed to put interaction, as well as reinforcing and rebuilding links in the community, at the heart of the event. In this spirit, the postpandemic 2023 edition of DATE had a substantially reworked format intending for significant added value for in-person participation, with more focus on interaction and condensed down to three days. The intent was that, in this way, the community could actually do what DATE is for meeting, discussing, and exchanging the latest progress in design and design automation. The 26th DATE conference was held at the Flanders Meeting and Convention Center in Antwerp, Belgium, from 17 to 19 April 2023 and offered an exciting, wide-ranging technical program.","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":"34 1","pages":"104-112"},"PeriodicalIF":2.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88854376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-01DOI: 10.1109/MDAT.2023.3261800
Seyed-Sajad Ahmadpour, Nima Jafari Navimipour, Ali Nawaz Bahar, M. Mosleh, Senay Yalçin
Area overhead and energy consumption continue to dominate the scalability issues of modern digital circuits. In this context, atomic silicon and reversible logic have emerged as suitable alternatives to address both issues. In this article, the authors propose novel nano-scale circuit design with low area and energy overheads using the same. In particular, the authors propose a reversible gate with Miller algorithm and atomic silicon technology. This article is extremely relevant in today’s era, when the world is moving toward low area and low energy circuits for use in edge devices.
{"title":"An Energy-Aware Nanoscale Design of Reversible Atomic Silicon Based on Miller Algorithm","authors":"Seyed-Sajad Ahmadpour, Nima Jafari Navimipour, Ali Nawaz Bahar, M. Mosleh, Senay Yalçin","doi":"10.1109/MDAT.2023.3261800","DOIUrl":"https://doi.org/10.1109/MDAT.2023.3261800","url":null,"abstract":"Area overhead and energy consumption continue to dominate the scalability issues of modern digital circuits. In this context, atomic silicon and reversible logic have emerged as suitable alternatives to address both issues. In this article, the authors propose novel nano-scale circuit design with low area and energy overheads using the same. In particular, the authors propose a reversible gate with Miller algorithm and atomic silicon technology. This article is extremely relevant in today’s era, when the world is moving toward low area and low energy circuits for use in edge devices.","PeriodicalId":48917,"journal":{"name":"IEEE Design & Test","volume":"40 1","pages":"62-69"},"PeriodicalIF":2.0,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43983761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-01DOI: 10.1109/MDAT.2023.3286336
Sandro M. Marques, F. Rossi, M. C. Luizelli, A. C. S. Beck, A. Lorenzon
This article proposes a framework for thread-throttling and core-frequency optimization. The framework titled TAURUS is dynamic and transparent to the end user.
本文提出了一个线程节流和核心频率优化的框架。名为TAURUS的框架是动态的，对最终用户是透明的。
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