Iet Circuits Devices & Systems最新文献

This paper presents simulation and measurement results of a 2–4 GHz octave bandwidth interference suppression circuit. The circuit accomplishes the function of a tunable frequency notch through an interferometer architecture. The relative delay in the interferometer paths is varied with GaN monolithic microwave integrated circuit tunable delay lines. The delay is adjusted by varying the drain voltage of cold-FET connected high electron mobility transistors acting as varactors. Two types of periodically-loaded delay lines are compared: a uniform and a tapered design. A simple theoretical study, relating the delays and amplitudes in the interferometer circuit branches, is developed to inform the design. Two interference suppression hybrid circuits are implemented, and measurements demonstrate a 25–40 dB notch across the 2.24–4 GHz range for the uniform delay line, and 2.32–4.13 GHz for the tapered design. The return loss for both designs remains below 10 dB. Measurements with two tones spaced 0.5 and 1 GHz for varying tone power are performed to quantify suppression. The circuit can handle an input power of 37 dBm and maintains performance with two simultaneous 25 dBm tones spaced 0.5 GHz apart. Linearity is characterised with 10 MHz two-tone measurements, and the circuit demonstrates a 3rd-order intercept input power larger than 30 dBm for control biases above −12 V.

Currently, the Quartz Flexible Accelerometer (QFA) mounted for the applications working in high acceleration environment are suffering from the fracture of the flexible beams under external acceleration shock. This paper presents the mechanical model and reliability design approach of QFA to maintain the measuring ability under a fractured state. The structural parameters changed significantly in the mechanical model under a fractured state compared to those in the original model. A modified structure to maintain the measuring ability of QFA under a fractured state is designed with the reference of the sensitive module in Electrostatic Suspended Accelerometer (ESA). The corresponding close-loop system is corrected and discretised to ensure the stability requirements of the mechanical model. A static experiment is conducted to prove the effectiveness of the proposed model by a prototype QFA with completely fractured flexible beams. The result shows helpful on the preliminary research for QFA with the similar sensitive structure to ESA.

In this article, a new p⁺ pocket stacked gate oxide junctionless tunnelling field effect transistor (junction less tunnelling field effect transistor (JLTFET)) which has metal strip in gate oxide layer is proposed for analogue/RF circuit applications. Due to the insertion of a p⁺ pocket in source/channel junction and the use of metal strip in oxide layer, the following properties of the proposed JLTFET are resulted. First, the tunnelling barrier width is reduced in the source/channel junction thereby, electrons easily tunnel from the source to the channel. Second, the hole concentration (empty state) in the channel is increased, leading to higher electron contribution in the tunnelling process. These improvements are useful in achieving high drain current and steep subthreshold swing. As a result, the maximum ON current of 4.4 × 10⁻⁵ A/μm and average subthreshold swing of 40 mV/decade are obtained from simulation results. Moreover, as compared to conventional JLTFET, the proposed JLTFET provides improvements in reliability and analogue/radio frequency (RF) performance.