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A novel design of a silicon PIN diode for increasing the breakdown voltage 一种提高击穿电压的新型硅PIN二极管设计
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-06-06 DOI: 10.1049/cds2.12120
Farzaneh Rezaei, Fatemeh Dehghan Nayeri, Adel Rezaeian

This paper presents a new structure consisting of a silicon PIN junction with high breakdown voltage and low dark current with two Guard rings. To achieve the optimal structure, the effect of the parameters on the breakdown voltage and the dark current of the device has been investigated and simulated. The intrinsic thickness and impurity, the penetration depth of the active area and guard rings, location and number of guard rings, thickness, and distance between guard rings are the effective parameters of the device's breakdown voltage and dark current. In the proposed structure by placing two guard rings around the active area, the results show that an electric field is distributed at the edge of the active area between the guard rings, which leads to an increase of 292.62 V in breakdown voltage compared to the device without a guard ring.

本文提出了一种由高击穿电压、低暗电流的硅PIN结和两个保护环组成的新结构。为了实现最优结构,研究并模拟了各参数对器件击穿电压和暗电流的影响。本征厚度和杂质、有源区和保护环的穿透深度、保护环的位置和数量、厚度和保护环之间的距离是器件击穿电压和暗电流的有效参数。结果表明,在有源区周围放置两个保护环的结构中,保护环之间在有源区边缘处分布了电场,使得击穿电压比没有保护环的器件提高了292.62 V。
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引用次数: 1
Bipartite consensus in coupled harmonic oscillators with local instantaneous interaction and measurement noise 局部瞬时相互作用和测量噪声耦合谐振子的二部一致性
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-05-06 DOI: 10.1049/cds2.12118
Zhaoyan Wang, Hengyu Li, Jun Liu, Tiehui Zhang, Xinru Ma, Shaorong Xie, Jun Luo

This paper investigates the issue of bipartite consensus for coupled harmonic oscillators under the cooperation-competition network topology while considering measurement noise. The concept of bipartite consensus in mean square is established for networked harmonic oscillator systems. In this sense, two consensus algorithms that only use sampled velocity data on the agents in a network are given. Based on the specific structure of the Laplacian matrix related to the cooperation-competition network topology, some sufficient conditions are given to ensure the realisation of the bipartite consensus of the coupled harmonic oscillators. Finally, three examples are provided to illustrate the corresponding theoretical results.

在考虑测量噪声的情况下,研究了合作-竞争网络拓扑下耦合谐振子的二部一致性问题。建立了网络谐振子系统均方二部一致的概念。在此意义上,给出了两种仅使用网络中agent的采样速度数据的一致性算法。根据与合作-竞争网络拓扑相关的拉普拉斯矩阵的具体结构,给出了保证耦合谐振子二部一致性实现的一些充分条件。最后,给出了三个算例来说明相应的理论结果。
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引用次数: 0
Calculated characterisation of a sensitive gas sensor based on PEDOT:PSS 基于PEDOT:PSS的灵敏气体传感器的计算特性
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-04-30 DOI: 10.1049/cds2.12119
Mokhtar Aarabi, Alireza Salehi, Alireza Kashaninia

The interactions between poly (3,4-ethylene dioxythiophene) poly (styrenesulfonate) (PEDOT:PSS) and small gas molecules are studied using non-equilibrium Green's function formalism based on the density functional theory. The proposed method is implemented in the Tran SIESTA code to benefit from the potential application of PEDOT:PSS as a gas sensor. The results show that doping with nanoparticles can drastically improve the sensitivity of polymer-based chemical gas sensors. Moreover, among various PEDOT:PSS doping materials, silver nanoparticles have an appropriate response to ammonia, while platinum shows the best response to carbon dioxide. The numerical results can be useful to design PEDOT:PSS-based gas sensors.

采用基于密度泛函理论的非平衡格林函数形式,研究了聚(3,4-乙烯二氧噻吩)聚苯乙烯磺酸盐(PEDOT:PSS)与气体小分子的相互作用。提出的方法在Tran SIESTA代码中实现,以受益于PEDOT:PSS作为气体传感器的潜在应用。结果表明,纳米颗粒的掺杂可以显著提高聚合物基化学气体传感器的灵敏度。此外,在各种PEDOT:PSS掺杂材料中,银纳米粒子对氨的响应较好,而铂对二氧化碳的响应最好。数值计算结果可为基于PEDOT: pss的气体传感器设计提供参考。
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引用次数: 0
Tolerant and low power subtractor with 4:2 compressor and a new TG-PTL-float full adder cell 容忍和低功耗减法器与4:2压缩机和一个新的tg - ptl浮动全加法器单元
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-04-25 DOI: 10.1049/cds2.12117
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Rahim Ghayour

A new 1-bit full adder (FA) cell illustrating low-power, high-speed, and a small area is presented by a combination of transmission gate (TG), pass transistor logic (PTL), and float techniques. Using the proposed cell, a 4:2 compressor is implemented and its performance is investigated under diverse circumstances of voltage, temperature, and driving. The process and corners are evaluated through the process-voltage-temperature (PVT) variations and the Monte Carlo method (MCM), respectively. The accuracy and reliability of the proposed 4:2 compressor are confirmed carefully. Utilising the proposed FA and the compressor, an efficient 8-bit subtractor is implemented for bioimage processing, in particular for difference detection of images. A new mechanism is presented to improve the detection performance of digital signal processors (DSPs) by the addition and subtraction of two images for their difference. The quality of the resulted image confirms the efficiency of the proposed circuits and the method. The high performance of the circuits makes them a promising candidate for the next generation of integrated circuits (ICs) applicable to medical image processing.

结合传输门(TG)、通管逻辑(PTL)和浮子技术,提出了一种新的1位全加法器(FA)单元,具有低功耗、高速和小面积的特点。利用所提出的电池,实现了4:2压缩机,并研究了其在不同电压、温度和驱动环境下的性能。通过过程-电压-温度(PVT)变化和蒙特卡罗方法(MCM)分别对过程和拐角进行了评估。仔细确认了所提出的4:2压缩机的准确性和可靠性。利用所提出的FA和压缩器,实现了一个高效的8位减法器,用于生物图像处理,特别是图像的差异检测。提出了一种通过对两幅图像的差值进行加减来提高数字信号处理器(dsp)检测性能的新机制。所得到的图像质量证实了所提出的电路和方法的有效性。该电路的高性能使其成为应用于医学图像处理的下一代集成电路(ic)的有希望的候选者。
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引用次数: 6
A high-performance processor for optimal ate pairing computation over Barreto–Naehrig curves Barreto-Naehrig曲线最优共轭计算的高性能处理器
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-04-06 DOI: 10.1049/cds2.12116
Yujun Xie, Bin Wang, Lijun Zhang, Xin Zheng, Xiaoling Lin, Xiaoming Xiong, Yuan Liu

This paper presents a high-performance processor for optimal ate pairing on Barreto–Naehrig curves over 256-bit prime field at the 128-bit security level. The proposed design exploits parallelism and pipeline at different levels of the pairing algorithm, including the prime field operation, the second extension of the prime field Fp2 $left({F}_{{p}^{2}}right)$ operation, and operations based on Fp2 ${F}_{{p}^{2}}$. The proposed design needs 37,271 cycles to compute optimal ate pairings. The results of implementation on a 90 nm standard cell library show that the proposed design consumes 751k gates and can compute the respective pairings in 0.10 ms. This result is at least 60 percent better than related reports in terms of normalised area-time on ASIC. Moreover, the design is also implemented on Xilinx Virtex-6 platform, which consumes 25K Slices and 240 DSPs and takes 0.52 ms to calculate one optimal ate pairing operation.

本文提出了一种高性能处理器,用于256位素数域上Barreto-Naehrig曲线在128位安全级别上的最优值配对。提出的设计利用了配对算法不同层次的并行性和流水线性,包括主要字段操作,素数域F p 2 $左({F}_{{p}}^{2}}右)$运算的第二次扩展,以及基于F p 2 ${F}_{{p}^{2}}$的操作。所提出的设计需要37271个循环来计算最优的匹配。在90 nm标准细胞库上的实现结果表明,所提出的设计消耗751k栅极,可以在0.10 ms内计算出相应的配对。该结果比相关报告在ASIC上的标准化区域时间至少好60%。此外,该设计还在Xilinx Virtex-6平台上实现,该平台消耗25K Slices和240个dsp,计算一个最优的ate配对操作耗时0.52 ms。
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引用次数: 1
1.2 kV 4H-SiC planar power MOSFETs with a low-K dielectric in central gate 1.2 kV低k介电介质中央栅极4H-SiC平面功率mosfet
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-03-30 DOI: 10.1049/cds2.12115
Dong Liu, Mingyue Li, Yangjie Ou, Zhong Lan, Maosen Tang, Weibo Wang, Xiarong Hu

A 1.2 kV 4H-SiC planar power MOSFET with a low-K dielectric in central gate (LK-MOS) is proposed in this paper. The LK-MOS features a P+ shielding region and a thick low-K dielectric layer under the central gate. The insulation layer capacitance is reduced by the thick low-K dielectric, while the depletion layer capacitance is decreased due to the reduced gate-to-drain overlap. The LK-MOS is demonstrated to have 97.8%, 70.6%, and 52.2% lower HF-FOM (Ron × Cgd), and 98.9%, 97.4%, and 69.4% lower HF-FOM (Ron × Qgd), when compared with that of the conventional MOSFET (C-MOS), Buffered-Gate MOSFET (BG-MOS) and Thick Central Oxide MOSFET (TCOX-MOS), respectively. Besides, the LK-MOS can also have 16.8%, 5.9% lower Cgs, and 19.9%, 12.4% lower Qgs compared with that of BG-MOS and TCOX-MOS.

提出了一种具有低k介电介质的1.2 kV 4H-SiC平面功率MOSFET (LK-MOS)。LK-MOS具有P+屏蔽区和中央栅极下厚的低k介电层。绝缘层电容由于较厚的低k介电体而降低,而耗尽层电容由于栅极-漏极重叠减少而降低。与传统MOSFET (C-MOS)、缓冲栅MOSFET (BG-MOS)和厚中心氧化物MOSFET (TCOX-MOS)相比,LK-MOS的HF-FOM (Ron × Qgd)分别降低了97.8%、70.6%和52.2%,98.9%、97.4%和69.4%。与BG-MOS和TCOX-MOS相比,LK-MOS的Cgs分别降低16.8%和5.9%,Qgs分别降低19.9%和12.4%。
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引用次数: 1
Onto a higher power handling for very high frequency direct antenna modulation 到一个更高的功率处理非常高的频率直接天线调制
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-03-17 DOI: 10.1049/cds2.12108
Jean Paul D. Santos, Kamal Bhakta, Foad Fereidoony, Yuanxun Ethan Wang

Antennas constrained to platforms that require miniaturisation, significantly smaller than the wavelength of the desired frequency, are inefficient radiators and limited to narrowband operations. To overcome these limitations, a technique called direct antenna modulation (DAM), is incorporated with electrically small antennas to enable transmission of high-bandwidth signals through narrowband antennas. DAM utilises switching circuitry to directly modulate the antenna at its corresponding peak energy moments all while being synchronised to the input signal, yet previous iterations were susceptible to low transmit powers due to limitations in the switching network's power handling capability and tremendous coupling between transistor ports that results in an ambiguous switching signal at the gate. A frequency shift keyed (FSK) DAM antenna topology is proposed, which is capable of high-power transmission through a geometrically symmetrical switching circuitry integrating pairs of complementary GaN transistors. The symmetry assists in removing coupling among transistor ports to effectively switch the transistors OFF and ON without regard to the input RF power. The authors’ theoretical analysis agrees with our simulations and far-field measurements which show the FSK DAM antenna topology is capable of transmit powers up to −1 dBm given a 42 dBm of input RF power.

天线被限制在需要小型化的平台上,远远小于所需频率的波长,是低效的辐射体,仅限于窄带操作。为了克服这些限制,一种被称为直接天线调制(DAM)的技术与电小型天线结合在一起,使高带宽信号能够通过窄带天线传输。DAM利用开关电路在其相应的峰值能量时刻直接调制天线,同时与输入信号同步,但由于交换网络的功率处理能力和晶体管端口之间的巨大耦合的限制,以前的迭代容易受到低发射功率的影响,从而导致栅极处的开关信号模糊。提出了一种移频键控(FSK) DAM天线拓扑结构,该拓扑结构能够通过几何对称的开关电路集成对互补GaN晶体管实现高功率传输。这种对称性有助于消除晶体管端口之间的耦合,从而在不考虑输入射频功率的情况下有效地切换晶体管的OFF和ON。作者的理论分析与我们的仿真和远场测量结果一致,结果表明,在输入射频功率为42 dBm的情况下,FSK DAM天线拓扑的发射功率可达- 1 dBm。
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引用次数: 0
An energy-efficient dynamic comparator in Carbon Nanotube Field Effect Transistor technology for successive approximation register ADC applications 碳纳米管场效应晶体管技术中用于逐次逼近寄存器ADC应用的节能动态比较器
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-03-02 DOI: 10.1049/cds2.12112
Hamid Mahmoodian, Mehdi Dolatshahi, S. Mohammadali Zanjani, Mohammad Amin Honarvar

In this paper, a latch-based energy-efficient dynamic comparator is presented in Carbon Nanotube Field Effect Transistor (CNTFET) technology. The proposed comparator consists of two main stages: pre-amplifier and latch. The latch stage is designed for the main purpose of low-power consumption and high-speed performances. The proposed speed-up technique for the latch structure controls the threshold voltage (Vth) of the cross-coupled inverters. So, the delay of the latch stage decreases and consequently, the overall delay of the comparator circuit is also reduced up to 19.4% while the maximum speed performance of the proposed comparator increases by 54% compared to the conventional double-tail dynamic comparator. Additionally, the use of the proposed distinctive structure for the tail transistors in the latch stage, leads to more than 11% reduction in the energy per conversion of the proposed circuit compared to the conventional double-tail dynamic comparator. To verify the circuit performances, the comparator circuit is simulated in HSPICE using 32 nm CNTFET Stanford model technology parameters. The simulation results show that the proposed comparator with the proposed speed-up approach can operate up to 14.2 GHz with a sensitivity of 30 μV at the supply voltage of 1 V, while consumes only 42.38 μW of power. Therefore, the proposed comparator can be used in high-resolution (up to 12 bit) and high-speed low-power analogue-to-digital converter applications. Moreover, the effects of the non-ideal fabrication process (including the pitch and the threshold voltage variations), supply voltage and temperature variations are investigated in this work. Monte-Carlo analysis shows that the standard deviation of the offset voltage is approximately 1.24 mV. Finally, the kickback noise of the proposed comparator is obtained as 80 μV, which shows the proper performance of the proposed comparator circuit in comparison with other reported designs.

在碳纳米管场效应晶体管(CNTFET)技术中,提出了一种基于锁存器的节能动态比较器。所提出的比较器由两个主要级组成:前置放大器和锁存器。锁存器设计的主要目的是为了实现低功耗和高速性能。所提出的锁存器结构加速技术控制交叉耦合逆变器的阈值电压。因此,锁存阶段的延迟减少,因此,比较器电路的总延迟也减少了19.4%,而与传统的双尾动态比较器相比,所提出的比较器的最大速度性能提高了54%。此外,与传统的双尾动态比较器相比,在锁存阶段使用所提出的尾部晶体管的独特结构,可使所提出电路的每次转换能量减少11%以上。为了验证电路的性能,采用32 nm CNTFET斯坦福模型技术参数在HSPICE中对比较器电路进行了仿真。仿真结果表明,在电源电压为1 V时,采用加速方法的比较器工作频率可达14.2 GHz,灵敏度为30 μV,功耗仅为42.38 μW。因此,所提出的比较器可用于高分辨率(高达12位)和高速低功耗模数转换器应用。此外,本文还研究了非理想制造工艺(包括节距和阈值电压变化)、电源电压和温度变化的影响。蒙特卡罗分析表明,偏置电压的标准差约为1.24 mV。最后,比较器的反扰噪声为80 μV,与其他已报道的比较器电路相比较,表明该比较器电路具有良好的性能。
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引用次数: 2
Optical properties of a-Si:H thin-film transistors by illumination by white light with different colour temperatures 不同色温白光照射下a-Si:H薄膜晶体管的光学特性
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-02-27 DOI: 10.1049/cds2.12114
Jui-Hung Chang, Chia-Lun Lee, Fu-Hsing Chen, Chih-Lung Lin

This work investigates the optical properties of hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) using the transmittances of colour filters and the spectra of commercialised white light-emitting diodes (LEDs). The ratios of the measured photocurrents obtained using the TFTs that are covered and are not covered colour filters are related to the effective illumination from white LEDs with different colour temperatures that pass through the colour filters. A new factor that is based on these ratios of photocurrents is proposed to evaluate the output characteristics of optical sensors with our previously developed white-light photocurrent gating (WPCG) structure. The analytical results demonstrate that the proposed factor and the output voltages of the WPCG structure are highly correlated with each other, favouring the optimisation of the design parameters to realise an optical sensor that is highly reliable under diverse conditions for use in large interactive displays.

本研究利用彩色滤光片的透射率和商用白光发光二极管(led)的光谱研究了氢化非晶硅薄膜晶体管(a-Si:H TFTs)的光学特性。使用覆盖和未覆盖滤色器的tft获得的测量光电流的比率与通过滤色器的具有不同色温的白光led的有效照明有关。提出了一个基于这些光电流比率的新因子来评估我们先前开发的白光光电流门控(WPCG)结构的光传感器的输出特性。分析结果表明,所提出的因子和WPCG结构的输出电压彼此高度相关,有利于优化设计参数,以实现在各种条件下高度可靠的光学传感器,用于大型交互式显示器。
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引用次数: 0
Frequency generator demonstration using half mode Substrate Integrated Waveguide (SIW) structures for chipless Radio Frequency Identification (RFID) reader 使用半模基片集成波导(SIW)结构的无芯片射频识别(RFID)阅读器的频率发生器演示
IF 1.3 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2022-02-24 DOI: 10.1049/cds2.12113
Vijay Sharma, Mohammad Hashmi

A frequency generator based on the forward coupler principle is proposed. The proposed design, intended for high-frequency applications, uses Half-Mode Substrate Integrated Waveguide structure to realise the forward coupler. It thus achieves compactness, requiring approximately half the area compared to Substrate Integrated Waveguide structures, and supports non Transverse Electromagnetic (TEM) functionality. The non-TEM environment provides the flexibility to use the frequency generator for chipless Radio Frequency Identification readers in the sub-GHz band and mm-wave range. Full-wave simulations and the subsequent measurements on a prototype developed on Rogers 3006 substrate performed for the forward coupler resonators and frequency generator validate the proposed design concept.

提出了一种基于正向耦合器原理的频率发生器。本设计针对高频应用,采用半模基板集成波导结构实现正向耦合器。因此,它实现了紧凑性,与衬底集成波导结构相比,大约需要一半的面积,并支持非横向电磁(TEM)功能。非tem环境提供了在sub-GHz频段和毫米波范围内使用无芯片射频识别阅读器的频率发生器的灵活性。在Rogers 3006衬底上对正耦谐振器和频率发生器进行了全波模拟和后续测量,验证了所提出的设计概念。
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引用次数: 0
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