Iet Circuits Devices & Systems最新文献

This paper presents simulation and measurement results of a 2–4 GHz octave bandwidth interference suppression circuit. The circuit accomplishes the function of a tunable frequency notch through an interferometer architecture. The relative delay in the interferometer paths is varied with GaN monolithic microwave integrated circuit tunable delay lines. The delay is adjusted by varying the drain voltage of cold-FET connected high electron mobility transistors acting as varactors. Two types of periodically-loaded delay lines are compared: a uniform and a tapered design. A simple theoretical study, relating the delays and amplitudes in the interferometer circuit branches, is developed to inform the design. Two interference suppression hybrid circuits are implemented, and measurements demonstrate a 25–40 dB notch across the 2.24–4 GHz range for the uniform delay line, and 2.32–4.13 GHz for the tapered design. The return loss for both designs remains below 10 dB. Measurements with two tones spaced 0.5 and 1 GHz for varying tone power are performed to quantify suppression. The circuit can handle an input power of 37 dBm and maintains performance with two simultaneous 25 dBm tones spaced 0.5 GHz apart. Linearity is characterised with 10 MHz two-tone measurements, and the circuit demonstrates a 3rd-order intercept input power larger than 30 dBm for control biases above −12 V.

Currently, the Quartz Flexible Accelerometer (QFA) mounted for the applications working in high acceleration environment are suffering from the fracture of the flexible beams under external acceleration shock. This paper presents the mechanical model and reliability design approach of QFA to maintain the measuring ability under a fractured state. The structural parameters changed significantly in the mechanical model under a fractured state compared to those in the original model. A modified structure to maintain the measuring ability of QFA under a fractured state is designed with the reference of the sensitive module in Electrostatic Suspended Accelerometer (ESA). The corresponding close-loop system is corrected and discretised to ensure the stability requirements of the mechanical model. A static experiment is conducted to prove the effectiveness of the proposed model by a prototype QFA with completely fractured flexible beams. The result shows helpful on the preliminary research for QFA with the similar sensitive structure to ESA.

In this article, a new p⁺ pocket stacked gate oxide junctionless tunnelling field effect transistor (junction less tunnelling field effect transistor (JLTFET)) which has metal strip in gate oxide layer is proposed for analogue/RF circuit applications. Due to the insertion of a p⁺ pocket in source/channel junction and the use of metal strip in oxide layer, the following properties of the proposed JLTFET are resulted. First, the tunnelling barrier width is reduced in the source/channel junction thereby, electrons easily tunnel from the source to the channel. Second, the hole concentration (empty state) in the channel is increased, leading to higher electron contribution in the tunnelling process. These improvements are useful in achieving high drain current and steep subthreshold swing. As a result, the maximum ON current of 4.4 × 10⁻⁵ A/μm and average subthreshold swing of 40 mV/decade are obtained from simulation results. Moreover, as compared to conventional JLTFET, the proposed JLTFET provides improvements in reliability and analogue/radio frequency (RF) performance.

The limited and inconvenient functionality of conventional light switches is out of pace with current advancements in wireless sensors. A chipless RFID light switch (CLS) that is passive, battery-free and relocatable and maintains the convenience of having physical buttons for controlling lightbulbs or other electrical devices is introduced. These characteristics have been achieved by attaching single-pole-single-through toggle switches to the edges of radio frequency spiral resonators. The status of the switches activates or deactivates the resonators, allowing the CLS tag to passively communicate the status of the switches. A CLS tag with two ID resonators (used for tag identifications), and two measurement resonators [MRs] (connected with switches and used to communicate the status of the switches) was designed and fabricated using a 1-mm-thick FR4 substrate. Measurement results showed resonant frequencies at 1115 and 1220 MHz corresponding to the ID resonators and frequencies at 848 and 971 MHz corresponding to the MRs. Turning the switches OFF and ON successfully activated and deactivated the MRs.

Retraction: [Xiaojian Wang, Xiaoye Sun, Zixuan Wang, Construction of visual evaluation system for building block night scene lighting based on multi-target recognition and data processing, IET Circuits, Devices & Systems 2023 (https://doi.org/10.1049/cds2.12154)].

The above article [1] from IET Circuits, Devices & Systems, published online on 22 February 2023 in the Wiley Online Library (https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/cds2.12154) has been retracted by agreement between the editor-in-chief, Harry E. Ruda, the Institution of Engineering and Technology (the IET) and John Wiley and Sons Ltd. This article was published as part of a guest-edited special issue. Following an investigation, the IET and the journal have determined that the article was not reviewed in line with the journal's peer review standards, and there is evidence that the peer review process of the special issue underwent systematic manipulation. Accordingly, we cannot vouch for the integrity or reliability of the content. Therefore, we have taken the decision to retract the article. The authors have been informed of the decision to retract.

Key parameters of analog-to-digital converters (ADCs) are their sampling rate and dynamic range. Power consumption and cost of an ADC are directly proportional to the sampling rate; hence, it is desirable to keep it as low as possible. The dynamic range of an ADC also plays an important role, and ideally, it should be greater than the signal's; otherwise, the signal will be clipped. To avoid clipping, modulo folding can be used before sampling, followed by an unfolding algorithm to recover the true signal. Here, the authors present a modulo hardware prototype that can be used before sampling to avoid clipping. The authors’ modulo hardware operates prior to the sampling mechanism and can fold higher frequency signals compared to existing hardware. The authors present a detailed design of the hardware and also address key issues that arise during implementation. In terms of applications, the authors show the reconstruction of finite-rate-of-innovation signals, which are beyond the dynamic range of the ADC. The authors’ system operates at six times below the Nyquist rate of the signal and can accommodate eight times larger signals than the ADC's dynamic range.

Significant progress has been made in manufacturing emerging technologies in recent years. This progress implemented in-memory-computing and neural networks, one of today's hottest research topics. Over time, the need to process complex tasks has increased. This need causes the emergence of intelligent processors. A nonvolatile associative memory based on spintronic synapses utilising magnetic tunnel junction (MTJ) and carbon nanotube field-effect transistors (CNTFET)-based neurons is proposed. The proposed design uses the MTJ device because of its fascinating features, such as reliable reconfiguration and nonvolatility. At the same time, CNTFET has overcome conventional complementary metal-oxide-semiconductor shortcomings like the short channel effect, drain-induced barrier lowering, and poor hole mobility. The proposed design is simulated in the presence of process variations. The proposed design aims to increase the number of weights generated in the synapse for higher memory capacity and accuracy. The effect of different tunnel magnetoresistance (TMR) values (100%, 200%, and 300%) on the performance and accuracy of the proposed design has also been investigated. This investigation shows that the proposed design performs well even with a low TMR value, which is very important and remarkable from the fabrication point of view.