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IEEE Computer Architecture Letters最新文献
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LV: Latency-Versatile Floating-Point Engine for High-Performance Deep Neural Networks
LV:用于高性能深度神经网络的潜伏通用浮点引擎
IF 2.3
3区 计算机科学
IEEE Computer Architecture Letters
Pub Date : 2023-08-25
DOI: 10.1109/LCA.2023.3287096
Yun-Chen Lo;Yu-Chih Tsai;Ren-Shuo Liu
Computing latency is an important system metric for Deep Neural Networks (DNNs) accelerators. To reduce latency, this work proposes
LV