Industrial edge computing provides new possibilities for traditional industrial automation systems. With massive computing, storage, and communication resources equipped with devices on the shop floor, a typical edge device can simultaneously handle multiple real-time and non-real-time tasks. Also, those tasks may include operation technologies, such as real-time control, and information technologies, such as data processing. Using a generic modeling language to design those new industrial edge applications becomes a challenge for site engineers. This paper proposes the IEC 61499 standard for operation and information technology convergence for industrial edge applications. The concurrent execution semantics of IEC 61499 function blocks are defined to support multiple applications simultaneously. The event scheduling rules are investigated to ensure the determinism of parallel executions of function block networks. Finally, a case study is provided for the performance analysis of the proposed concurrent execution semantics.
{"title":"Concurrent Deterministic Execution Semantics for IEC 61499-Based OT–IT Convergence Industrial Edge Applications","authors":"Wenbin Dai;Shang Gao;Kaiyun Qin;Chuanyang Yu;Dongdong Zhang;Likuan Zhang;Hui Zhang","doi":"10.1109/OJIES.2025.3578861","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3578861","url":null,"abstract":"Industrial edge computing provides new possibilities for traditional industrial automation systems. With massive computing, storage, and communication resources equipped with devices on the shop floor, a typical edge device can simultaneously handle multiple real-time and non-real-time tasks. Also, those tasks may include operation technologies, such as real-time control, and information technologies, such as data processing. Using a generic modeling language to design those new industrial edge applications becomes a challenge for site engineers. This paper proposes the IEC 61499 standard for operation and information technology convergence for industrial edge applications. The concurrent execution semantics of IEC 61499 function blocks are defined to support multiple applications simultaneously. The event scheduling rules are investigated to ensure the determinism of parallel executions of function block networks. Finally, a case study is provided for the performance analysis of the proposed concurrent execution semantics.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"982-993"},"PeriodicalIF":5.2,"publicationDate":"2025-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11030848","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144492202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this article, a new type of self-powered active mass damper (SPAMD) based on permanent magnet synchronous motor is designed for large-scale flexible structure vibration reduction systems. SPAMD can fully utilize the characteristics of four-quadrant operation of the motor, enabling active suppression of structural vibration while recovering energy. To achieve active vibration reduction control, a distributed control strategy of multiple energy-interconnected self-powered active mass dampers is proposed. Therein, a multilevel substructure method is employed to allocate actuators across different levels of the substructure systems. In addition, a distributed economic model predictive control (DEMPC) strategy is presented to optimize control inputs, which can ensure that the flexible structural system achieves optimal energy recovery power while satisfying certain state constraints. Consequently, the coordinated control of system performance and energy recovery is achieved under self-powered conditions. Extensive experiments on the dSPACE DS1006 platform are carried out to verify the feasibility of the proposed DEMPC method.
{"title":"Distributed Economic Model Predictive Control-Based Self-Powered Active Vibration Control of Flexible Structures With PMSM Electromagnetic Damper","authors":"Kaixin Cheng;Yuanbo Guo;Ze Li;Qigang Liang;Luyu Li;Xiaohua Zhang","doi":"10.1109/OJIES.2025.3576603","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3576603","url":null,"abstract":"In this article, a new type of self-powered active mass damper (SPAMD) based on permanent magnet synchronous motor is designed for large-scale flexible structure vibration reduction systems. SPAMD can fully utilize the characteristics of four-quadrant operation of the motor, enabling active suppression of structural vibration while recovering energy. To achieve active vibration reduction control, a distributed control strategy of multiple energy-interconnected self-powered active mass dampers is proposed. Therein, a multilevel substructure method is employed to allocate actuators across different levels of the substructure systems. In addition, a distributed economic model predictive control (DEMPC) strategy is presented to optimize control inputs, which can ensure that the flexible structural system achieves optimal energy recovery power while satisfying certain state constraints. Consequently, the coordinated control of system performance and energy recovery is achieved under self-powered conditions. Extensive experiments on the dSPACE DS1006 platform are carried out to verify the feasibility of the proposed DEMPC method.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"994-1013"},"PeriodicalIF":5.2,"publicationDate":"2025-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11023879","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144492384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-30DOI: 10.1109/OJIES.2025.3565902
Afshin Nazer;Olindo Isabella;Patrizio Manganiello
In photovoltaic (PV) systems, unavoidable factors, such as partial shading, nonoptimal mounting angles of PV modules, and accumulation of dust result in mismatches, consequently diminishing energy yield. A promising solution to mitigate these issues is to use distributed maximum power point tracking (DMPPT) architectures. To alleviate mismatch-related losses, many DMPPT architectures, including full power processing (FPP) and differential power processing (DPP), have been documented in the literature. FPP encompasses techniques, such as microinverters, modular multilevel cascade inverters, and dc architectures, such as parallel, series, and total cross-tied. DPP variants include series DPP, parallel DPP, and series–parallel DPP architectures. Moreover, novel DMPPT architectures, such as hybrid and hierarchical architectures, along with advancements in converter topologies and control strategies, continue to emerge, aiming to improve levelized cost of energy. Each novel solution brings distinct advantages and challenges, but the extensive number of architectures, power converters topologies, and control methods have led to confusion and complexity in navigating the literature. This article systematically categorizes, reviews, and compares various DMPPT architectures, associated converters, and control strategies, providing a comprehensive overview of the evolving landscape of DMPPT development. By elucidating existing advancements and identifying gaps for further research, this review aims to offer clarity and guidance in advancing DMPPT technology for enhanced PV system performance.
{"title":"A Comprehensive Classification of State-of-the-Art Distributed Maximum Power Point Tracking Architectures for Photovoltaic Systems","authors":"Afshin Nazer;Olindo Isabella;Patrizio Manganiello","doi":"10.1109/OJIES.2025.3565902","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3565902","url":null,"abstract":"In photovoltaic (PV) systems, unavoidable factors, such as partial shading, nonoptimal mounting angles of PV modules, and accumulation of dust result in mismatches, consequently diminishing energy yield. A promising solution to mitigate these issues is to use distributed maximum power point tracking (DMPPT) architectures. To alleviate mismatch-related losses, many DMPPT architectures, including full power processing (FPP) and differential power processing (DPP), have been documented in the literature. FPP encompasses techniques, such as microinverters, modular multilevel cascade inverters, and dc architectures, such as parallel, series, and total cross-tied. DPP variants include series DPP, parallel DPP, and series–parallel DPP architectures. Moreover, novel DMPPT architectures, such as hybrid and hierarchical architectures, along with advancements in converter topologies and control strategies, continue to emerge, aiming to improve levelized cost of energy. Each novel solution brings distinct advantages and challenges, but the extensive number of architectures, power converters topologies, and control methods have led to confusion and complexity in navigating the literature. This article systematically categorizes, reviews, and compares various DMPPT architectures, associated converters, and control strategies, providing a comprehensive overview of the evolving landscape of DMPPT development. By elucidating existing advancements and identifying gaps for further research, this review aims to offer clarity and guidance in advancing DMPPT technology for enhanced PV system performance.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"738-763"},"PeriodicalIF":5.2,"publicationDate":"2025-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10980452","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143949332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In recent years, there has been a notable rise in deploying multiple power converters within integrated systems. Among the most crucial of these systems are electric vehicles, which utilize dc–dc converters and inverters. Interleaved boost converters are desirable for these applications because of their favorable characteristics, including low current ripple, high efficiency, and flexibility. The configuration chosen in this article is a motor drive inverter for permanent magnet synchronous motors powered by a three-phase interleaved boost converter. Implementing control methods independently for multiple interconnected converters can lead to decreased accuracy, increased response time, lack of proper control, and system uncertainty. On the other hand, integrated control of complex systems is not feasible because of computational time limits. This article proposes a distributed finite-control-set model predictive control method to solve the problems caused by the lack of dependence on the controllers. Furthermore, the proposed technique alleviates the computational burden associated with the unified control methods, aiming to enhance feasibility and minimize complexity. Considering the switching states in the prediction equation, the proposed method eliminates both the dc-link voltage and current sensors from the system. Compared to independent control methods, the results showed that the proposed method improved the transient and steady-state performance and reduced the ripple of essential variables such as torque, current, and voltage. In addition, the peak battery current is decreased.
{"title":"Distributed Predictive Control of the Two-Stage Power Converter From the Battery to the Motor Considering the DC-Voltage Prediction","authors":"Reza Zolfagharian;S. Alireza Davari;Freddy Flores-Bahamonde;Jose Rodriguez","doi":"10.1109/OJIES.2025.3565293","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3565293","url":null,"abstract":"In recent years, there has been a notable rise in deploying multiple power converters within integrated systems. Among the most crucial of these systems are electric vehicles, which utilize dc–dc converters and inverters. Interleaved boost converters are desirable for these applications because of their favorable characteristics, including low current ripple, high efficiency, and flexibility. The configuration chosen in this article is a motor drive inverter for permanent magnet synchronous motors powered by a three-phase interleaved boost converter. Implementing control methods independently for multiple interconnected converters can lead to decreased accuracy, increased response time, lack of proper control, and system uncertainty. On the other hand, integrated control of complex systems is not feasible because of computational time limits. This article proposes a distributed finite-control-set model predictive control method to solve the problems caused by the lack of dependence on the controllers. Furthermore, the proposed technique alleviates the computational burden associated with the unified control methods, aiming to enhance feasibility and minimize complexity. Considering the switching states in the prediction equation, the proposed method eliminates both the dc-link voltage and current sensors from the system. Compared to independent control methods, the results showed that the proposed method improved the transient and steady-state performance and reduced the ripple of essential variables such as torque, current, and voltage. In addition, the peak battery current is decreased.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"722-737"},"PeriodicalIF":5.2,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10979863","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143943981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-18DOI: 10.1109/OJIES.2025.3562494
Felix Rehm;Héctor Sarnago;Rüdiger Schwendemann;Óscar Lucía;Marc Hiller
Nonresonant inverter topologies are a reliable, self-protective, and cost-effective solution for induction heating (IH) appliances. In this article, a novel nonresonant inverter topology, particularly suitable for domestic IH applications, is proposed. The proposed topology achieves high output voltage levels, addressing the main drawback of nonresonant topologies compared to resonant ones, which is an increased voltage demand for the same output power. In addition, both switching devices operate against a common ground, enabling a cost-effective implementation with high power density. In this article, the proposed inverter is described, its different operating modes are analyzed, and a power control strategy is derived. A comparison with conventional resonant topologies reveals a potential cost reduction of approximately $13 ,%$ in the main power electronics components, due to the elimination of resonant capacitors and the possibility of using more cost-effective gate drivers. Experimental results demonstrate that the output power can be seamlessly controlled from zero to $3.6 ,mathrm{kW}$, while maintaining zero-voltage switching across a wide operational range. This ensures efficient operation with a maximum estimated efficiency of $98.3 ,%$.
{"title":"A Cost-Effective Nonresonant Inverter Topology for Domestic Induction Heating","authors":"Felix Rehm;Héctor Sarnago;Rüdiger Schwendemann;Óscar Lucía;Marc Hiller","doi":"10.1109/OJIES.2025.3562494","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3562494","url":null,"abstract":"Nonresonant inverter topologies are a reliable, self-protective, and cost-effective solution for induction heating (IH) appliances. In this article, a novel nonresonant inverter topology, particularly suitable for domestic IH applications, is proposed. The proposed topology achieves high output voltage levels, addressing the main drawback of nonresonant topologies compared to resonant ones, which is an increased voltage demand for the same output power. In addition, both switching devices operate against a common ground, enabling a cost-effective implementation with high power density. In this article, the proposed inverter is described, its different operating modes are analyzed, and a power control strategy is derived. A comparison with conventional resonant topologies reveals a potential cost reduction of approximately <inline-formula><tex-math>$13 ,%$</tex-math></inline-formula> in the main power electronics components, due to the elimination of resonant capacitors and the possibility of using more cost-effective gate drivers. Experimental results demonstrate that the output power can be seamlessly controlled from zero to <inline-formula><tex-math>$3.6 ,mathrm{kW}$</tex-math></inline-formula>, while maintaining zero-voltage switching across a wide operational range. This ensures efficient operation with a maximum estimated efficiency of <inline-formula><tex-math>$98.3 ,%$</tex-math></inline-formula>.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"637-650"},"PeriodicalIF":5.2,"publicationDate":"2025-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10970435","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143900584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-16DOI: 10.1109/OJIES.2025.3561675
Sofia Maragkou;Lukas Rappel;Hendrik Dettmer;Thilo Sauter;Axel Jantsch
From military applications to everyday devices, hardware (HW) security is more relevant than ever before. The supply chain of integrated circuits is global and involves multiple actors, which facilitate the implementation of various attacks. Its complexity increases the attack surfaces, violating not only the privacy of the users or even national security but also endangering human life. We review some of the publicly known HW attacks that have occurred and propose an assessment scheme for the attacks and the defense on hardware. Using this scheme, we relate the costs of attacks and defense and provide a structured landscape of HW attacks. To illustrate the utility of our assessment scheme, we apply it to a number of real-world and synthetic research cases. We observe a gap between the research use cases and the real-world attacks and envision that the comprehensive assessment of the attacks will enable the development of more suitable countermeasures. In addition, we revised the security policies for HW devices, and we conclude that the complexity and obscurity of the supply chain are key parameters impacting HW security, providing attack surfaces. Finally, we identify the demystification of the supply chain as the main strategy to mitigate this problem.
{"title":"The Pains of Hardware Security: An Assessment Model of Real-World Hardware Security Attacks","authors":"Sofia Maragkou;Lukas Rappel;Hendrik Dettmer;Thilo Sauter;Axel Jantsch","doi":"10.1109/OJIES.2025.3561675","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3561675","url":null,"abstract":"From military applications to everyday devices, hardware (HW) security is more relevant than ever before. The supply chain of integrated circuits is global and involves multiple actors, which facilitate the implementation of various attacks. Its complexity increases the attack surfaces, violating not only the privacy of the users or even national security but also endangering human life. We review some of the publicly known HW attacks that have occurred and propose an assessment scheme for the attacks and the defense on hardware. Using this scheme, we relate the costs of attacks and defense and provide a structured landscape of HW attacks. To illustrate the utility of our assessment scheme, we apply it to a number of real-world and synthetic research cases. We observe a gap between the research use cases and the real-world attacks and envision that the comprehensive assessment of the attacks will enable the development of more suitable countermeasures. In addition, we revised the security policies for HW devices, and we conclude that the complexity and obscurity of the supply chain are key parameters impacting HW security, providing attack surfaces. Finally, we identify the demystification of the supply chain as the main strategy to mitigate this problem.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"603-617"},"PeriodicalIF":5.2,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10966222","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143888319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article presents an overview of how Artificial Intelligence (AI) and edge technology have been used to improve wireless connectivity in multiple industrial Use Cases (UCs) of the EU project “Intelligent Secure Trustable Things” (InSecTT). We present a brief introduction of the InSecTT framework for cross-domain architecture design, which targets UCs assisted by reusable and/or interoperable technical Building Blocks (BBs). These BBs constitute the “bricks” containing AI and supporting components that were used to build different UCs. The framework consists of multiple stages based on the processing of UC/BB requirements (RQs). These stages include collection, harmonization, refinement, classification, architecture alignment, and functionality modeling of RQs. The most relevant results of these stages are discussed here, with emphasis on the need for a refined granularity of technical components with common functionalities named Sub-Building blocks (SBBs), where collaboration and cross-domain reusability were optimized. The design process shed light on how AI and SBBs were implemented across different layers and entities of our reference architecture for the Internet-of-Things (IoT), including the interfaces used for information exchange. This detailed interface analysis is expected to reveal issues such as bottlenecks, constraints, vulnerabilities, scalability problems, security threats, etc. This will, in turn, contribute to identifying design gaps of AI-enabled IoT systems. The article summarizes the SBBs related to wireless connectivity, including a general description, implementation issues, a comparison of results, adopted interfaces, and conclusions across domains.
{"title":"Artificial Intelligence for Wireless Communications: The InSecTT Perspective","authors":"Ramiro Samano Robles;Gowhar Javanmardi;Christoph Pilz;Przemyslaw Kwapisiewicz;Mateusz Rzymowski;Lukasz Kulas;Luca Davoli;Laura Belli;Gianluigi Ferrari;Bernd-Ludwig Wenning;Bugra Gonca;R. Venkatesha Prasad;Ashutosh Simha;Markku Kiviranta;Ilkka Moilanen;Sean Robinson;Gennaro Cirillo;Mujdat Soyturk;Yavuz Selim Bostanci;Leander B. Hörmann","doi":"10.1109/OJIES.2025.3560946","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3560946","url":null,"abstract":"This article presents an overview of how Artificial Intelligence (AI) and edge technology have been used to improve wireless connectivity in multiple industrial Use Cases (UCs) of the EU project “Intelligent Secure Trustable Things” (InSecTT). We present a brief introduction of the InSecTT framework for cross-domain architecture design, which targets UCs assisted by reusable and/or interoperable technical Building Blocks (BBs). These BBs constitute the <italic>“bricks”</i> containing AI and supporting components that were used to build different UCs. The framework consists of multiple stages based on the processing of UC/BB requirements (RQs). These stages include collection, harmonization, refinement, classification, architecture alignment, and functionality modeling of RQs. The most relevant results of these stages are discussed here, with emphasis on the need for a refined granularity of technical components with common functionalities named Sub-Building blocks (SBBs), where collaboration and cross-domain reusability were optimized. The design process shed light on how AI and SBBs were implemented across different layers and entities of our reference architecture for the Internet-of-Things (IoT), including the interfaces used for information exchange. This detailed interface analysis is expected to reveal issues such as bottlenecks, constraints, vulnerabilities, scalability problems, security threats, etc. This will, in turn, contribute to identifying design gaps of AI-enabled IoT systems. The article summarizes the SBBs related to wireless connectivity, including a general description, implementation issues, a comparison of results, adopted interfaces, and conclusions across domains.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"802-819"},"PeriodicalIF":5.2,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10965931","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144272866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-16DOI: 10.1109/OJIES.2025.3561822
Anton Dianov;Xiaodong Sun;Ji-Won Kang;Galina Demidova;Vladimir Prakht;Nikolay Tarlavin;Jiawei Xiang
The wirewound resistors (WRs) are one of the most popular passive components in modern power converters. They are used for many purposes, including sensing, current limitation, discharging, and braking, therefore, depending on their main target, they are constructed prioritizing one of its characteristics. At the same time, one of the specifics of WR is significant parasitic reactance, which must be taken into account. This feature significantly impacts the operation of power converters, therefore, all side effects have to be carefully analyzed and countermeasures have to be implemented. In order to eliminate gap in this area, the authors provide a detailed insight into the design of various circuits with WRs in power converters and formalize the design process, highlighting 11 checkpoints. The authors share their 20-years experience in this field and illustrate five the most popular mistakes with oscillograms, which simplifies the misstep localization. It saves at least one iteration of prototyping and saves significant resources. This article is mainly addressed to young researchers, however, it could also be useful for experienced engineers without solid background in design with WRs.
{"title":"Recommendations and Typical Errors on Usage of Wirewound Resistors in Design of Power Converters","authors":"Anton Dianov;Xiaodong Sun;Ji-Won Kang;Galina Demidova;Vladimir Prakht;Nikolay Tarlavin;Jiawei Xiang","doi":"10.1109/OJIES.2025.3561822","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3561822","url":null,"abstract":"The wirewound resistors (WRs) are one of the most popular passive components in modern power converters. They are used for many purposes, including sensing, current limitation, discharging, and braking, therefore, depending on their main target, they are constructed prioritizing one of its characteristics. At the same time, one of the specifics of WR is significant parasitic reactance, which must be taken into account. This feature significantly impacts the operation of power converters, therefore, all side effects have to be carefully analyzed and countermeasures have to be implemented. In order to eliminate gap in this area, the authors provide a detailed insight into the design of various circuits with WRs in power converters and formalize the design process, highlighting 11 checkpoints. The authors share their 20-years experience in this field and illustrate five the most popular mistakes with oscillograms, which simplifies the misstep localization. It saves at least one iteration of prototyping and saves significant resources. This article is mainly addressed to young researchers, however, it could also be useful for experienced engineers without solid background in design with WRs.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"669-684"},"PeriodicalIF":5.2,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10967060","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143918785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-14DOI: 10.1109/OJIES.2025.3560741
Oliver Kalmbach;Christoph M. Hackl
Modular multilevel converters (MMCs) are widely used for high-voltage and high-power applications. They are highly scalable, modular, and flexible in operation. However, this comes with the price of a large number of components, such as semiconductors and capacitors. Each of those components is prone to failure. This article presents four fault-tolerant control strategies for MMCs under severe failures: cluster faults that have been rarely discussed in literature for MMCs. Three fault modes are discussed and four cluster-fault control strategies are proposed. All approaches are derived in detail and validated by simulation and measurement results, including transitions from healthy to faulty operation for different power factors and power steps. The results show that proper functionality of the MMC by the proposed cluster-fault control strategies is still achievable even under the resulting voltage constraints. The proposed cluster-fault control strategies are simple to implement and allow for 1) an easy integration into (existing) systems and 2) an improved fault tolerance of MMCs.
{"title":"Cluster-Fault Control Strategies for Modular Multilevel Converters","authors":"Oliver Kalmbach;Christoph M. Hackl","doi":"10.1109/OJIES.2025.3560741","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3560741","url":null,"abstract":"Modular multilevel converters (MMCs) are widely used for high-voltage and high-power applications. They are highly scalable, modular, and flexible in operation. However, this comes with the price of a large number of components, such as semiconductors and capacitors. Each of those components is prone to failure. This article presents four fault-tolerant control strategies for MMCs under severe failures: cluster faults that have been rarely discussed in literature for MMCs. Three fault modes are discussed and four cluster-fault control strategies are proposed. All approaches are derived in detail and validated by simulation and measurement results, including transitions from healthy to faulty operation for different power factors and power steps. The results show that proper functionality of the MMC by the proposed cluster-fault control strategies is still achievable even under the resulting voltage constraints. The proposed cluster-fault control strategies are simple to implement and allow for 1) an easy integration into (existing) systems and 2) an improved fault tolerance of MMCs.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"685-707"},"PeriodicalIF":5.2,"publicationDate":"2025-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10964518","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143943885","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-04-09DOI: 10.1109/OJIES.2025.3559447
Lucas Jonys Ribeiro Silva;Márcio Von Rondow Campos;Thales Augusto Fagundes;Bruno Meneghel Zilli;Rodolpho Vilela Alves Neves;Ricardo Quadros Machado;Vilma Alves de Oliveira
This article proposes a sigmoid-based particle swarm optimization (PSO) for a complete ensemble empirical mode decomposition (SPSO-CEEMD) applied to the energy management system of a hybrid electric vehicle. The low-frequency power demand, to be supplied by the lithium-ion battery (LIB) and internal combustion engine (ICE), is calculated by the CEEMD, while sigmoid functions define the ICE reference, avoiding discontinuities in the control strategy and limiting the response frequency in the implementation of power, velocity and angle control loops for the ICE butterfly valve actuator. High-frequency demand is handled by the ultracapacitor (UC), which controls the dc-link voltage. The sigmoid functions are optimized to reduce the ICE fuel consumption and the LIB aging, considering ICE emissions as constraints in the PSO. To make the UC available in next peak demands, its terminal voltage restoration is relaxed by a phase-lag compensator (PLC) tuned to actuate only after power delivers, which reduces the influence in the LIB dynamic. Experimental and numerical results under the HWYCOL, SC03, and a Brazilian real-world drive cycles show that SPSO-CEEMD reduces the total operational cost, LIB stress and aging compared to state-of-the-art strategies. Despite larger UC voltage restoration error with the PLC, LIB power dynamic is not significantly affected, increasing its lifetime by 2.74% and 10.96% compared to traditional PI and low-pass filter strategies, respectively. Moreover, the total operational cost is reduced by 18.28% and 47.54% in relation to the exclusive operation strategy and interval type-2 fuzzy logic control adapted from the literature.
{"title":"Optimized Sigmoid-Based Complete Ensemble Empirical Mode Decomposition for Energy Management in Hybrid Electric Vehicles","authors":"Lucas Jonys Ribeiro Silva;Márcio Von Rondow Campos;Thales Augusto Fagundes;Bruno Meneghel Zilli;Rodolpho Vilela Alves Neves;Ricardo Quadros Machado;Vilma Alves de Oliveira","doi":"10.1109/OJIES.2025.3559447","DOIUrl":"https://doi.org/10.1109/OJIES.2025.3559447","url":null,"abstract":"This article proposes a sigmoid-based particle swarm optimization (PSO) for a complete ensemble empirical mode decomposition (SPSO-CEEMD) applied to the energy management system of a hybrid electric vehicle. The low-frequency power demand, to be supplied by the lithium-ion battery (LIB) and internal combustion engine (ICE), is calculated by the CEEMD, while sigmoid functions define the ICE reference, avoiding discontinuities in the control strategy and limiting the response frequency in the implementation of power, velocity and angle control loops for the ICE butterfly valve actuator. High-frequency demand is handled by the ultracapacitor (UC), which controls the dc-link voltage. The sigmoid functions are optimized to reduce the ICE fuel consumption and the LIB aging, considering ICE emissions as constraints in the PSO. To make the UC available in next peak demands, its terminal voltage restoration is relaxed by a phase-lag compensator (PLC) tuned to actuate only after power delivers, which reduces the influence in the LIB dynamic. Experimental and numerical results under the HWYCOL, SC03, and a Brazilian real-world drive cycles show that SPSO-CEEMD reduces the total operational cost, LIB stress and aging compared to state-of-the-art strategies. Despite larger UC voltage restoration error with the PLC, LIB power dynamic is not significantly affected, increasing its lifetime by 2.74% and 10.96% compared to traditional PI and low-pass filter strategies, respectively. Moreover, the total operational cost is reduced by 18.28% and 47.54% in relation to the exclusive operation strategy and interval type-2 fuzzy logic control adapted from the literature.","PeriodicalId":52675,"journal":{"name":"IEEE Open Journal of the Industrial Electronics Society","volume":"6 ","pages":"651-668"},"PeriodicalIF":5.2,"publicationDate":"2025-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10960315","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143900514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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