{"title":"Analysis of Outdoor Air Quality Using Low-Cost MEMS-Based Electronic Nose and Gas Analyzer","authors":"Tushar Gawande, Raghavendra Deshmukh, Sharvari Deshmukh","doi":"10.1109/les.2024.3431214","DOIUrl":"https://doi.org/10.1109/les.2024.3431214","url":null,"abstract":"","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"25 1","pages":""},"PeriodicalIF":1.6,"publicationDate":"2024-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141743272","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-07-01DOI: 10.1109/les.2024.3420934
Wesley Grignani, Douglas A. Santos, Felipe Viel, Luigi Dilillo, Douglas R. Melo
{"title":"A Dependable and Low-Cost CCSDS 123 Hyperspectral Image Compressor","authors":"Wesley Grignani, Douglas A. Santos, Felipe Viel, Luigi Dilillo, Douglas R. Melo","doi":"10.1109/les.2024.3420934","DOIUrl":"https://doi.org/10.1109/les.2024.3420934","url":null,"abstract":"","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"27 1","pages":""},"PeriodicalIF":1.6,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141508764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-27DOI: 10.1109/les.2024.3420226
Vishnu Padmakumar, Titu Mary Ignatius, Thockchom Birjit Singha, Roy Paily Palathinkal, Shaik Rafi Ahamed
{"title":"Boosting AES Intrinsic Resilience Using Split SubBytes Round Function Against Power Attacks","authors":"Vishnu Padmakumar, Titu Mary Ignatius, Thockchom Birjit Singha, Roy Paily Palathinkal, Shaik Rafi Ahamed","doi":"10.1109/les.2024.3420226","DOIUrl":"https://doi.org/10.1109/les.2024.3420226","url":null,"abstract":"","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"33 1","pages":""},"PeriodicalIF":1.6,"publicationDate":"2024-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141508765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-20DOI: 10.1109/les.2024.3417413
Hang Yin, Jingxin Dai, Yansong Lv, Yuhuan Wang, Rui Lv
{"title":"Software Implementation of Fast List Decoder for PAC Codes","authors":"Hang Yin, Jingxin Dai, Yansong Lv, Yuhuan Wang, Rui Lv","doi":"10.1109/les.2024.3417413","DOIUrl":"https://doi.org/10.1109/les.2024.3417413","url":null,"abstract":"","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"18 1","pages":""},"PeriodicalIF":1.6,"publicationDate":"2024-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141508766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-19DOI: 10.1109/les.2024.3416820
Ana Fernandes, Luís Crespo, Nuno Neves, Pedro Tomás, Nuno Roma, Gabriel Falcao
{"title":"Functional Validation of the RISC-V Unlimited Vector Extension","authors":"Ana Fernandes, Luís Crespo, Nuno Neves, Pedro Tomás, Nuno Roma, Gabriel Falcao","doi":"10.1109/les.2024.3416820","DOIUrl":"https://doi.org/10.1109/les.2024.3416820","url":null,"abstract":"","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"5 1","pages":""},"PeriodicalIF":1.6,"publicationDate":"2024-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141937440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-18DOI: 10.1109/LES.2024.3415651
Jose Alejandro Galaviz-Aguilar;Cesar Vargas-Rosales;Francisco Falcone
The lock-in amplifier (LIA) instruments are designed to provide signal conditioning for precision measurement systems to extract signals from extremely noisy environments. The digital LIAs design often requires a verification process to ensure hardware performance. Thus, hardware description language (HDL) with functional verification strategies offers a powerful tool to provide an field-programmable gate array (FPGA) integrated solution. In this letter, we propose a methodology of design and verification of all-digital LIA and an additive white Gaussian noise (AWGN) module able to measure extremely lower levels of signal-to-noise ratio (SNR) of $approx $ ${10}^{-{15}}$ or down to −37 dB while a wide reserve of spurious-free dynamic range (SFDR) up to 90 dB on FPGA is ensured. To this end, the designed and implemented FPGA framework for quick, accurate, and comprehensive characterization of a given digital LIA is used to leverage the capabilities of the design under controllable AWGN noise patterns stimulus.
锁相放大器（LIA）仪器的设计目的是为精密测量系统提供信号调节，以便从极度嘈杂的环境中提取信号。数字 LIA 设计通常需要验证过程，以确保硬件性能。因此，具有功能验证策略的硬件描述语言（HDL）为提供现场可编程门阵列（FPGA）集成解决方案提供了强有力的工具。在这封信中，我们提出了一种全数字 LIA 和加性白高斯噪声（AWGN）模块的设计和验证方法，该模块能够测量 ${10}^{-{15}}$ 或低至 -37 dB 的极低水平信噪比（SNR），同时确保 FPGA 具有高达 90 dB 的宽储备无杂散动态范围（SFDR）。为此，设计并实现了 FPGA 框架，用于快速、准确、全面地鉴定给定的数字 LIA，以充分利用设计在可控 AWGN 噪声模式刺激下的能力。
{"title":"Reliable Methodology to FPGA Design Verification and Noise Analysis for Digital Lock-In Amplifiers","authors":"Jose Alejandro Galaviz-Aguilar;Cesar Vargas-Rosales;Francisco Falcone","doi":"10.1109/LES.2024.3415651","DOIUrl":"10.1109/LES.2024.3415651","url":null,"abstract":"The lock-in amplifier (LIA) instruments are designed to provide signal conditioning for precision measurement systems to extract signals from extremely noisy environments. The digital LIAs design often requires a verification process to ensure hardware performance. Thus, hardware description language (HDL) with functional verification strategies offers a powerful tool to provide an field-programmable gate array (FPGA) integrated solution. In this letter, we propose a methodology of design and verification of all-digital LIA and an additive white Gaussian noise (AWGN) module able to measure extremely lower levels of signal-to-noise ratio (SNR) of \u0000<inline-formula> <tex-math>$approx $ </tex-math></inline-formula>\u0000 \u0000<inline-formula> <tex-math>${10}^{-{15}}$ </tex-math></inline-formula>\u0000 or down to −37 dB while a wide reserve of spurious-free dynamic range (SFDR) up to 90 dB on FPGA is ensured. To this end, the designed and implemented FPGA framework for quick, accurate, and comprehensive characterization of a given digital LIA is used to leverage the capabilities of the design under controllable AWGN noise patterns stimulus.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 3","pages":"307-310"},"PeriodicalIF":1.7,"publicationDate":"2024-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141937441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：