Pub Date : 2019-11-20DOI: 10.4230/LIPIcs.ITC.2020.8
Kai-Min Chung, Tai-Ning Liao, Luowen Qian
Function inversion is the problem that given a random function $f: [M] to [N]$, we want to find pre-image of any image $f^{-1}(y)$ in time $T$. In this work, we revisit this problem under the preprocessing model where we can compute some auxiliary information or advice of size $S$ that only depends on $f$ but not on $y$. It is a well-studied problem in the classical settings, however, it is not clear how quantum algorithms can solve this task any better besides invoking Grover's algorithm, which does not leverage the power of preprocessing. Nayebi et al. proved a lower bound $ST^2 ge tildeOmega(N)$ for quantum algorithms inverting permutations, however, they only consider algorithms with classical advice. Hhan et al. subsequently extended this lower bound to fully quantum algorithms for inverting permutations. In this work, we give the same asymptotic lower bound to fully quantum algorithms for inverting functions for fully quantum algorithms under the regime where $M = O(N)$. In order to prove these bounds, we generalize the notion of quantum random access code, originally introduced by Ambainis et al., to the setting where we are given a list of (not necessarily independent) random variables, and we wish to compress them into a variable-length encoding such that we can retrieve a random element just using the encoding with high probability. As our main technical contribution, we give a nearly tight lower bound (for a wide parameter range) for this generalized notion of quantum random access codes, which may be of independent interest.
函数反转的问题是给定一个随机函数$f: [M] to [N]$，我们想要找到任意图像$f^{-1}(y)$在时间$T$的预图像。在这项工作中，我们在预处理模型下重新审视了这个问题，我们可以计算一些辅助信息或大小为$S$的建议，这些信息只依赖于$f$而不依赖于$y$。在经典环境下，这是一个研究得很好的问题，然而，除了调用Grover算法之外，量子算法如何更好地解决这个任务还不清楚，Grover算法没有利用预处理的能力。Nayebi等人证明了量子算法反转排列的下界$ST^2 ge tildeOmega(N)$，然而，他们只考虑具有经典建议的算法。Hhan等人随后将这个下界扩展到反转排列的全量子算法。在此工作中，我们给出了相同的全量子算法的渐近下界，用于反演函数的全量子算法在$M = O(N)$。为了证明这些界限，我们将最初由Ambainis等人引入的量子随机访问码的概念推广到给定一组(不一定是独立的)随机变量的设置，并且我们希望将它们压缩成可变长度的编码，以便我们可以使用高概率编码检索随机元素。作为我们的主要技术贡献，我们给出了量子随机接入码的广义概念的近紧下界(对于宽参数范围)，这可能是独立的兴趣。
{"title":"Lower Bounds for Function Inversion with Quantum Advice","authors":"Kai-Min Chung, Tai-Ning Liao, Luowen Qian","doi":"10.4230/LIPIcs.ITC.2020.8","DOIUrl":"https://doi.org/10.4230/LIPIcs.ITC.2020.8","url":null,"abstract":"Function inversion is the problem that given a random function $f: [M] to [N]$, we want to find pre-image of any image $f^{-1}(y)$ in time $T$. In this work, we revisit this problem under the preprocessing model where we can compute some auxiliary information or advice of size $S$ that only depends on $f$ but not on $y$. It is a well-studied problem in the classical settings, however, it is not clear how quantum algorithms can solve this task any better besides invoking Grover's algorithm, which does not leverage the power of preprocessing. \u0000Nayebi et al. proved a lower bound $ST^2 ge tildeOmega(N)$ for quantum algorithms inverting permutations, however, they only consider algorithms with classical advice. Hhan et al. subsequently extended this lower bound to fully quantum algorithms for inverting permutations. In this work, we give the same asymptotic lower bound to fully quantum algorithms for inverting functions for fully quantum algorithms under the regime where $M = O(N)$. \u0000In order to prove these bounds, we generalize the notion of quantum random access code, originally introduced by Ambainis et al., to the setting where we are given a list of (not necessarily independent) random variables, and we wish to compress them into a variable-length encoding such that we can retrieve a random element just using the encoding with high probability. As our main technical contribution, we give a nearly tight lower bound (for a wide parameter range) for this generalized notion of quantum random access codes, which may be of independent interest.","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"9 1","pages":"8:1-8:15"},"PeriodicalIF":0.0,"publicationDate":"2019-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82407335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-11-15DOI: 10.4230/LIPIcs.ITC.2020.1
Victor Balcer, Albert Cheu
Recent work in differential privacy has highlighted the shuffled model as a promising avenue to compute accurate statistics while keeping raw data in users' hands. We present a protocol in this model that estimates histograms with error independent of the domain size. This implies an arbitrarily large gap in sample complexity between the shuffled and local models. On the other hand, the models are equivalent when we impose the constraints of pure differential privacy and single-message randomizers.
{"title":"Separating Local & Shuffled Differential Privacy via Histograms","authors":"Victor Balcer, Albert Cheu","doi":"10.4230/LIPIcs.ITC.2020.1","DOIUrl":"https://doi.org/10.4230/LIPIcs.ITC.2020.1","url":null,"abstract":"Recent work in differential privacy has highlighted the shuffled model as a promising avenue to compute accurate statistics while keeping raw data in users' hands. We present a protocol in this model that estimates histograms with error independent of the domain size. This implies an arbitrarily large gap in sample complexity between the shuffled and local models. On the other hand, the models are equivalent when we impose the constraints of pure differential privacy and single-message randomizers.","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"53 1","pages":"1:1-1:14"},"PeriodicalIF":0.0,"publicationDate":"2019-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87261850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Technical Paper Reviewers","authors":"","doi":"10.1109/ITC.2004.171","DOIUrl":"https://doi.org/10.1109/ITC.2004.171","url":null,"abstract":"","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"26 1","pages":"17-22"},"PeriodicalIF":0.0,"publicationDate":"2019-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81738333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/TEST.2017.8242026
S. Mathew
Low-area energy-efficient security primitives are key building blocks for enabling end-to-end content protection, user authentication and data security in IoT platforms. This talk describes the design of security circuit primitives that employ energy-efficient circuit techniques with optimal hardware-friendly arithmetic for seamless integration into area/battery-constrained IoT systems: 1) A 2040-gate AES accelerator achieving 289-Gbps/W efficiency in 22-nm CMOS, 2) Hardened hybrid physically unclonablef Function (PUF) circuit to generate a 100% stable encryption key. 3) All-digital TRNG to achieve >0.99-min-entropy with 3-pJ/bit energy efficiency. The talk will also discuss design issues related to side-channel leakage of key information, and how they may be addressed during design of encryption circuits. Finally, the talk will touch upon existing challenges of maintaining the integrity of security circuits, while still enabling testability and post-silicon validation.
{"title":"Security keynote: Ultra-low-energy security circuit primitives for IoT platforms","authors":"S. Mathew","doi":"10.1109/TEST.2017.8242026","DOIUrl":"https://doi.org/10.1109/TEST.2017.8242026","url":null,"abstract":"Low-area energy-efficient security primitives are key building blocks for enabling end-to-end content protection, user authentication and data security in IoT platforms. This talk describes the design of security circuit primitives that employ energy-efficient circuit techniques with optimal hardware-friendly arithmetic for seamless integration into area/battery-constrained IoT systems: 1) A 2040-gate AES accelerator achieving 289-Gbps/W efficiency in 22-nm CMOS, 2) Hardened hybrid physically unclonablef Function (PUF) circuit to generate a 100% stable encryption key. 3) All-digital TRNG to achieve >0.99-min-entropy with 3-pJ/bit energy efficiency. The talk will also discuss design issues related to side-channel leakage of key information, and how they may be addressed during design of encryption circuits. Finally, the talk will touch upon existing challenges of maintaining the integrity of security circuits, while still enabling testability and post-silicon validation.","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"93 1","pages":"1"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80434875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/TEST.2017.8242025
Bob Klosterboer
This presentation will highlight some of the challenges and opportunities that test developers and test operations managers face in a changing data climate. Measured data will drive decisions not only about the product under test, but potentially on the entire design and manufacturing ecosystem. I will also explore some of the value tradeoffs of increased data harvesting vs. reduced test cost requirements of each component.
{"title":"Testing beyond the green light","authors":"Bob Klosterboer","doi":"10.1109/TEST.2017.8242025","DOIUrl":"https://doi.org/10.1109/TEST.2017.8242025","url":null,"abstract":"This presentation will highlight some of the challenges and opportunities that test developers and test operations managers face in a changing data climate. Measured data will drive decisions not only about the product under test, but potentially on the entire design and manufacturing ecosystem. I will also explore some of the value tradeoffs of increased data harvesting vs. reduced test cost requirements of each component.","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"100 1","pages":"1"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78873119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/TEST.2017.8242027
J. Kunkel
After many years of relying on established processes technology geometries, advanced automotive semiconductors, driven by assisted and autonomous driving systems, have recently joined the race to ever smaller semiconductor process technologies. If the massive functionality enabled by 16-nm and below FinFET semiconductor processes, combined with the new fault mechanisms they bring along, weren't enough of a test and repair challenge, the automotive functional safety requirements add a whole other dimension to the problem. This talk discusses automotive test and repair requirements and solutions in the context of automotive functional safety from the perspective of a test automation tool and IP provider.
{"title":"Automotive keynote: Look Mom! No hands!","authors":"J. Kunkel","doi":"10.1109/TEST.2017.8242027","DOIUrl":"https://doi.org/10.1109/TEST.2017.8242027","url":null,"abstract":"After many years of relying on established processes technology geometries, advanced automotive semiconductors, driven by assisted and autonomous driving systems, have recently joined the race to ever smaller semiconductor process technologies. If the massive functionality enabled by 16-nm and below FinFET semiconductor processes, combined with the new fault mechanisms they bring along, weren't enough of a test and repair challenge, the automotive functional safety requirements add a whole other dimension to the problem. This talk discusses automotive test and repair requirements and solutions in the context of automotive functional safety from the perspective of a test automation tool and IP provider.","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"89 1","pages":"1"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80372124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-11-01DOI: 10.1109/TEST.2016.7805818
Ken Hansen
In the history of the semiconductor industry, there has been no other period in time with as much uncertainty in the way forward. But with uncertainty comes great opportunity. There is a need for transformative innovation fueled by breakthrough research to reinvigorate the growth of the industry. This talk will identify some of the new exciting challenges the industry is facing and research areas where investment is needed to address them. Systems of the future-autonomous vehicles, internet of things, selfadaptive configurations modeled on biology-will require advanced techniques to test them, secure them, reduce their power, and produce them without error. This increase in complexity coupled, with a decreasing ability to rely on deterministic circuits, requires new approaches to be created by cross-disciplinary teams co-optimizing across the entire design hierarchy space.
{"title":"Keynote address Thursday: Addressing semiconductor industry needs: Defining the future through creative, exciting research","authors":"Ken Hansen","doi":"10.1109/TEST.2016.7805818","DOIUrl":"https://doi.org/10.1109/TEST.2016.7805818","url":null,"abstract":"In the history of the semiconductor industry, there has been no other period in time with as much uncertainty in the way forward. But with uncertainty comes great opportunity. There is a need for transformative innovation fueled by breakthrough research to reinvigorate the growth of the industry. This talk will identify some of the new exciting challenges the industry is facing and research areas where investment is needed to address them. Systems of the future-autonomous vehicles, internet of things, selfadaptive configurations modeled on biology-will require advanced techniques to test them, secure them, reduce their power, and produce them without error. This increase in complexity coupled, with a decreasing ability to rely on deterministic circuits, requires new approaches to be created by cross-disciplinary teams co-optimizing across the entire design hierarchy space.","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"17 1","pages":"11"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90286646","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-11-01DOI: 10.1109/TEST.2016.7805816
W. Rhines
Test methodology changes have historically been driven largely by necessity-critical needs for cost reduction or quality improvements. This history makes possible the prediction of future changes. Dr. Rhines will review the driving forces for prior discontinuities in design-for-test, analyze the rates of adoption of new test methodologies, and discuss the likely forces that will change our test priorities in the future.
{"title":"Plenary keynote address Tuesday: The business of test: Test and semiconductor economics","authors":"W. Rhines","doi":"10.1109/TEST.2016.7805816","DOIUrl":"https://doi.org/10.1109/TEST.2016.7805816","url":null,"abstract":"Test methodology changes have historically been driven largely by necessity-critical needs for cost reduction or quality improvements. This history makes possible the prediction of future changes. Dr. Rhines will review the driving forces for prior discontinuities in design-for-test, analyze the rates of adoption of new test methodologies, and discuss the likely forces that will change our test priorities in the future.","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"35 1","pages":"9"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82586989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-11-01DOI: 10.1109/TEST.2016.7805817
Rob A. Rutenbar
Machine learning (ML) technologies have revolutionized the ways in which we interact with large-scale, imperfect, real-world data. As a result, there is rising interest in opportunities to implement ML efficiently in custom hardware. We have designed hardware for one broad class of ML techniques: Inference on Probabilistic Graphical Models (PGMs). In these graphs, labels on nodes encode what we know and “how much” we believe it; edges encode belief relationships among labels; statistical inference answers questions such as “if we observe some of the labels in the graph, what are most likely labels on the remainder?” These problems are interesting because they can be very large (e.g., every pixel in an image is one graph node) and because we need answers very fast (e.g., at video frame rates). Inference done as iterative Belief Propagation (BP) can be efficiently implemented in hardware, and we demonstrate several examples from current FPGA prototypes. We have the first configurable, scalable parallel architecture capable of running a range of standard vision benchmarks, with speedups up to 40X over conventional software. We also show that BP hardware can be made remarkably tolerant to the low-level statistical upsets expected in end-of-Moore's-Law nanoscale silicon and post-silicon circuit fabrics, and summarize some effective resilience mechanisms in our prototypes.
{"title":"Keynote address Wednesday: Hardware inference accelerators for machine learning","authors":"Rob A. Rutenbar","doi":"10.1109/TEST.2016.7805817","DOIUrl":"https://doi.org/10.1109/TEST.2016.7805817","url":null,"abstract":"Machine learning (ML) technologies have revolutionized the ways in which we interact with large-scale, imperfect, real-world data. As a result, there is rising interest in opportunities to implement ML efficiently in custom hardware. We have designed hardware for one broad class of ML techniques: Inference on Probabilistic Graphical Models (PGMs). In these graphs, labels on nodes encode what we know and “how much” we believe it; edges encode belief relationships among labels; statistical inference answers questions such as “if we observe some of the labels in the graph, what are most likely labels on the remainder?” These problems are interesting because they can be very large (e.g., every pixel in an image is one graph node) and because we need answers very fast (e.g., at video frame rates). Inference done as iterative Belief Propagation (BP) can be efficiently implemented in hardware, and we demonstrate several examples from current FPGA prototypes. We have the first configurable, scalable parallel architecture capable of running a range of standard vision benchmarks, with speedups up to 40X over conventional software. We also show that BP hardware can be made remarkably tolerant to the low-level statistical upsets expected in end-of-Moore's-Law nanoscale silicon and post-silicon circuit fabrics, and summarize some effective resilience mechanisms in our prototypes.","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"11 1","pages":"10"},"PeriodicalIF":0.0,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74584155","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-03DOI: 10.1109/TEST.2015.7342376
W. R. Bottoms
The rise of the Internet of Things and the migrations of data, logic and applications to the cloud are driving an explosive growth in demand for communications bandwidth at low latency. The traditional path for decreasing power requirement, reducing size, reducing cost and increasing performance can no longer support the market demands as we near the end of Moore's Law. The only solution lies in bringing components closer together through packaging. This requires heterogeneous integration with diversity of materials, circuit types, architectures and processes. Decreases in power, latency and cost while increasing performance and physical density of bandwidth are enabled by bringing the photons closer to the transistors. The introduction of complex 2.5D and 3D heterogeneous SiP integration is just beginning and it can be a solution but there are many difficult challenges. Active photonics, electronic and plasmonic components must be integrated into the same package with passive devices, RF, sensors and MEMS. Ensuring reliability at the system level will be more than just KGD and KGI.
{"title":"Can we ensure reliability in the era of heterogeneous integration?","authors":"W. R. Bottoms","doi":"10.1109/TEST.2015.7342376","DOIUrl":"https://doi.org/10.1109/TEST.2015.7342376","url":null,"abstract":"The rise of the Internet of Things and the migrations of data, logic and applications to the cloud are driving an explosive growth in demand for communications bandwidth at low latency. The traditional path for decreasing power requirement, reducing size, reducing cost and increasing performance can no longer support the market demands as we near the end of Moore's Law. The only solution lies in bringing components closer together through packaging. This requires heterogeneous integration with diversity of materials, circuit types, architectures and processes. Decreases in power, latency and cost while increasing performance and physical density of bandwidth are enabled by bringing the photons closer to the transistors. The introduction of complex 2.5D and 3D heterogeneous SiP integration is just beginning and it can be a solution but there are many difficult challenges. Active photonics, electronic and plasmonic components must be integrated into the same package with passive devices, RF, sensors and MEMS. Ensuring reliability at the system level will be more than just KGD and KGI.","PeriodicalId":6403,"journal":{"name":"2007 IEEE International Test Conference","volume":"8 1","pages":"9"},"PeriodicalIF":0.0,"publicationDate":"2015-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89290096","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：