Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626507
Zongjie Shen, Chun Zhao, I. Mitrovic, Cezhou Zhao, Yina Liu, Li Yang
In this work, the RRAM device with the structure of Ag/AlOx/MXene/ITO was fabricated with the stacked solution-processed switching layers. The device operated with a low voltage around ~2.0 V and exhibited a stable ON/OFF ratio larger than 104. Apart from excellent stability with endurance cycles of more than 100 and retention time of longer than 104 s, typical synaptic behaviors including long-term potentiation and depression (LTP/LTD) were also obtained, which had a positive influence on the following pattern recognition process and the average value of the recognition was around ~90%.
{"title":"Resistive switching performance of memristor with solution-processed stacked MO/2D-materials switching layers","authors":"Zongjie Shen, Chun Zhao, I. Mitrovic, Cezhou Zhao, Yina Liu, Li Yang","doi":"10.1109/ICICDT51558.2021.9626507","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626507","url":null,"abstract":"In this work, the RRAM device with the structure of Ag/AlOx/MXene/ITO was fabricated with the stacked solution-processed switching layers. The device operated with a low voltage around ~2.0 V and exhibited a stable ON/OFF ratio larger than 104. Apart from excellent stability with endurance cycles of more than 100 and retention time of longer than 104 s, typical synaptic behaviors including long-term potentiation and depression (LTP/LTD) were also obtained, which had a positive influence on the following pattern recognition process and the average value of the recognition was around ~90%.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"24 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76632101","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626468
Q. Wang, C. Zhao, W. Liu, H. Zalinge, Y. Liu, L. Yang, C. Zhao
Artificial synapses are the critical component for low-power neuromorphic computing, which surpasses the limitations of von Neumann’s structure. Compared with two-terminal memristors and three-terminal transistors with wire formation and charge trapping mechanisms, the emerging electrolytic gated transistor (EGT) has proven to be a promising neuromorphic application due to its outstanding analog switching performance. Candidate. This paper presents a new low-temperature solution-based oxide thin film transistor, which uses an ion-doped dielectric layer. The device also has a low-noise linear conductance update and a relatively high Gmax/Gmin. The realization of ANN neuromorphic calculation has nearly ideal accuracy. These results highlight the potential of EGT based on AlOx-Li/InOx thin-film transistors in the next generation of low-power electronics outside of the von Neumann architecture.
{"title":"All-solid-state Ion Doping Synaptic Transistor for Bionic Neural computing","authors":"Q. Wang, C. Zhao, W. Liu, H. Zalinge, Y. Liu, L. Yang, C. Zhao","doi":"10.1109/ICICDT51558.2021.9626468","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626468","url":null,"abstract":"Artificial synapses are the critical component for low-power neuromorphic computing, which surpasses the limitations of von Neumann’s structure. Compared with two-terminal memristors and three-terminal transistors with wire formation and charge trapping mechanisms, the emerging electrolytic gated transistor (EGT) has proven to be a promising neuromorphic application due to its outstanding analog switching performance. Candidate. This paper presents a new low-temperature solution-based oxide thin film transistor, which uses an ion-doped dielectric layer. The device also has a low-noise linear conductance update and a relatively high Gmax/Gmin. The realization of ANN neuromorphic calculation has nearly ideal accuracy. These results highlight the potential of EGT based on AlOx-Li/InOx thin-film transistors in the next generation of low-power electronics outside of the von Neumann architecture.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"8 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78600706","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626514
J. Ahn, Jihong Kim, J. Kopanski, Y. Obeng
This paper discusses the development of a rapid, large-scale integration of deterministic dopant placement technique for encoding information in physical structures at the nanoscale. The doped structures bestow a customizable radiofrequency (RF) electronic signature, which could be leveraged into a distinctive identification tag. This will allow any manufactured item (integrated circuit, pharmaceutical, etc.) to be uniquely authenticatable. Applications of this technology include enabling a secure Internet of Things (IoT) and eliminating counterfeit products.
{"title":"Deterministic Tagging Technology for Device Authentication","authors":"J. Ahn, Jihong Kim, J. Kopanski, Y. Obeng","doi":"10.1109/ICICDT51558.2021.9626514","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626514","url":null,"abstract":"This paper discusses the development of a rapid, large-scale integration of deterministic dopant placement technique for encoding information in physical structures at the nanoscale. The doped structures bestow a customizable radiofrequency (RF) electronic signature, which could be leveraged into a distinctive identification tag. This will allow any manufactured item (integrated circuit, pharmaceutical, etc.) to be uniquely authenticatable. Applications of this technology include enabling a secure Internet of Things (IoT) and eliminating counterfeit products.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"18 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73600795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626540
Yuxiao Fang, W. Y. Xu, I. Mitrovic, Li Yang, Chun Zhao, Cezhou Zhao
In this work, an eco-friendly aqueous solution-processed ZrLaO dielectric is demonstrated for large-area application in the harsh radiation environment. Appropriate La doping (10% La) into ZrOx could suppress the formation of Vo and improve the InOx/ZrLaO interface. The Zr0.9La0.1Oy thin films remained stable under 144 krad (SiO2) gamma-ray irradiation, no distinct composition variation or property degradation were observed. The resistor-loaded inverter based on InOx/Zr0.9La0.1Oy TFT demonstrated full swing characteristics with a gain of 13.3 at 4 V and remained 91% gain after 103 krad (SiO2) irradiation.
{"title":"An environmentally friendly solution-processed ZrLaO gate dielectric for large-area applications in the harsh radiation environment","authors":"Yuxiao Fang, W. Y. Xu, I. Mitrovic, Li Yang, Chun Zhao, Cezhou Zhao","doi":"10.1109/ICICDT51558.2021.9626540","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626540","url":null,"abstract":"In this work, an eco-friendly aqueous solution-processed ZrLaO dielectric is demonstrated for large-area application in the harsh radiation environment. Appropriate La doping (10% La) into ZrO<inf>x</inf> could suppress the formation of V<inf>o</inf> and improve the InO<inf>x</inf>/ZrLaO interface. The Zr<inf>0.9</inf>La<inf>0.1</inf>O<inf>y</inf> thin films remained stable under 144 krad (SiO<inf>2</inf>) gamma-ray irradiation, no distinct composition variation or property degradation were observed. The resistor-loaded inverter based on InO<inf>x</inf>/Zr<inf>0.9</inf>La<inf>0.1</inf>O<inf>y</inf> TFT demonstrated full swing characteristics with a gain of 13.3 at 4 V and remained 91% gain after 103 krad (SiO<inf>2</inf>) irradiation.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"85 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80333378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626472
Y. X. Cao, C. Zhao, Y. Liu, L. Yang, H. Zalinge, C. Zhao
This research proposes a unique self-powered synaptic transistor structure that can be used to simulate synaptic function. The voltage is provided by the triboelectric nanogenerator without using additional voltage to generate a presynaptic peak. On this basis, the device can be sewed on the clothes to transmit a signal or alarm device.
{"title":"Bioinspired mechano artificial synapse thin-film transistor","authors":"Y. X. Cao, C. Zhao, Y. Liu, L. Yang, H. Zalinge, C. Zhao","doi":"10.1109/ICICDT51558.2021.9626472","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626472","url":null,"abstract":"This research proposes a unique self-powered synaptic transistor structure that can be used to simulate synaptic function. The voltage is provided by the triboelectric nanogenerator without using additional voltage to generate a presynaptic peak. On this basis, the device can be sewed on the clothes to transmit a signal or alarm device.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"82 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87183667","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626535
T. Dalgaty, E. Vianello, D. Querlioz
Memristors could be a key driver in the development of new ultra-low energy edge neural network hardware. However, the technology has one major drawback – memristor properties are inherently random. Information cannot be programmed in a precise manner. As a result, efforts to exploit the technology often result in neural network models that are less performant than their software counterparts or require mitigation techniques that can negate potential energy benefits. In this paper we summarise how, alternatively, these intrinsic device properties, previously regarded as non-idealities to be mitigated, are well suited for an alternative approach - Bayesian machine learning. Like resistive memory device properties, Bayesian parameters are described by distributions of probability - offering a more natural pairing of device and algorithm.
{"title":"Harnessing intrinsic memristor randomness with Bayesian neural networks","authors":"T. Dalgaty, E. Vianello, D. Querlioz","doi":"10.1109/ICICDT51558.2021.9626535","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626535","url":null,"abstract":"Memristors could be a key driver in the development of new ultra-low energy edge neural network hardware. However, the technology has one major drawback – memristor properties are inherently random. Information cannot be programmed in a precise manner. As a result, efforts to exploit the technology often result in neural network models that are less performant than their software counterparts or require mitigation techniques that can negate potential energy benefits. In this paper we summarise how, alternatively, these intrinsic device properties, previously regarded as non-idealities to be mitigated, are well suited for an alternative approach - Bayesian machine learning. Like resistive memory device properties, Bayesian parameters are described by distributions of probability - offering a more natural pairing of device and algorithm.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"157 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76629805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626503
H. Wen, L. Augel, J. Knobbe
Backside illuminated Si Schottky barrier photodetectors facilitating the effect of internal photoemission are a promising candidate to extend the detection range of Si photodetectors in the short-wavelength infrared range. The detectivity – a merit that is usually limited for planar Schottky photodetectors – can be improved by photonic nanostructures like pyramids that offer a path to increase responsivity and reduce dark currents. We took two approaches based on nanopyramids and investigated their potential to improve the detectivity. By partially metalizing the pyramid, a reduction in dark current is expected; through optimizing the structural parameters, the reflection from the device can be diminished. Using an easy-to-access geometrical explanation as well as finite-difference time-domain simulation, we derived basic design rules and the limitation in improvement one can expect from these approaches.
{"title":"Approaches for Optimizing Near Infrared Si Photodetectors Based on Internal Photoemission","authors":"H. Wen, L. Augel, J. Knobbe","doi":"10.1109/ICICDT51558.2021.9626503","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626503","url":null,"abstract":"Backside illuminated Si Schottky barrier photodetectors facilitating the effect of internal photoemission are a promising candidate to extend the detection range of Si photodetectors in the short-wavelength infrared range. The detectivity – a merit that is usually limited for planar Schottky photodetectors – can be improved by photonic nanostructures like pyramids that offer a path to increase responsivity and reduce dark currents. We took two approaches based on nanopyramids and investigated their potential to improve the detectivity. By partially metalizing the pyramid, a reduction in dark current is expected; through optimizing the structural parameters, the reflection from the device can be diminished. Using an easy-to-access geometrical explanation as well as finite-difference time-domain simulation, we derived basic design rules and the limitation in improvement one can expect from these approaches.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"48 3 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73057906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626479
Hua Fan, Tong Xu, Jianming Liu, Q. Feng
A novel voltage-to-time converter (VTC) with high linearity and wide dynamic input range is used for low-power time-domain ADC in this paper, which combines the advantages of body bias technique and current mirror technique. The proposed time-domain ADC (T-ADC) consists of ring delay line, counter, encoder and subtractor. The time-domain ADC is implemented based on the XFAB 0.18μm COMS standard process, and the overall power consumption is 37.7μW under a 1.8V supply voltage. The simulated ENOB, SNDR, and SFDR are 10.72-bits, 66.31dB, and 76.13dB respectively at the Nyquist frequency.
{"title":"Design of an All-digital Time Domain Analog-to-digital Converter Based on Ring Delay Line Technology","authors":"Hua Fan, Tong Xu, Jianming Liu, Q. Feng","doi":"10.1109/ICICDT51558.2021.9626479","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626479","url":null,"abstract":"A novel voltage-to-time converter (VTC) with high linearity and wide dynamic input range is used for low-power time-domain ADC in this paper, which combines the advantages of body bias technique and current mirror technique. The proposed time-domain ADC (T-ADC) consists of ring delay line, counter, encoder and subtractor. The time-domain ADC is implemented based on the XFAB 0.18μm COMS standard process, and the overall power consumption is 37.7μW under a 1.8V supply voltage. The simulated ENOB, SNDR, and SFDR are 10.72-bits, 66.31dB, and 76.13dB respectively at the Nyquist frequency.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"35 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80734065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626493
Hao Gao
This paper presents a D-band power amplifier design consideration and its extension on a D-band transmitter. In a sub-THz transmitter, its output power and efficiency are determined by the power amplifier. In this work, the design consideration of a 150 GHz power amplifier with 7.1 Psat is presented with a 0.13 μm SiGe technology. In a direction-conversion architecture-based transmitter, a mixer is important for RF-to-LO isolation. A detailed topology analysis is also provided in this paper. A 150 GHz transmitter with an on-chip antenna in 0.13 μm SiGe technology is presented with its 10 cm wireless measured data is presented in this paper.
{"title":"Silicon-based sub-THz PA for Wireless Communication","authors":"Hao Gao","doi":"10.1109/ICICDT51558.2021.9626493","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626493","url":null,"abstract":"This paper presents a D-band power amplifier design consideration and its extension on a D-band transmitter. In a sub-THz transmitter, its output power and efficiency are determined by the power amplifier. In this work, the design consideration of a 150 GHz power amplifier with 7.1 Psat is presented with a 0.13 μm SiGe technology. In a direction-conversion architecture-based transmitter, a mixer is important for RF-to-LO isolation. A detailed topology analysis is also provided in this paper. A 150 GHz transmitter with an on-chip antenna in 0.13 μm SiGe technology is presented with its 10 cm wireless measured data is presented in this paper.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"3 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85005277","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-09-15DOI: 10.1109/ICICDT51558.2021.9626401
Yuhao Zhu, Miao Cui, Ang Li, Fan Li, H. Wen, Wen Liu
The NAND, NOR, AND and OR logic gate circuits are fabricated by monolithic integrated E/D mode MIS-HEMTs. Then the NOR and NAND based data flip-flop (DFF) structure are realized on the same wafer. For the above logic circuits, the driver voltage is up to 9 V. The experimental results fit with the expected logical truth table, which successfully achieved the logical judgement function. It also proves the potential of MIS-HEMT in the production of large input voltage, high-frequency logic circuits.
{"title":"Monolithic DFF-NAND and DFF-NOR logic circuits based on GaN MIS-HEMT","authors":"Yuhao Zhu, Miao Cui, Ang Li, Fan Li, H. Wen, Wen Liu","doi":"10.1109/ICICDT51558.2021.9626401","DOIUrl":"https://doi.org/10.1109/ICICDT51558.2021.9626401","url":null,"abstract":"The NAND, NOR, AND and OR logic gate circuits are fabricated by monolithic integrated E/D mode MIS-HEMTs. Then the NOR and NAND based data flip-flop (DFF) structure are realized on the same wafer. For the above logic circuits, the driver voltage is up to 9 V. The experimental results fit with the expected logical truth table, which successfully achieved the logical judgement function. It also proves the potential of MIS-HEMT in the production of large input voltage, high-frequency logic circuits.","PeriodicalId":6737,"journal":{"name":"2021 International Conference on IC Design and Technology (ICICDT)","volume":"9 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2021-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75348104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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