Pub Date : 2018-01-01DOI: 10.1109/DRC.2018.8444130
E. Douglas, B. Klein, A. Allerman, A. Baca, T. Fortune, A. Armstrong
{"title":"Enhancement-mode Al045Ga0.55N/Al0.3Ga0.7N High Electron Mobility Transistor with p-Al0.3Ga0.7N Gate","authors":"E. Douglas, B. Klein, A. Allerman, A. Baca, T. Fortune, A. Armstrong","doi":"10.1109/DRC.2018.8444130","DOIUrl":"https://doi.org/10.1109/DRC.2018.8444130","url":null,"abstract":"","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"1 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2018-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77064762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-06-22DOI: 10.1109/DRC.2014.6872304
Zhihong Liu, M. Heuken, D. Fahle, G. Ng, T. Palacios
Recently the development of CMOS-compatible fabrication technologies for GaN HEMTs has attracted increasing levels of interest [1]-[4]. A low temperature ohmic contact technology is required for gate-first device fabrication and CMOS-first GaN-Si integration process, however, typical ohmic contacts need annealing at > 800°C [1], [2]. In the past, we have reported an approach to realize low contact resistance (R C ) using CMOS-compatible metal schemes annealed at 500°C through an n + -GaN/n-AlGaN/GaN structure [4]. This method has a drawback that the n-doped AlGaN barrier increases the gate leakage current. In this work, we present the first low temperature (<;450°C) CMOS-compatible Ti/Al ohmic contact technology for conventional unintentionally-doped AlGaN/AlN/GaN HEMT structures.
{"title":"CMOS-compatible Ti/Al ohmic contacts (R c ° C)","authors":"Zhihong Liu, M. Heuken, D. Fahle, G. Ng, T. Palacios","doi":"10.1109/DRC.2014.6872304","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872304","url":null,"abstract":"Recently the development of CMOS-compatible fabrication technologies for GaN HEMTs has attracted increasing levels of interest [1]-[4]. A low temperature ohmic contact technology is required for gate-first device fabrication and CMOS-first GaN-Si integration process, however, typical ohmic contacts need annealing at > 800°C [1], [2]. In the past, we have reported an approach to realize low contact resistance (R\u0000 C\u0000) using CMOS-compatible metal schemes annealed at 500°C through an n\u0000 +\u0000-GaN/n-AlGaN/GaN structure [4]. This method has a drawback that the n-doped AlGaN barrier increases the gate leakage current. In this work, we present the first low temperature (<;450°C) CMOS-compatible Ti/Al ohmic contact technology for conventional unintentionally-doped AlGaN/AlN/GaN HEMT structures.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"39 1","pages":"75-76"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90193036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-08-02DOI: 10.1109/DRC.2012.6256996
T. Ishikura, Z. Cui, K. Yoh
We have fabricated a nuclear spin manipulation device by spin injection from ferromagnetic (FM) electrode into in InAs channel and the operation was confirmed by Hall voltage near the FM/semiconductor interface. Injected electron spins are transferred to nuclear spin angular momentum by hyperfine interaction known as Overhauser effect. [1] Previously, it was reported that nuclear spin polarization in semiconductor by edge current in quantum Hall state [2] and nonlocal lateral spin valve configuration. [3] Compared with these samples working only in extreme conditions, we propose a nuclear spin device, which is electrically controllable at room temperature. Spin induced local magnetic filed was estimated to be the order of kGauss, resulting in a few tens of mV range in Hall voltage [4-5]. Electrical manipulation of local nuclear spin angular momentum would provide a new horizon on device applications of spintronics.
{"title":"Electrical control of nuclear-spin-induced Hall voltage in an inverted InAs heterostructure","authors":"T. Ishikura, Z. Cui, K. Yoh","doi":"10.1109/DRC.2012.6256996","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256996","url":null,"abstract":"We have fabricated a nuclear spin manipulation device by spin injection from ferromagnetic (FM) electrode into in InAs channel and the operation was confirmed by Hall voltage near the FM/semiconductor interface. Injected electron spins are transferred to nuclear spin angular momentum by hyperfine interaction known as Overhauser effect. [1] Previously, it was reported that nuclear spin polarization in semiconductor by edge current in quantum Hall state [2] and nonlocal lateral spin valve configuration. [3] Compared with these samples working only in extreme conditions, we propose a nuclear spin device, which is electrically controllable at room temperature. Spin induced local magnetic filed was estimated to be the order of kGauss, resulting in a few tens of mV range in Hall voltage [4-5]. Electrical manipulation of local nuclear spin angular momentum would provide a new horizon on device applications of spintronics.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"51 1","pages":"125-126"},"PeriodicalIF":0.0,"publicationDate":"2012-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90867376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-08-02DOI: 10.1109/DRC.2012.6256940
A. Serov, Z. Ong, V. Dorgan, E. Pop
Graphene is an interesting material for electronic applications due to its high intrinsic mobility at low-field. However, high-field transport in graphene is less well understood, with the simple assumption often made that it is limited by substrate optical phonon (SO) scattering. Here we model high-field transport in graphene on several dielectric substrates including SO and graphene phonons, proper charge screening, impurity scattering, and self-heating effects. Our model is carefully calibrated against existing experimental data for graphene on SiO2 [1] at several ambient temperatures and different carrier densities. We then use it to investigate transport in graphene on other dielectrics where experiments do not exist yet.
{"title":"Role of screening, heating, and dielectrics on high-field transport in graphene","authors":"A. Serov, Z. Ong, V. Dorgan, E. Pop","doi":"10.1109/DRC.2012.6256940","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256940","url":null,"abstract":"Graphene is an interesting material for electronic applications due to its high intrinsic mobility at low-field. However, high-field transport in graphene is less well understood, with the simple assumption often made that it is limited by substrate optical phonon (SO) scattering. Here we model high-field transport in graphene on several dielectric substrates including SO and graphene phonons, proper charge screening, impurity scattering, and self-heating effects. Our model is carefully calibrated against existing experimental data for graphene on SiO2 [1] at several ambient temperatures and different carrier densities. We then use it to investigate transport in graphene on other dielectrics where experiments do not exist yet.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"68 1","pages":"173-174"},"PeriodicalIF":0.0,"publicationDate":"2012-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88115563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-07-17DOI: 10.1007/978-3-642-34237-0
Zhong Lin Wang
{"title":"Piezotronics and piezo-phototronics","authors":"Zhong Lin Wang","doi":"10.1007/978-3-642-34237-0","DOIUrl":"https://doi.org/10.1007/978-3-642-34237-0","url":null,"abstract":"","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"66 1","pages":"23-24"},"PeriodicalIF":0.0,"publicationDate":"2012-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81143711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6256961
Z. Ong, M. Fischetti
This paper discusses the effects of interfacial phonon-plasmon modes on electrical transport in supported graphene. The mobility in graphene supported on an insulating dielectric substrate (such as SiO2) is typically due to scattering by charged impurities, surface roughness and surface polar phonon (SPP) modes. Although impurity scattering is the dominant factor limiting electron mobility it can be reduced experimentally. Coupling between the SPP and graphene plasmon modes leads to the formation of interfacial phonon-plasmon (lPP) modes which can also be interpreted as screened SPP modes. IPP dispersion and electron-IPP scattering rates were used for different substrates (SiO2, h-BN, HfO2 and Al2O3) to calculate the substrate-limited conductivity and field mobility of supported graphene.
{"title":"Effect of interfacial phonon-plasmon modes on electrical transport in supported graphene","authors":"Z. Ong, M. Fischetti","doi":"10.1109/DRC.2012.6256961","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256961","url":null,"abstract":"This paper discusses the effects of interfacial phonon-plasmon modes on electrical transport in supported graphene. The mobility in graphene supported on an insulating dielectric substrate (such as SiO2) is typically due to scattering by charged impurities, surface roughness and surface polar phonon (SPP) modes. Although impurity scattering is the dominant factor limiting electron mobility it can be reduced experimentally. Coupling between the SPP and graphene plasmon modes leads to the formation of interfacial phonon-plasmon (lPP) modes which can also be interpreted as screened SPP modes. IPP dispersion and electron-IPP scattering rates were used for different substrates (SiO2, h-BN, HfO2 and Al2O3) to calculate the substrate-limited conductivity and field mobility of supported graphene.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"28 1","pages":"29-30"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73885326","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6256928
A. Neal, H. Liu, J. Gu, P. Ye
With increasing demands for electrostatic control as scaling continues in today's transistors, low dimensional structures continue to gain attention as a pathway for future device scaling because they offer excellent electrostatic control while remaining compatible with straightforward lithography techniques. In particular, MoS2 has attracted interest for transistor applications because its large band gap allows for field effect devices with low off-current, unlike graphene [1]. One key bottleneck, however, is the realization of ohmic contacts on MoS2 to improve FET device on-state performance. With this in mind, we evaluate Ni and Pd contacts on MoS2 as potential alternatives to the already realized Au-MoS2 and Ti-MoS2 contacts [1]. Back-gated transfer length method (TLM) structures with Au, Ni, and Pd contact metals were fabricated on exfoliated MoS2 flakes, with 300nm SiO2 on degenerately doped Si as the substrate. The data indicate that Ni, like Au, makes an ohmic contact to the n-doped MoS2 while the Pd metal contact shows Schottky behavior.
{"title":"Metal contacts to MoS2: A two-dimensional semiconductor","authors":"A. Neal, H. Liu, J. Gu, P. Ye","doi":"10.1109/DRC.2012.6256928","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256928","url":null,"abstract":"With increasing demands for electrostatic control as scaling continues in today's transistors, low dimensional structures continue to gain attention as a pathway for future device scaling because they offer excellent electrostatic control while remaining compatible with straightforward lithography techniques. In particular, MoS2 has attracted interest for transistor applications because its large band gap allows for field effect devices with low off-current, unlike graphene [1]. One key bottleneck, however, is the realization of ohmic contacts on MoS2 to improve FET device on-state performance. With this in mind, we evaluate Ni and Pd contacts on MoS2 as potential alternatives to the already realized Au-MoS2 and Ti-MoS2 contacts [1]. Back-gated transfer length method (TLM) structures with Au, Ni, and Pd contact metals were fabricated on exfoliated MoS2 flakes, with 300nm SiO2 on degenerately doped Si as the substrate. The data indicate that Ni, like Au, makes an ohmic contact to the n-doped MoS2 while the Pd metal contact shows Schottky behavior.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"10 1","pages":"65-66"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74709759","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6257005
A. Shakouri
Energy consumption in our society is increasing rapidly. A significant fraction of the energy is lost in the form of heat. In this talk we introduce thermoelectric devices that allow direct conversion of heat into electricity. A key requirement to improve the efficiency is to increase the Seebeck coefficient (S) and the electrical conductivity (σ) while reducing the electronic and lattice contributions to thermal conductivity (κe+κL). Some new physical concepts and nanostructures make it possible to modify the trade-offs between the bulk material properties through the changes in the density of states, scattering rates and interface effects on the electron and phonon transport. We will review recent experimental and theoretical results on nanostructured materials of various dimensions: superlattices, nanowires, nanodots, as well as solid-state thermionic power generation devices [1]. Most of the recent success has been in the reduction of lattice thermal conductivity while maintaining good electrical conductivity. Several theoretical and experimental results to improve the thermoelectric power factor (S2σ) and reduce Lorenz number (σ/κe) are presented. Novel metal-semiconductor nanocomposites are developed where the heat and charge transport are modified at the atomic level. Theory and experiment are compared for several III-V and nitride nanocomposites and multilayers [2]. Potential to increase the energy conversion efficiency and bring the cost down to $0.1-0.2/W will be discussed [3]. We also describe how similar principles can be used to make micro refrigerators with cooling power densities exceeding 500 watts per centimeter square [4] in order to selectively remove dynamic hot spots and decrease significantly the requirements for overall cooling of the chip. We also describe some recent advances in nanoscale thermal characterization. Thermoreflectance imaging is used to measure the transient temperature distribution in power transistors. Resolution down to 100ns in time, submicron spatial and 0.1C in temperature are achieved using megapixel CCDs. Finally, the transition between energy and entropy transport in nanoscale devices will be briefly discussed.
{"title":"Nanostructured thermoelectric energy conversion and refrigeration devices","authors":"A. Shakouri","doi":"10.1109/DRC.2012.6257005","DOIUrl":"https://doi.org/10.1109/DRC.2012.6257005","url":null,"abstract":"Energy consumption in our society is increasing rapidly. A significant fraction of the energy is lost in the form of heat. In this talk we introduce thermoelectric devices that allow direct conversion of heat into electricity. A key requirement to improve the efficiency is to increase the Seebeck coefficient (S) and the electrical conductivity (σ) while reducing the electronic and lattice contributions to thermal conductivity (κe+κL). Some new physical concepts and nanostructures make it possible to modify the trade-offs between the bulk material properties through the changes in the density of states, scattering rates and interface effects on the electron and phonon transport. We will review recent experimental and theoretical results on nanostructured materials of various dimensions: superlattices, nanowires, nanodots, as well as solid-state thermionic power generation devices [1]. Most of the recent success has been in the reduction of lattice thermal conductivity while maintaining good electrical conductivity. Several theoretical and experimental results to improve the thermoelectric power factor (S2σ) and reduce Lorenz number (σ/κe) are presented. Novel metal-semiconductor nanocomposites are developed where the heat and charge transport are modified at the atomic level. Theory and experiment are compared for several III-V and nitride nanocomposites and multilayers [2]. Potential to increase the energy conversion efficiency and bring the cost down to $0.1-0.2/W will be discussed [3]. We also describe how similar principles can be used to make micro refrigerators with cooling power densities exceeding 500 watts per centimeter square [4] in order to selectively remove dynamic hot spots and decrease significantly the requirements for overall cooling of the chip. We also describe some recent advances in nanoscale thermal characterization. Thermoreflectance imaging is used to measure the transient temperature distribution in power transistors. Resolution down to 100ns in time, submicron spatial and 0.1C in temperature are achieved using megapixel CCDs. Finally, the transition between energy and entropy transport in nanoscale devices will be briefly discussed.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"34 1","pages":"21-22"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73111623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6256929
K. Munira, S. Nadri, M. Forgues, A. Ghosh
In this work, we will focus on efficient transmission to NM2 of information just written onto NM1 with torque from a current spin polarized by the hard layer (Fig. Ib, period A). In order to propagate the logic bit unidirectionally from NMI to NM2 and switch the magnetization of the latter, a small local voltage (~10 mV) applied to the piezoelectric element stresses the magnetization of NM2 to switch to its hard axis (Fig. 1 b, period B). Upon releasing the stress, the magnetization of the NM2 relaxes to the easy axis, with its final orientation determined by the dipolar coupling with the NMI (NM3 still stressed and kept out of operation), thus achieving a fast and low power Bennett clocked computation (Fig. 1 b, period C). In this work, we will assess the interplay between stress and dipolar coupling by varying the stressing profiles (Fig. lc). Specifically we will explore the trade-off between energy dissipated, switching speed and reliability, through a thermodynamic study of the complex 3D spin dynamics of the NMs, captured within a stochastic Landau-Lifshitz-Gilbert formalism.
{"title":"Balancing stress & dipolar interactions for fast, low power, reliable switching in multiferroic logic","authors":"K. Munira, S. Nadri, M. Forgues, A. Ghosh","doi":"10.1109/DRC.2012.6256929","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256929","url":null,"abstract":"In this work, we will focus on efficient transmission to NM2 of information just written onto NM1 with torque from a current spin polarized by the hard layer (Fig. Ib, period A). In order to propagate the logic bit unidirectionally from NMI to NM2 and switch the magnetization of the latter, a small local voltage (~10 mV) applied to the piezoelectric element stresses the magnetization of NM2 to switch to its hard axis (Fig. 1 b, period B). Upon releasing the stress, the magnetization of the NM2 relaxes to the easy axis, with its final orientation determined by the dipolar coupling with the NMI (NM3 still stressed and kept out of operation), thus achieving a fast and low power Bennett clocked computation (Fig. 1 b, period C). In this work, we will assess the interplay between stress and dipolar coupling by varying the stressing profiles (Fig. lc). Specifically we will explore the trade-off between energy dissipated, switching speed and reliability, through a thermodynamic study of the complex 3D spin dynamics of the NMs, captured within a stochastic Landau-Lifshitz-Gilbert formalism.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"5 1","pages":"67-68"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76581092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6256977
Xiaodong Li, Y. Semenov, K. W. Kim
Designing THz detectors that operate at room temperature is highly desirable and challenging for practical applications, such as imaging and quality control. Since the THz photon energy is very close to the thermal excitation, the room temperature operation is very restricted in conventional devices. In contrast, the topological insulators (TIs), e.g. Bi2Se3, pave a way to a new paradigm in low energy optoelectronics due to unique electronic properties of surface electrons. In this work, we analyze THz photodetectors based on the proximity effect in the hybrid TI- ferromagnetic insulator (FMI) structure (Fig.1). The predicted photocurrent of the unit cell can reach the order of 10-7A·cm/W, which is of practical importance. Moreover, the sensitivity of the proposed devices can be extended beyond the thermal limit, since the output signal can be readily distinguishable from the background thermal excitation for signals in THz/far infrared frequency domain even at room temperature.
{"title":"THz detector based on proximity effect of topological insulator","authors":"Xiaodong Li, Y. Semenov, K. W. Kim","doi":"10.1109/DRC.2012.6256977","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256977","url":null,"abstract":"Designing THz detectors that operate at room temperature is highly desirable and challenging for practical applications, such as imaging and quality control. Since the THz photon energy is very close to the thermal excitation, the room temperature operation is very restricted in conventional devices. In contrast, the topological insulators (TIs), e.g. Bi2Se3, pave a way to a new paradigm in low energy optoelectronics due to unique electronic properties of surface electrons. In this work, we analyze THz photodetectors based on the proximity effect in the hybrid TI- ferromagnetic insulator (FMI) structure (Fig.1). The predicted photocurrent of the unit cell can reach the order of 10-7A·cm/W, which is of practical importance. Moreover, the sensitivity of the proposed devices can be extended beyond the thermal limit, since the output signal can be readily distinguishable from the background thermal excitation for signals in THz/far infrared frequency domain even at room temperature.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"23 1","pages":"111-112"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77392345","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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