Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6256934
M. Suhara, S. Takahagi, K. Asakawa, T. Okazaki, M. Nakamura, S. Yamashita, Y. Itagaki, M. Saito, A. Tchegho, G. Keller, A. Poloczek, W. Prost, F. Tegude
Recently, heavy emitter doping rather than decreasing the barrier thickness has boosted the peak current density of resonant tunneling diodes (RTDs) above 1,000 kA/cm2. Based on this achievement very mature InP-based RTD with current densities above 500 kA/cm2 are nowadays the leading solid-state THz device [1, 2]. Here, we show that even triple-barrier RTD (TBRTD) devices now reach a current density in excess of 250 kA/cm2 making this element ideally suited for rectification [3] but now at THz frequencies. Figure 1 is the state of art of THz detection sensitivity of previously reported zero bias detectors. Focusing on such zero bias broadband THz detection, we have also been studying on a design policy for a μm-sized on-chip self-complementally antenna and especially we have reported basic performances of a bow-tie antenna[4,5] integrated with a conventional homogeneous semiconductor mesa structure. However, it was still limited studies considering neither of actual nonlinear devices and peripheral circuits.
{"title":"Analysis of terahertz zero bias detectors by using a triple-barrier resonant tunneling diode integrated with a self-complementary bow-tie antenna","authors":"M. Suhara, S. Takahagi, K. Asakawa, T. Okazaki, M. Nakamura, S. Yamashita, Y. Itagaki, M. Saito, A. Tchegho, G. Keller, A. Poloczek, W. Prost, F. Tegude","doi":"10.1109/DRC.2012.6256934","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256934","url":null,"abstract":"Recently, heavy emitter doping rather than decreasing the barrier thickness has boosted the peak current density of resonant tunneling diodes (RTDs) above 1,000 kA/cm2. Based on this achievement very mature InP-based RTD with current densities above 500 kA/cm2 are nowadays the leading solid-state THz device [1, 2]. Here, we show that even triple-barrier RTD (TBRTD) devices now reach a current density in excess of 250 kA/cm2 making this element ideally suited for rectification [3] but now at THz frequencies. Figure 1 is the state of art of THz detection sensitivity of previously reported zero bias detectors. Focusing on such zero bias broadband THz detection, we have also been studying on a design policy for a μm-sized on-chip self-complementally antenna and especially we have reported basic performances of a bow-tie antenna[4,5] integrated with a conventional homogeneous semiconductor mesa structure. However, it was still limited studies considering neither of actual nonlinear devices and peripheral circuits.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"23 1","pages":"77-78"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90923250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6257010
J. Law, A. Carter, S. Lee, A. Gossard, M. Rodwell
We report contact resistances between source-drain regrowth and underlying semiconductor quantum well channels in test structures designed for characterization of source and drain access resistances in III-V MOSFETs. Regrowths included both N+ InAs and N+ graded InAs-InxGa1-xAs; channel materials included both unstrained In0.53Ga0.47As and unstrained InAs. The access resistivity correlates strongly with the sheet carrier concentration of the 2-dimensional electron gas, consistent with quantum- but not classical- transport theory. With source-drain regrowth of InAs contacts to InAs channels, the total access resistance is within a factor of two of the inverse of Landauer's quantum-state-limited conductance [1-3]. The state-limited conductance in TLM structures and the ballistic MOSFET transconductance both arise from the same physical process, hence the Landauer term in the TLM resistance does not contribute to the MOSFET source access resistance. Application of TLM data to transistor characterization must therefore correct for the state-limited access resistivity. Samples with contacts regrown onto channels with high 5·1014/cm2 sheet carrier concentration, hence low quantum-state-limited resistance, showed extremely low 12.7 Ω-μm access resistivity. This demonstrates the utility of MBE regrowth for source/drain formation in III-V MOS technology.
{"title":"Regrown ohmic contacts to InxGa1−xAs approaching the quantum conductivity limit","authors":"J. Law, A. Carter, S. Lee, A. Gossard, M. Rodwell","doi":"10.1109/DRC.2012.6257010","DOIUrl":"https://doi.org/10.1109/DRC.2012.6257010","url":null,"abstract":"We report contact resistances between source-drain regrowth and underlying semiconductor quantum well channels in test structures designed for characterization of source and drain access resistances in III-V MOSFETs. Regrowths included both N+ InAs and N+ graded InAs-InxGa1-xAs; channel materials included both unstrained In0.53Ga0.47As and unstrained InAs. The access resistivity correlates strongly with the sheet carrier concentration of the 2-dimensional electron gas, consistent with quantum- but not classical- transport theory. With source-drain regrowth of InAs contacts to InAs channels, the total access resistance is within a factor of two of the inverse of Landauer's quantum-state-limited conductance [1-3]. The state-limited conductance in TLM structures and the ballistic MOSFET transconductance both arise from the same physical process, hence the Landauer term in the TLM resistance does not contribute to the MOSFET source access resistance. Application of TLM data to transistor characterization must therefore correct for the state-limited access resistivity. Samples with contacts regrown onto channels with high 5·1014/cm2 sheet carrier concentration, hence low quantum-state-limited resistance, showed extremely low 12.7 Ω-μm access resistivity. This demonstrates the utility of MBE regrowth for source/drain formation in III-V MOS technology.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"1 1","pages":"199-200"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90101620","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6256992
S. Maddox, W. Sun, Z. Lu, H. Nair, J. Campbell, S. R. Bank
Here, we report a significant, ~5x, increase in the room temperature multiplication gain for InAs APD's, as compared to the state-of-the-art at 10 V reverse bias.
{"title":"InAs avalanche photodiode with improved electric field uniformity","authors":"S. Maddox, W. Sun, Z. Lu, H. Nair, J. Campbell, S. R. Bank","doi":"10.1109/DRC.2012.6256992","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256992","url":null,"abstract":"Here, we report a significant, ~5x, increase in the room temperature multiplication gain for InAs APD's, as compared to the state-of-the-art at 10 V reverse bias.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"24 1","pages":"253-254"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79087195","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6257041
S. Lal, Jing Lu, B. Thibeault, S. Denbaars, U. Mishra
This paper report the first demonstration of a fully functional wafer-bonded current aperture vertical electron transistor (BAVET). A maximum drain current (Id) of 29 mA and transconductance (gm_d) of 7.4 mS at a Vgs = 0 V is measured for a device with a width of (75x2) f.lm and an aperture length (Lap) of 8 μm.
{"title":"Experimental demonstration of a wafer-bonded heterostructure based unipolar transistor with In0.53Ga0.47as channel and III-N drain","authors":"S. Lal, Jing Lu, B. Thibeault, S. Denbaars, U. Mishra","doi":"10.1109/DRC.2012.6257041","DOIUrl":"https://doi.org/10.1109/DRC.2012.6257041","url":null,"abstract":"This paper report the first demonstration of a fully functional wafer-bonded current aperture vertical electron transistor (BAVET). A maximum drain current (I<sub>d</sub>) of 29 mA and transconductance (g<sub>m_d</sub>) of 7.4 mS at a V<sub>gs</sub> = 0 V is measured for a device with a width of (75x2) f.lm and an aperture length (L<sub>ap</sub>) of 8 μm.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"72 1","pages":"165-166"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84564481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6257021
K. Sasaki, M. Higashiwaki, A. Kuramata, T. Masui, S. Yamakoshi
In conclusion, we fabricated Ga2O3 SBDs on a single-crystal ß-Ga2O3 (010) substrate. The devices showed good device characteristics such as an ideal factor close to 1.0 and reasonably high reverse VBR. These results indicate that Ga2O3 SBDs have comparable or even more potential than Si and typical widegap semiconductors SiC and GaN have for power device applications. This work was partially supported by NEDO and JST PRESTO programs, Japan.
{"title":"Ga2O3 Schottky barrier diodes fabricated on single-crystal β-Ga2O3 substrates","authors":"K. Sasaki, M. Higashiwaki, A. Kuramata, T. Masui, S. Yamakoshi","doi":"10.1109/DRC.2012.6257021","DOIUrl":"https://doi.org/10.1109/DRC.2012.6257021","url":null,"abstract":"In conclusion, we fabricated Ga<sub>2</sub>O<sub>3</sub> SBDs on a single-crystal ß-Ga<sub>2</sub>O<sub>3</sub> (010) substrate. The devices showed good device characteristics such as an ideal factor close to 1.0 and reasonably high reverse VBR. These results indicate that Ga<sub>2</sub>O<sub>3</sub> SBDs have comparable or even more potential than Si and typical widegap semiconductors SiC and GaN have for power device applications. This work was partially supported by NEDO and JST PRESTO programs, Japan.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"5 1","pages":"159-160"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81873412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6257037
T. Chu, Zhihong Chen
This paper present a study that combines the advantages of GNM with the use of few layer graphene (FLG). In particular, by creating the nanomesh structure in the contact area of the FLG, we are able to achieve two previously unrealized feats: 1) We obtain a substantially reduced contact resistance through the contact to multiple graphene layers and 2) we are able to observe on/off current ratios that rival those in SLG FETs. Based on these findings and a detailed study comparing the impact of scattering in GNM FETs and conventional graphene FETs, we are concluding that FLG FETs with GNM contacts are an excellent choice for future generations of graphene based devices.
{"title":"Graphene nanomesh contacts and its transport properties","authors":"T. Chu, Zhihong Chen","doi":"10.1109/DRC.2012.6257037","DOIUrl":"https://doi.org/10.1109/DRC.2012.6257037","url":null,"abstract":"This paper present a study that combines the advantages of GNM with the use of few layer graphene (FLG). In particular, by creating the nanomesh structure in the contact area of the FLG, we are able to achieve two previously unrealized feats: 1) We obtain a substantially reduced contact resistance through the contact to multiple graphene layers and 2) we are able to observe on/off current ratios that rival those in SLG FETs. Based on these findings and a detailed study comparing the impact of scattering in GNM FETs and conventional graphene FETs, we are concluding that FLG FETs with GNM contacts are an excellent choice for future generations of graphene based devices.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"23 1","pages":"185-186"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78628986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6256966
Karl‐Magnus Persson, Martin Berg, M. Borg, Jun Wu, Henrik Sjöland, E. Lind, L. Wernersson
III-V MOSFETs are currently considered for extension of, or as an add-on to, the Si CMOS technology. Following the Si-technology evolution, it is attractive to consider advanced III-V transistor architectures with non-planar geometry and improved electrostatic control. We report on vertical InAs single nanowire FETs with diameter of 45 nm diameter, integrated on Si substrates with LG = 200 nm. The devices demonstrate normalized extrinsic gm and IDS of 1.34 S/mm and 1.19 A/mm, respectively, at a VDS of 0.5 V, and with an onresistance of 321 Ωμm, all values normalized to the circumference. The main performance limitation is identified as the drain resistance in the ungated top part of the wire. By scaling the NW diameter to 28 nm, we also observe subthreshold swing down to 80 mV/decade at 50 mV VDS. However, the on-resistance increases for the narrow wires to 75 kΩμm, and the normalized current level is reduced as compared to the larger diameter wires.
{"title":"Vertical InAs nanowire MOSFETs with IDS = 1.34 mA/µm and gm = 1.19 mS/µm at VDS = 0.5 V","authors":"Karl‐Magnus Persson, Martin Berg, M. Borg, Jun Wu, Henrik Sjöland, E. Lind, L. Wernersson","doi":"10.1109/DRC.2012.6256966","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256966","url":null,"abstract":"III-V MOSFETs are currently considered for extension of, or as an add-on to, the Si CMOS technology. Following the Si-technology evolution, it is attractive to consider advanced III-V transistor architectures with non-planar geometry and improved electrostatic control. We report on vertical InAs single nanowire FETs with diameter of 45 nm diameter, integrated on Si substrates with LG = 200 nm. The devices demonstrate normalized extrinsic gm and IDS of 1.34 S/mm and 1.19 A/mm, respectively, at a VDS of 0.5 V, and with an onresistance of 321 Ωμm, all values normalized to the circumference. The main performance limitation is identified as the drain resistance in the ungated top part of the wire. By scaling the NW diameter to 28 nm, we also observe subthreshold swing down to 80 mV/decade at 50 mV VDS. However, the on-resistance increases for the narrow wires to 75 kΩμm, and the normalized current level is reduced as compared to the larger diameter wires.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"125 1","pages":"195-196"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80006191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6257038
A. Dey, B. Borg, B. Ganjipour, Martin Ek, Kimberly A. Dick, E. Lind, P. Nilsson, C. Thelander, L. Wernersson
Steep-slope devices, such as tunnel field-effect transistors (TFETs), have recently gained interest due to their potential for low power operation at room temperature. The devices are based on inter-band tunneling which could limit the on-current since the charge carriers must tunnel through a barrier to traverse the device. The InAs/GaSb heterostructure forms a broken type II band alignment which enables inter-band tunneling without a barrier, allowing high on-currents. We have recently demonstrated high current density (ION,reverse = 17.5 mA/μm2) nanowire Esaki diodes and in this work we investigate the potential of InAs/GaSb heterostructure nanowires to operate as TFETs. We present device characterization of InAs0.85Sb0.15/GaSb nanowire TFETs, which exhibit record-high on-current levels.
{"title":"High current density InAsSb/GaSb tunnel field effect transistors","authors":"A. Dey, B. Borg, B. Ganjipour, Martin Ek, Kimberly A. Dick, E. Lind, P. Nilsson, C. Thelander, L. Wernersson","doi":"10.1109/DRC.2012.6257038","DOIUrl":"https://doi.org/10.1109/DRC.2012.6257038","url":null,"abstract":"Steep-slope devices, such as tunnel field-effect transistors (TFETs), have recently gained interest due to their potential for low power operation at room temperature. The devices are based on inter-band tunneling which could limit the on-current since the charge carriers must tunnel through a barrier to traverse the device. The InAs/GaSb heterostructure forms a broken type II band alignment which enables inter-band tunneling without a barrier, allowing high on-currents. We have recently demonstrated high current density (ION,reverse = 17.5 mA/μm2) nanowire Esaki diodes and in this work we investigate the potential of InAs/GaSb heterostructure nanowires to operate as TFETs. We present device characterization of InAs0.85Sb0.15/GaSb nanowire TFETs, which exhibit record-high on-current levels.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"19 1","pages":"205-206"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81015978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6256939
D. Denninghoff, J. Lu, M. Laurent, E. Ahmadi, S. Keller, U. Mishra
This paper reports 400-GHz fmax using a tall-stem T-gate on an N-polar GaN/InAIN MIS-HEMT grown by MOCVD. This is the highest reported fmax value to date for an N-polar GaN HEMT and is among the highest values for all GaN HEMTs. GaN-based HEMTs.
{"title":"N-polar GaN/InAlN MIS-HEMT with 400-GHz ƒmax","authors":"D. Denninghoff, J. Lu, M. Laurent, E. Ahmadi, S. Keller, U. Mishra","doi":"10.1109/DRC.2012.6256939","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256939","url":null,"abstract":"This paper reports 400-GHz fmax using a tall-stem T-gate on an N-polar GaN/InAIN MIS-HEMT grown by MOCVD. This is the highest reported fmax value to date for an N-polar GaN HEMT and is among the highest values for all GaN HEMTs. GaN-based HEMTs.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"65 1","pages":"151-152"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86277824","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-06-18DOI: 10.1109/DRC.2012.6256986
M. Hollander, A. Agrawal, M. Bresnehan, M. Labella, K. Trumbull, R. Cavalero, S. Datta, J. A. Robinson
In recent years, hexagonal boron nitride (h-BN) has gained interest as a material for use in graphene based electronics, where its ultra-smooth two-dimensional structure, lack of dangling bonds, and high energy surface optical phonon modes are desirable when considering the effect of dielectric materials in introducing additional sources of scattering for carriers within graphene. Initial work has indicated that use of h-BN in place of SiO2 supporting substrates can lead to 2-3x improvements in device performance [1,2], suggesting that h-BN may be an excellent choice as top-gate dielectric for graphene devices. In this work, we integrate h-BN with quasi-freestanding graphene (QFEG) for the first time and demonstrate a 2x improvement in radio frequency (RF) performance and the highest fT·Lg product yet reported for h-BN integrated graphene devices (25 GHz·μm).
{"title":"High performance, large area graphene transistors on quasi-free-standing graphene using synthetic hexagonal boron nitride gate dielectrics","authors":"M. Hollander, A. Agrawal, M. Bresnehan, M. Labella, K. Trumbull, R. Cavalero, S. Datta, J. A. Robinson","doi":"10.1109/DRC.2012.6256986","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256986","url":null,"abstract":"In recent years, hexagonal boron nitride (h-BN) has gained interest as a material for use in graphene based electronics, where its ultra-smooth two-dimensional structure, lack of dangling bonds, and high energy surface optical phonon modes are desirable when considering the effect of dielectric materials in introducing additional sources of scattering for carriers within graphene. Initial work has indicated that use of h-BN in place of SiO2 supporting substrates can lead to 2-3x improvements in device performance [1,2], suggesting that h-BN may be an excellent choice as top-gate dielectric for graphene devices. In this work, we integrate h-BN with quasi-freestanding graphene (QFEG) for the first time and demonstrate a 2x improvement in radio frequency (RF) performance and the highest fT·Lg product yet reported for h-BN integrated graphene devices (25 GHz·μm).","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"32 11","pages":"177-178"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91510336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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